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STM32L053C8T6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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STM32L053C8T6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM32L053C8T6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VLCD power_in LCD power supply pin (VLCD) for the LCD driver, listed in Table 15 as a supply pin with no separate I/O structure.
2 PC13 bidirectional 5 V tolerant (FT) I/O with RTC_TAMP1/RTC_TS/RTC_OUT and WKUP2 functions, floating input during and after reset unless a note says otherwise.
3 PC14-OSC32_IN bidirectional 5 V tolerant (FT) I/O that is also the OSC32_IN low-speed oscillator input; after reset the pin function is PC14.
4 PC15-OSC32_OUT bidirectional Standard 3.3 V (TC) I/O that is also the OSC32_OUT low-speed oscillator output; after reset the pin function is PC15.
5 PH0-OSC_IN bidirectional Standard 3.3 V (TC) I/O that is also the OSC_IN high-speed oscillator input and carries USB_CRS_SYNC; after reset the pin function is PH0.
6 PH1-OSC_OUT bidirectional Standard 3.3 V (TC) I/O that is also the OSC_OUT high-speed oscillator output; after reset the pin function is PH1.
7 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor.
8 VSSA power_in Analog ground pin for the ADC, DAC, comparators and reference.
9 VDDA power_in Analog supply pin for the ADC, DAC, comparators and reference.
10 PA0 bidirectional Standard 3.3 V (TC) I/O with TIM2_CH1, TSC_G1_IO1, USART2_CTS, TIM2_ETR and COMP1_OUT alternate functions, and ADC_IN0, COMP1_INM6 and RTC_TAMP2/WKUP1 additional functions.
11 PA1 bidirectional 5 V tolerant (FT) I/O with TIM2_CH2, TSC_G1_IO2, USART2_RTS/USART2_DE, TIM21_ETR, LCD_SEG0 and EVENTOUT alternate functions, and ADC_IN1 and COMP1_INP additional functions.
12 PA2 bidirectional 5 V tolerant (FT) I/O with TIM21_CH1, LCD_SEG1, TIM2_CH3, TSC_G1_IO3, USART2_TX and COMP2_OUT alternate functions, and ADC_IN2 and COMP2_INM6 additional functions.
13 PA3 bidirectional 5 V tolerant (FT) I/O with TIM21_CH2, LCD_SEG2, TIM2_CH4, TSC_G1_IO4 and USART2_RX alternate functions, and ADC_IN3 and COMP2_INP additional functions.
14 PA4 bidirectional Standard 3.3 V (TC) I/O with SPI1_NSS, TSC_G2_IO1, USART2_CK and TIM22_ETR alternate functions, ADC_IN4 and DAC_OUT additional functions, and reduced touch sensing sensitivity (recommended as sampling capacitor I/O).
15 PA5 bidirectional Standard 3.3 V (TC) I/O with SPI1_SCK, TIM2_ETR, TSC_G2_IO2 and TIM2_CH1 alternate functions, and ADC_IN5, COMP1_INM5 and COMP2_INM5 additional functions.
16 PA6 bidirectional 5 V tolerant (FT) I/O with SPI1_MISO, LCD_SEG3, TSC_G2_IO3, LPUART1_CTS, TIM22_CH1, EVENTOUT and COMP1_OUT alternate functions, and ADC_IN6 additional function.
17 PA7 bidirectional 5 V tolerant (FT) I/O with SPI1_MOSI, LCD_SEG4, TSC_G2_IO4, TIM22_CH2, EVENTOUT and COMP2_OUT alternate functions, and ADC_IN7 additional function.
18 PB0 bidirectional 5 V tolerant (FT) I/O with EVENTOUT, LCD_SEG5 and TSC_G3_IO2 alternate functions, and LCD_VLCD3, ADC_IN8 and VREF_OUT additional functions.
19 PB1 bidirectional 5 V tolerant (FT) I/O with LCD_SEG6, TSC_G3_IO3 and LPUART1_RTS/LPUART1_DE alternate functions, and ADC_IN9 and VREF_OUT additional functions.
20 PB2 bidirectional 5 V tolerant (FT) I/O with LPTIM1_OUT and TSC_G3_IO4 alternate functions, and LCD_VLCD2 additional function.
21 PB10 bidirectional 5 V tolerant (FT) I/O with LCD_SEG10, TIM2_CH3, TSC_SYNC, LPUART1_TX, SPI2_SCK and I2C2_SCL alternate functions.
22 PB11 bidirectional 5 V tolerant (FT) I/O with EVENTOUT, LCD_SEG11, TIM2_CH4, TSC_G6_IO1, LPUART1_RX and I2C2_SDA alternate functions.
23 VSS power_in Ground pin.
24 VDD power_in Digital supply pin; the device operates from 1.65 V to 3.6 V.
25 PB12 bidirectional 5 V tolerant (FT) I/O with SPI2_NSS/I2S2_WS, LCD_SEG12, LPUART1_RTS/LPUART1_DE, TSC_G6_IO2, I2C2_SMBA and EVENTOUT alternate functions, and LCD_VLCD1 additional function.
26 PB13 bidirectional 5 V tolerant, Fast-mode-Plus capable (FTf) I/O with SPI2_SCK/I2S2_CK, LCD_SEG13, TSC_G6_IO3, LPUART1_CTS, I2C2_SCL and TIM21_CH1 alternate functions.
27 PB14 bidirectional 5 V tolerant, Fast-mode-Plus capable (FTf) I/O with SPI2_MISO/I2S2_MCK, LCD_SEG14, RTC_OUT, TSC_G6_IO4, LPUART1_RTS/LPUART1_DE, I2C2_SDA and TIM21_CH2 alternate functions.
28 PB15 bidirectional 5 V tolerant (FT) I/O with SPI2_MOSI/I2S2_SD, LCD_SEG15 and RTC_REFIN alternate functions.
29 PA8 bidirectional 5 V tolerant (FT) I/O with MCO, LCD_COM0, USB_CRS_SYNC, EVENTOUT and USART1_CK alternate functions.
30 PA9 bidirectional 5 V tolerant (FT) I/O with MCO, LCD_COM1, TSC_G4_IO1 and USART1_TX alternate functions.
31 PA10 bidirectional 5 V tolerant (FT) I/O with LCD_COM2, TSC_G4_IO2 and USART1_RX alternate functions.
32 PA11 bidirectional 5 V tolerant (FT) I/O powered from VDD_USB, with SPI1_MISO, EVENTOUT, TSC_G4_IO3, USART1_CTS and COMP1_OUT alternate functions and USB_DM additional function.
33 PA12 bidirectional 5 V tolerant (FT) I/O powered from VDD_USB, with SPI1_MOSI, EVENTOUT, TSC_G4_IO4, USART1_RTS/USART1_DE and COMP2_OUT alternate functions and USB_DP additional function.
34 PA13 bidirectional 5 V tolerant (FT) I/O with SWDIO and USB_NOE alternate functions.
35 VSS power_in Ground pin.
36 VDD_USB power_in Supply pin for the USB-powered I/Os (PA11, PA12); for characteristics referring to VDD, VDD_USB must be used instead.
37 PA14 bidirectional 5 V tolerant (FT) I/O with SWCLK and USART2_TX alternate functions.
38 PA15 bidirectional 5 V tolerant (FT) I/O with SPI1_NSS, LCD_SEG17, TIM2_ETR, EVENTOUT, USART2_RX and TIM2_CH1 alternate functions.
39 PB3 bidirectional 5 V tolerant (FT) I/O with SPI1_SCK, LCD_SEG7, TIM2_CH2, TSC_G5_IO1 and EVENTOUT alternate functions, and COMP2_INN additional function.
40 PB4 bidirectional 5 V tolerant (FT) I/O with SPI1_MISO, LCD_SEG8, EVENTOUT, TSC_G5_IO2 and TIM22_CH1 alternate functions, and COMP2_INP additional function.
41 PB5 bidirectional 5 V tolerant (FT) I/O with SPI1_MOSI, LCD_SEG9, LPTIM1_IN1, I2C1_SMBA and TIM22_CH2 alternate functions, and COMP2_INP additional function.
42 PB6 bidirectional 5 V tolerant, Fast-mode-Plus capable (FTf) I/O with USART1_TX, I2C1_SCL, LPTIM1_ETR and TSC_G5_IO3 alternate functions, and COMP2_INP additional function.
43 PB7 bidirectional 5 V tolerant, Fast-mode-Plus capable (FTf) I/O with USART1_RX, I2C1_SDA, LPTIM1_IN2 and TSC_G5_IO4 alternate functions, and COMP2_INP and PVD_IN additional functions.
44 BOOT0 input Dedicated BOOT0 boot-mode selection input pin.
45 PB8 bidirectional 5 V tolerant, Fast-mode-Plus capable (FTf) I/O with LCD_SEG16, TSC_SYNC and I2C1_SCL alternate functions.
46 PB9 bidirectional 5 V tolerant, Fast-mode-Plus capable (FTf) I/O with LCD_COM3, EVENTOUT, I2C1_SDA and SPI2_NSS/I2S2_WS alternate functions.
47 VSS power_in Ground pin.
48 VDD power_in Digital supply pin; the device operates from 1.65 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

CAD (KiCad official)

  • Symbol: STM32L053C8T6
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32l053c8t6-etched.step / stm32l053c8t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l053c8t6.step / stm32l053c8t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (136 pp, sha256 b30ef01e0e2d9c80, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF