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Contents

README

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STM32L053C6T6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM32L053C6T6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VLCD power_in LCD controller supply pin (VLCD) used by the optional LCD power supply scheme.
2 PC13 bidirectional 5 V tolerant I/O (FT) with additional functions RTC_TAMP1, RTC_TS, RTC_OUT and WKUP2.
3 PC14-OSC32_IN bidirectional 5 V tolerant I/O (FT) that doubles as the OSC32_IN input of the 32.768 kHz low-speed oscillator (LSE).
4 PC15-OSC32_OUT bidirectional Standard 3.3 V I/O (TC) that doubles as the OSC32_OUT output of the 32.768 kHz low-speed oscillator (LSE).
5 PH0-OSC_IN bidirectional Standard 3.3 V I/O (TC) that doubles as the OSC_IN input of the high-speed external oscillator, with alternate function USB_CRS_SYNC.
6 PH1-OSC_OUT bidirectional Standard 3.3 V I/O (TC) that doubles as the OSC_OUT output of the high-speed external oscillator.
7 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor.
8 VSSA power_in Analog ground pin (VSSA) for the analog blocks.
9 VDDA power_in Analog supply pin (VDDA) for the analog blocks; the 12-bit ADC is specified down to 1.65 V.
10 PA0 bidirectional Standard 3.3 V I/O (TC) with alternate functions TIM2_CH1, TSC_G1_IO1, USART2_CTS, TIM2_ETR and COMP1_OUT, and additional functions COMP1_INM6, ADC_IN0 and RTC_TAMP2/WKUP1.
11 PA1 bidirectional 5 V tolerant I/O (FT) with alternate functions EVENTOUT, LCD_SEG0, TIM2_CH2, TSC_G1_IO2, USART2_RTS/USART2_DE and TIM21_ETR, and additional functions COMP1_INP and ADC_IN1.
12 PA2 bidirectional 5 V tolerant I/O (FT) with alternate functions TIM21_CH1, LCD_SEG1, TIM2_CH3, TSC_G1_IO3, USART2_TX and COMP2_OUT, and additional functions COMP2_INM6 and ADC_IN2.
13 PA3 bidirectional 5 V tolerant I/O (FT) with alternate functions TIM21_CH2, LCD_SEG2, TIM2_CH4, TSC_G1_IO4 and USART2_RX, and additional functions COMP2_INP and ADC_IN3.
14 PA4 bidirectional Standard 3.3 V I/O (TC) with reduced touch sensing sensitivity (recommended as a sampling capacitor I/O), alternate functions SPI1_NSS, TSC_G2_IO1, USART2_CK and TIM22_ETR, and additional functions COMP1_INM4, COMP2_INM4, ADC_IN4 and DAC_OUT.
15 PA5 bidirectional Standard 3.3 V I/O (TC) with alternate functions SPI1_SCK, TIM2_ETR, TSC_G2_IO2 and TIM2_CH1, and additional functions COMP1_INM5, COMP2_INM5 and ADC_IN5.
16 PA6 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI1_MISO, LCD_SEG3, TSC_G2_IO3, LPUART1_CTS, TIM22_CH1, EVENTOUT and COMP1_OUT, and additional function ADC_IN6.
17 PA7 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI1_MOSI, LCD_SEG4, TSC_G2_IO4, TIM22_CH2, EVENTOUT and COMP2_OUT, and additional function ADC_IN7.
18 PB0 bidirectional 5 V tolerant I/O (FT) with alternate functions EVENTOUT, LCD_SEG5 and TSC_G3_IO2, and additional functions LCD_VLCD3, ADC_IN8 and VREF_OUT.
19 PB1 bidirectional 5 V tolerant I/O (FT) with alternate functions LCD_SEG6, TSC_G3_IO3 and LPUART1_RTS/LPUART1_DE, and additional functions ADC_IN9 and VREF_OUT.
20 PB2 bidirectional 5 V tolerant I/O (FT) with alternate functions LPTIM1_OUT and TSC_G3_IO4, and additional function LCD_VLCD2.
21 PB10 bidirectional 5 V tolerant I/O (FT) with alternate functions LCD_SEG10, TIM2_CH3, TSC_SYNC, LPUART1_TX, SPI2_SCK and I2C2_SCL.
22 PB11 bidirectional 5 V tolerant I/O (FT) with alternate functions EVENTOUT, LCD_SEG11, TIM2_CH4, TSC_G6_IO1, LPUART1_RX and I2C2_SDA.
23 VSS power_in Ground pin (VSS).
24 VDD power_in Digital supply pin (VDD).
25 PB12 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI2_NSS/I2S2_WS, LCD_SEG12, LPUART1_RTS/LPUART1_DE, TSC_G6_IO2, I2C2_SMBA and EVENTOUT, and additional function LCD_VLCD1.
26 PB13 bidirectional 5 V tolerant I/O with Fast Mode Plus capability (FTf), with alternate functions SPI2_SCK/I2S2_CK, LCD_SEG13, TSC_G6_IO3, LPUART1_CTS, I2C2_SCL and TIM21_CH1.
27 PB14 bidirectional 5 V tolerant I/O with Fast Mode Plus capability (FTf), with alternate functions SPI2_MISO/I2S2_MCK, LCD_SEG14, RTC_OUT, TSC_G6_IO4, LPUART1_RTS/LPUART1_DE, I2C2_SDA and TIM21_CH2.
28 PB15 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI2_MOSI/I2S2_SD, LCD_SEG15 and RTC_REFIN.
29 PA8 bidirectional 5 V tolerant I/O (FT) with alternate functions MCO, LCD_COM0, USB_CRS_SYNC, EVENTOUT and USART1_CK.
30 PA9 bidirectional 5 V tolerant I/O (FT) with alternate functions MCO, LCD_COM1, TSC_G4_IO1 and USART1_TX.
31 PA10 bidirectional 5 V tolerant I/O (FT) with alternate functions LCD_COM2, TSC_G4_IO2 and USART1_RX.
32 PA11 bidirectional 5 V tolerant I/O (FT) powered by VDD_USB, with alternate functions SPI1_MISO, EVENTOUT, TSC_G4_IO3, USART1_CTS and COMP1_OUT, and additional function USB_DM.
33 PA12 bidirectional 5 V tolerant I/O (FT) powered by VDD_USB, with alternate functions SPI1_MOSI, EVENTOUT, TSC_G4_IO4, USART1_RTS/USART1_DE and COMP2_OUT, and additional function USB_DP.
34 PA13 bidirectional 5 V tolerant I/O (FT) with alternate functions SWDIO (serial wire debug data) and USB_NOE.
35 VSS power_in Ground pin (VSS).
36 VDD_USB power_in Supply pin for the USB-related I/Os (PA11, PA12); for characteristics referring to VDD on these pins, VDD_USB must be used.
37 PA14 bidirectional 5 V tolerant I/O (FT) with alternate functions SWCLK (serial wire debug clock) and USART2_TX.
38 PA15 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI1_NSS, LCD_SEG17, TIM2_ETR, EVENTOUT, USART2_RX and TIM2_CH1.
39 PB3 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI1_SCK, LCD_SEG7, TIM2_CH2, TSC_G5_IO1 and EVENTOUT, and additional function COMP2_INN.
40 PB4 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI1_MISO, LCD_SEG8, EVENTOUT, TSC_G5_IO2 and TIM22_CH1, and additional function COMP2_INP.
41 PB5 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI1_MOSI, LCD_SEG9, LPTIM1_IN1, I2C1_SMBA and TIM22_CH2, and additional function COMP2_INP.
42 PB6 bidirectional 5 V tolerant I/O with Fast Mode Plus capability (FTf), with alternate functions USART1_TX, I2C1_SCL, LPTIM1_ETR and TSC_G5_IO3, and additional function COMP2_INP.
43 PB7 bidirectional 5 V tolerant I/O with Fast Mode Plus capability (FTf), with alternate functions USART1_RX, I2C1_SDA, LPTIM1_IN2 and TSC_G5_IO4, and additional functions COMP2_INP and PVD_IN.
44 BOOT0 input Dedicated BOOT0 boot-mode pin (type B, input only).
45 PB8 bidirectional 5 V tolerant I/O with Fast Mode Plus capability (FTf), with alternate functions LCD_SEG16, TSC_SYNC and I2C1_SCL.
46 PB9 bidirectional 5 V tolerant I/O with Fast Mode Plus capability (FTf), with alternate functions LCD_COM3, EVENTOUT, I2C1_SDA and SPI2_NSS/I2S2_WS.
47 VSS power_in Ground pin (VSS).
48 VDD power_in Digital supply pin (VDD).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

CAD (KiCad official)

  • Symbol: STM32L053C6T6
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32l053c6t6-etched.step / stm32l053c6t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l053c6t6.step / stm32l053c6t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (136 pp, sha256 b30ef01e0e2d9c80, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF