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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

STM32L052R8T6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32L052R8T6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD	power_in	Digital supply pin; the device operates from a 1.65 V to 3.6 V power supply.
2	PC13	bidirectional	5 V tolerant I/O (FT) with no alternate function listed in the pin definitions table.
3	PC14-OSC32_IN	bidirectional	5 V tolerant I/O (FT) that defaults to PC14 and whose additional function is OSC32_IN, the 32 kHz oscillator input.
4	PC15-OSC32_OUT	bidirectional	Standard 3.3 V I/O (TC) that defaults to PC15 and whose additional function is OSC32_OUT, the 32 kHz oscillator output.
5	PH0-OSC_IN	bidirectional	Standard 3.3 V I/O (TC) that defaults to PH0 and whose additional function is OSC_IN, with USB_CRS_SYNC available as alternate function AF0.
6	PH1-OSC_OUT	bidirectional	Standard 3.3 V I/O (TC) that defaults to PH1 and whose additional function is OSC_OUT.
7	NRST	bidirectional	Bidirectional reset pin with an embedded weak pull-up resistor (RST structure).
8	PC0	bidirectional	5 V tolerant I/O (FT) with alternate functions LPTIM1_IN1, EVENTOUT and TSC_G7_IO1, and additional function ADC_IN10.
9	PC1	bidirectional	5 V tolerant I/O (FT) with alternate functions LPTIM1_OUT, EVENTOUT and TSC_G7_IO2, and additional function ADC_IN11.
10	PC2	bidirectional	5 V tolerant I/O (FT) with alternate functions LPTIM1_IN2, SPI2_MISO/I2S2_MCK and TSC_G7_IO3, and additional function ADC_IN12.
11	PC3	bidirectional	5 V tolerant I/O (FT) with alternate functions LPTIM1_ETR, SPI2_MOSI/I2S2_SD and TSC_G7_IO4, and additional function ADC_IN13.
12	VSSA	power_in	Analog ground reference pin.
13	VDDA	power_in	Analog supply pin; the ADC and comparators are specified down to 1.65 V and the DAC down to 1.8 V per the features list.
14	PA0	bidirectional	Standard 3.3 V I/O (TC) with alternate functions TIM2_CH1, TSC_G1_IO1, USART2_CTS, TIM2_ETR and COMP1_OUT, and additional functions COMP1_INM6, ADC_IN0 and RTC_TAMP2/WKUP1.
15	PA1	bidirectional	5 V tolerant I/O (FT) with alternate functions EVENTOUT, TIM2_CH2, TSC_G1_IO2, USART2_RTS_DE and TIM21_ETR, and additional functions COMP1_INP and ADC_IN1.
16	PA2	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM21_CH1, TIM2_CH3, TSC_G1_IO3, USART2_TX and COMP2_OUT, and additional functions COMP2_INM6 and ADC_IN2.
17	PA3	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM21_CH2, TIM2_CH4, TSC_G1_IO4 and USART2_RX, and additional functions COMP2_INP and ADC_IN3.
18	VSS	power_in	Ground pin for the digital supply domain.
19	VDD	power_in	Digital supply pin; the device operates from a 1.65 V to 3.6 V power supply.
20	PA4	bidirectional	Standard 3.3 V I/O (TC) with reduced touch sensing sensitivity (recommended as sampling capacitor I/O), alternate functions SPI1_NSS, TSC_G2_IO1, USART2_CK and TIM22_ETR, and additional functions COMP1_INM4, COMP2_INM4, ADC_IN4 and DAC_OUT.
21	PA5	bidirectional	Standard 3.3 V I/O (TC) with alternate functions SPI1_SCK, TIM2_ETR, TSC_G2_IO2 and TIM2_CH1, and additional functions COMP1_INM5, COMP2_INM5 and ADC_IN5.
22	PA6	bidirectional	5 V tolerant I/O (FT) with alternate functions SPI1_MISO, TSC_G2_IO3, LPUART1_CTS, TIM22_CH1, EVENTOUT and COMP1_OUT, and additional function ADC_IN6.
23	PA7	bidirectional	5 V tolerant I/O (FT) with alternate functions SPI1_MOSI, TSC_G2_IO4, TIM22_CH2, EVENTOUT and COMP2_OUT, and additional function ADC_IN7.
24	PC4	bidirectional	5 V tolerant I/O (FT) with alternate functions EVENTOUT and LPUART1_TX, and additional function ADC_IN14.
25	PC5	bidirectional	5 V tolerant I/O (FT) with alternate functions LPUART1_RX and TSC_G3_IO1, and additional function ADC_IN15.
26	PB0	bidirectional	5 V tolerant I/O (FT) with alternate functions EVENTOUT and TSC_G3_IO2, and additional functions ADC_IN8 and VREF_OUT.
27	PB1	bidirectional	5 V tolerant I/O (FT) with alternate functions TSC_G3_IO3 and LPUART1_RTS_DE, and additional functions ADC_IN9 and VREF_OUT.
28	PB2	bidirectional	5 V tolerant I/O (FT) with alternate functions LPTIM1_OUT and TSC_G3_IO4.
29	PB10	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM2_CH3, TSC_SYNC, LPUART1_TX, SPI2_SCK and I2C2_SCL.
30	PB11	bidirectional	5 V tolerant I/O (FT) with alternate functions EVENTOUT, TIM2_CH4, TSC_G6_IO1, LPUART1_RX and I2C2_SDA.
31	VSS	power_in	Ground pin for the digital supply domain.
32	VDD	power_in	Digital supply pin; the device operates from a 1.65 V to 3.6 V power supply.
33	PB12	bidirectional	5 V tolerant I/O (FT) with alternate functions SPI2_NSS/I2S2_WS, LPUART1_RTS_DE, TSC_G6_IO2, I2C2_SMBA and EVENTOUT.
34	PB13	bidirectional	5 V tolerant, FM+ capable I/O (FTf) with alternate functions SPI2_SCK/I2S2_CK, TSC_G6_IO3, LPUART1_CTS, I2C2_SCL and TIM21_CH1.
35	PB14	bidirectional	5 V tolerant, FM+ capable I/O (FTf) with alternate functions SPI2_MISO/I2S2_MCK, RTC_OUT, TSC_G6_IO4, LPUART1_RTS_DE, I2C2_SDA and TIM21_CH2.
36	PB15	bidirectional	5 V tolerant I/O (FT) with alternate functions SPI2_MOSI/I2S2_SD and RTC_REFIN.
37	PC6	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM22_CH1 and TSC_G8_IO1.
38	PC7	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM22_CH2 and TSC_G8_IO2.
39	PC8	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM22_ETR and TSC_G8_IO3.
40	PC9	bidirectional	5 V tolerant I/O (FT) with alternate functions TIM21_ETR, USB_NOE and TSC_G8_IO4.
41	PA8	bidirectional	5 V tolerant I/O (FT) with alternate functions MCO, USB_CRS_SYNC, EVENTOUT and USART1_CK.
42	PA9	bidirectional	5 V tolerant I/O (FT) with alternate functions MCO, TSC_G4_IO1 and USART1_TX.
43	PA10	bidirectional	5 V tolerant I/O (FT) with alternate functions TSC_G4_IO2 and USART1_RX.
44	PA11	bidirectional	5 V tolerant I/O (FT) supplied through VDD_USB (note 3), with alternate functions SPI1_MISO, EVENTOUT, TSC_G4_IO3, USART1_CTS and COMP1_OUT, and additional function USB_DM.
45	PA12	bidirectional	5 V tolerant I/O (FT) supplied through VDD_USB (note 3), with alternate functions SPI1_MOSI, EVENTOUT, TSC_G4_IO4, USART1_RTS_DE and COMP2_OUT, and additional function USB_DP.
46	PA13	bidirectional	5 V tolerant I/O (FT) with alternate functions SWDIO and USB_NOE.
47	VSS	power_in	Ground pin for the digital supply domain.
48	VDD_USB	power_in	Supply pin for the USB-related pins (PA11, PA12); for characteristics that refer to VDD, VDD_USB must be used instead.
49	PA14	bidirectional	5 V tolerant I/O (FT) with alternate functions SWCLK and USART2_TX.
50	PA15	bidirectional	5 V tolerant I/O (FT) with alternate functions SPI1_NSS, TIM2_ETR, EVENTOUT, USART2_RX and TIM2_CH1.
51	PC10	bidirectional	5 V tolerant I/O (FT) with alternate function LPUART1_TX.
52	PC11	bidirectional	5 V tolerant I/O (FT) with alternate function LPUART1_RX.
53	PC12	bidirectional	5 V tolerant I/O (FT) with no alternate function listed in the pin definitions table.
54	PD2	bidirectional	5 V tolerant I/O (FT) with alternate function LPUART1_RTS_DE.
55	PB3	bidirectional	5 V tolerant I/O (FT) with alternate functions SPI1_SCK, TIM2_CH2, TSC_G5_IO1 and EVENTOUT, and additional function COMP2_INN.
56	PB4	bidirectional	5 V tolerant I/O (FT) with alternate functions SPI1_MISO, EVENTOUT, TSC_G5_IO2 and TIM22_CH1, and additional function COMP2_INP.
57	PB5	bidirectional	5 V tolerant I/O (FT) with alternate functions SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA and TIM22_CH2, and additional function COMP2_INP.
58	PB6	bidirectional	5 V tolerant, FM+ capable I/O (FTf) with alternate functions USART1_TX, I2C1_SCL, LPTIM1_ETR and TSC_G5_IO3, and additional function COMP2_INP.
59	PB7	bidirectional	5 V tolerant, FM+ capable I/O (FTf) with alternate functions USART1_RX, I2C1_SDA, LPTIM1_IN2 and TSC_G5_IO4, and additional functions COMP2_INP and PVD_IN.
60	BOOT0	input	Dedicated BOOT0 pin (B structure) used for boot mode selection, as described in the boot modes section.
61	PB8	bidirectional	5 V tolerant, FM+ capable I/O (FTf) with alternate functions TSC_SYNC and I2C1_SCL.
62	PB9	bidirectional	5 V tolerant, FM+ capable I/O (FTf) with alternate functions EVENTOUT, I2C1_SDA and SPI2_NSS/I2S2_WS.
63	VSS	power_in	Ground pin for the digital supply domain.
64	VDD	power_in	Digital supply pin; the device operates from a 1.65 V to 3.6 V power supply.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-64(10x10)
Category	Embedded Processors & Controllers
Pins	64

CAD (KiCad official)

Symbol: STM32L052R8T6
Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
3D model files: stm32l052r8t6-etched.step / stm32l052r8t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l052r8t6.step / stm32l052r8t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (143 pp, sha256 501c06e19fb3cdbd, retrieved 2026-10-10, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF