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STM32L052R8H6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), TFBGA-64. Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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STM32L052R8H6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · TFBGA-64

STM32L052R8H6 from STMicroelectronics, in a TFBGA-64. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
A1 PC14-OSC32_IN bidirectional 5 V tolerant I/O (FT) whose additional function is OSC32_IN, the 32 kHz oscillator input.
A2 PC13 bidirectional 5 V tolerant I/O (FT) with additional functions RTC_TAMP1/RTC_TS/RTC_OUT/WKUP2.
A3 PB9 bidirectional 5 V tolerant FM+ capable I/O (FTf) with alternate functions EVENTOUT, I2C1_SDA and SPI2_NSS/I2S2_WS.
A4 PB4 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI1_MISO, EVENTOUT, TSC_G5_IO2 and TIM22_CH1, and additional function COMP2_INP.
A5 PB3 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI1_SCK, TIM2_CH2, TSC_G5I_O1 and EVENTOUT, and additional function COMP2_INN.
A6 PA15 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI1_NSS, TIM2_ETR, EVENTOUT, USART2_RX and TIM2_CH1.
A7 PA14 bidirectional 5 V tolerant I/O (FT) with alternate functions SWCLK and USART2_TX.
A8 PA13 bidirectional 5 V tolerant I/O (FT) with alternate functions SWDIO and USB_NOE.
B1 PC15-OSC32_OUT bidirectional Standard 3.3 V I/O (TC) whose additional function is OSC32_OUT, the 32 kHz oscillator output.
B2 VDD power_in Digital supply pin.
B3 PB8 bidirectional 5 V tolerant FM+ capable I/O (FTf) with alternate functions TSC_SYNC and I2C1_SCL.
B4 BOOT0 input Dedicated BOOT0 pin (I/O structure B) with no alternate functions listed in the pin table.
B5 PD2 bidirectional 5 V tolerant I/O (FT) with alternate function LPUART1_RTS/LPUART1_DE.
B6 PC11 bidirectional 5 V tolerant I/O (FT) with alternate function LPUART1_RX.
B7 PC10 bidirectional 5 V tolerant I/O (FT) with alternate function LPUART1_TX.
B8 PA12 bidirectional 5 V tolerant I/O (FT) powered by VDD_USB (note 3), with alternate functions SPI1_MOSI, EVENTOUT, TSC_G4_IO4, USART1_RTS/USART1_DE and COMP2_OUT, and additional function USB_DP.
C1 PH0-OSC_IN bidirectional Standard 3.3 V I/O (TC) with alternate function USB_CRS_SYNC and additional function OSC_IN.
C2 VSS power_in Digital ground pin.
C3 PB7 bidirectional 5 V tolerant FM+ capable I/O (FTf) with alternate functions USART1_RX, I2C1_SDA, LPTIM1_IN2 and TSC_G5_IO4, and additional functions COMP2_INP and PVD_IN.
C4 PB5 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA and TIM22_CH2, and additional function COMP2_INP.
C5 PC12 bidirectional 5 V tolerant I/O (FT) with no alternate function listed in the pin table.
C6 PA10 bidirectional 5 V tolerant I/O (FT) with alternate functions TSC_G4_IO2 and USART1_RX.
C7 PA9 bidirectional 5 V tolerant I/O (FT) with alternate functions MCO, TSC_G4_IO1 and USART1_TX.
C8 PA11 bidirectional 5 V tolerant I/O (FT) powered by VDD_USB (note 3), with alternate functions SPI1_MISO, EVENTOUT, TSC_G4_IO3, USART1_CTS and COMP1_OUT, and additional function USB_DM.
D1 PH1-OSC_OUT bidirectional Standard 3.3 V I/O (TC) whose additional function is OSC_OUT.
D2 VDD power_in Digital supply pin.
D3 PB6 bidirectional 5 V tolerant FM+ capable I/O (FTf) with alternate functions USART1_TX, I2C1_SCL, LPTIM1_ETR and TSC_G5_IO3, and additional function COMP2_INP.
D4 VSS power_in Digital ground pin.
D5 VSS power_in Digital ground pin.
D6 VSS power_in Digital ground pin.
D7 PA8 bidirectional 5 V tolerant I/O (FT) with alternate functions MCO, USB_CRS_SYNC, EVENTOUT and USART1_CK.
D8 PC9 bidirectional 5 V tolerant I/O (FT) with alternate functions TIM21_ETR, USB_NOE and TSC_G8_IO4.
E1 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor.
E2 PC1 bidirectional 5 V tolerant I/O (FT) with alternate functions LPTIM1_OUT, EVENTOUT and TSC_G7_IO2, and additional function ADC_IN11.
E3 PC0 bidirectional 5 V tolerant I/O (FT) with alternate functions LPTIM1_IN1, EVENTOUT and TSC_G7_IO1, and additional function ADC_IN10.
E4 VDD power_in Digital supply pin.
E5 VDD power_in Digital supply pin.
E6 VDD_USB power_in Supply pin for PA11 and PA12 (note 3); for characteristics that refer to VDD, VDD_USB must be used instead.
E7 PC7 bidirectional 5 V tolerant I/O (FT) with alternate functions TIM22_CH2 and TSC_G8_IO2.
E8 PC8 bidirectional 5 V tolerant I/O (FT) with alternate functions TIM22_ETR and TSC_G8_IO3.
F1 VSSA power_in Analog ground pin.
F2 PC2 bidirectional 5 V tolerant I/O (FT) with alternate functions LPTIM1_IN2, SPI2_MISO/I2S2_MCK and TSC_G7_IO3, and additional function ADC_IN12.
F3 PA2 bidirectional 5 V tolerant I/O (FT) with alternate functions TIM21_CH1, TIM2_CH3, TSC_G1_IO3, USART2_TX and COMP2_OUT, and additional functions COMP2_INM6 and ADC_IN2.
F4 PA5 bidirectional Standard 3.3 V I/O (TC) with alternate functions SPI1_SCK, TIM2_ETR, TSC_G2_IO2 and TIM2_CH1, and additional functions COMP1_INM5, COMP2_INM5 and ADC_IN5.
F5 PB0 bidirectional 5 V tolerant I/O (FT) with alternate functions EVENTOUT and TSC_G3_IO2, and additional functions ADC_IN8 and VREF_OUT.
F6 PC6 bidirectional 5 V tolerant I/O (FT) with alternate functions TIM22_CH1 and TSC_G8_IO1.
F7 PB15 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI2_MOSI/I2S2_SD and additional function RTC_REFIN.
F8 PB14 bidirectional 5 V tolerant FM+ capable I/O (FTf) with alternate functions SPI2_MISO/I2S2_MCK, RTC_OUT, TSC_G6_IO4, LPUART1_RTS/LPUART1_DE, I2C2_SDA and TIM21_CH2.
G1 VREF+ power_in Positive reference voltage pin, shown as a supply pin in the pin table; the ADC decoupling figures show it either not connected to VDDA or connected to VDDA.
G2 PA0 bidirectional Standard 3.3 V I/O (TC) with alternate functions TIM2_CH1, TSC_G1_IO1, USART2_CTS, TIM2_ETR and COMP1_OUT, and additional functions COMP1_INM6, ADC_IN0 and RTC_TAMP2/WKUP1.
G3 PA3 bidirectional 5 V tolerant I/O (FT) with alternate functions TIM21_CH2, TIM2_CH4, TSC_G1_IO4 and USART2_RX, and additional functions COMP2_INP and ADC_IN3.
G4 PA6 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI1_MISO, TSC_G2_IO3, LPUART1_CTS, TIM22_CH1, EVENTOUT and COMP1_OUT, and additional function ADC_IN6.
G5 PB1 bidirectional 5 V tolerant I/O (FT) with alternate functions TSC_G3_IO3 and LPUART1_RTS/LPUART1_DE, and additional functions ADC_IN9 and VREF_OUT.
G6 PB2 bidirectional 5 V tolerant I/O (FT) with alternate functions LPTIM1_OUT and TSC_G3_IO4.
G7 PB10 bidirectional 5 V tolerant I/O (FT) with alternate functions TIM2_CH3, TSC_SYNC, LPUART1_TX, SPI2_SCK and I2C2_SCL.
G8 PB13 bidirectional 5 V tolerant FM+ capable I/O (FTf) with alternate functions SPI2_SCK/I2S2_CK, TSC_G6_IO3, LPUART1_CTS, I2C2_SCL and TIM21_CH1.
H1 VDDA power_in Analog supply pin.
H2 PA1 bidirectional 5 V tolerant I/O (FT) with alternate functions EVENTOUT, TIM2_CH2, TSC_G1_IO2, USART2_RTS/USART2_DE and TIM21_ETR, and additional functions COMP1_INP and ADC_IN1.
H3 PA4 bidirectional Standard 3.3 V I/O (TC) with reduced touch sensing sensitivity (note 2), so it is recommended as a sampling capacitor I/O; alternate functions include SPI1_NSS, TSC_G2_IO1, USART2_CK and TIM22_ETR, and additional functions include COMP1_INM4, COMP2_INM4, ADC_IN4 and DAC_OUT.
H4 PA7 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI1_MOSI, TSC_G2_IO4, TIM22_CH2, EVENTOUT and COMP2_OUT, and additional function ADC_IN7.
H5 PC4 bidirectional 5 V tolerant I/O (FT) with alternate functions EVENTOUT and LPUART1_TX, and additional function ADC_IN14.
H6 PC5 bidirectional 5 V tolerant I/O (FT) with alternate functions LPUART1_RX and TSC_G3_IO1, and additional function ADC_IN15.
H7 PB11 bidirectional 5 V tolerant I/O (FT) with alternate functions EVENTOUT, TIM2_CH4, TSC_G6_IO1, LPUART1_RX and I2C2_SDA.
H8 PB12 bidirectional 5 V tolerant I/O (FT) with alternate functions SPI2_NSS/I2S2_WS, LPUART1_RTS/LPUART1_DE, TSC_G6_IO2, I2C2_SMBA and EVENTOUT.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TFBGA-64
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32L052R8H6
  • Footprint: Package_BGA:TFBGA-64_5x5mm_Layout8x8_P0.5mm
  • 3D model: TFBGA-64 (KiCad packages3D, STEP)
  • 3D model files: stm32l052r8h6-etched.step / stm32l052r8h6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l052r8h6.step / stm32l052r8h6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (150 pp, sha256 ccec04f26ebfb036, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF