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STM32L052K8U3

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFQFPN-32(5x5)

STM32L052K8U3 from STMicroelectronics, in a UFQFPN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in MCU digital supply pin; the features list gives the device supply range as 1.65 V to 3.6 V.
2 PC14-OSC32_IN bidirectional 5 V tolerant FT I/O (PC14), also the 32 kHz LSE oscillator input OSC32_IN.
3 PC15-OSC32_OUT bidirectional Standard 3.3 V TC I/O (PC15), also the 32 kHz LSE oscillator output OSC32_OUT.
4 NRST bidirectional Bidirectional reset pin with an embedded weak pull-up resistor.
5 VDDA power_in Analog supply pin; the features list gives ADC operation down to 1.65 V and DAC operation down to 1.8 V.
6 PA0 bidirectional Standard 3.3 V TC I/O that also provides ADC_IN0, COMP1_INM6 and RTC_TAMP2/WKUP1, with alternate functions TIM2_CH1, USART2_CTS and COMP1_OUT.
7 PA1 bidirectional 5 V tolerant FT I/O that also provides ADC_IN1 and COMP1_INP, with alternate functions TIM2_CH2, USART2_RTS/USART2_DE and TIM21_ETR.
8 PA2 bidirectional 5 V tolerant FT I/O that also provides ADC_IN2 and COMP2_INM6, with alternate functions TIM21_CH1, TIM2_CH3, USART2_TX and COMP2_OUT.
9 PA3 bidirectional 5 V tolerant FT I/O that also provides ADC_IN3 and COMP2_INP, with alternate functions TIM21_CH2, TIM2_CH4 and USART2_RX.
10 PA4 bidirectional Standard 3.3 V TC I/O with reduced touch sensing sensitivity, recommended for use as a sampling capacitor I/O; also provides ADC_IN4 and DAC_OUT.
11 PA5 bidirectional Standard 3.3 V TC I/O that also provides ADC_IN5, with alternate functions SPI1_SCK, TIM2_ETR, TSC_G2_IO2 and TIM2_CH1.
12 PA6 bidirectional 5 V tolerant FT I/O that also provides ADC_IN6, with alternate functions SPI1_MISO, LPUART1_CTS, TIM22_CH1 and COMP1_OUT.
13 PA7 bidirectional 5 V tolerant FT I/O that also provides ADC_IN7, with alternate functions SPI1_MOSI, TIM22_CH2 and COMP2_OUT.
14 PB0 bidirectional 5 V tolerant FT I/O that also provides ADC_IN8 and VREF_OUT, with alternate functions EVENTOUT and TSC_G3_IO2.
15 PB1 bidirectional 5 V tolerant FT I/O that also provides ADC_IN9 and VREF_OUT, with alternate functions TSC_G3_IO3 and LPUART1_RTS/LPUART1_DE.
16 PB2 bidirectional 5 V tolerant FT I/O with alternate functions LPTIM1_OUT and TSC_G3_IO4.
17 VDD power_in MCU digital supply pin; the features list gives the device supply range as 1.65 V to 3.6 V.
18 PA8 bidirectional 5 V tolerant FT I/O with alternate functions MCO, USB_CRS_SYNC, EVENTOUT and USART1_CK.
19 PA9 bidirectional 5 V tolerant FT I/O with alternate functions MCO, TSC_G4_IO1 and USART1_TX.
20 PA10 bidirectional 5 V tolerant FT I/O with alternate functions TSC_G4_IO2 and USART1_RX.
21 PA11 bidirectional 5 V tolerant FT I/O powered by VDD_USB (table note 3), with additional function USB_DM and alternate functions SPI1_MISO, USART1_CTS and COMP1_OUT.
22 PA12 bidirectional 5 V tolerant FT I/O powered by VDD_USB (table note 3), with additional function USB_DP and alternate functions SPI1_MOSI, USART1_RTS/USART1_DE and COMP2_OUT.
23 PA13 bidirectional 5 V tolerant FT I/O with alternate functions SWDIO (serial wire debug data) and USB_NOE.
24 PA14 bidirectional 5 V tolerant FT I/O with alternate functions SWCLK (serial wire debug clock) and USART2_TX.
25 PA15 bidirectional 5 V tolerant FT I/O with alternate functions SPI1_NSS, TIM2_ETR, EVENTOUT, USART2_RX and TIM2_CH1.
26 PB3 bidirectional 5 V tolerant FT I/O with alternate functions SPI1_SCK, TIM2_CH2, TSC_G5_IO1 and EVENTOUT, and additional function COMP2_INN.
27 PB4 bidirectional 5 V tolerant FT I/O with alternate functions SPI1_MISO, EVENTOUT, TSC_G5_IO2 and TIM22_CH1, and additional function COMP2_INP.
28 PB5 bidirectional 5 V tolerant FT I/O with alternate functions SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA and TIM22_CH2, and additional function COMP2_INP.
29 PB6 bidirectional 5 V tolerant FTf I/O (FM+ capable) with alternate functions USART1_TX, I2C1_SCL, LPTIM1_ETR and TSC_G5_IO3, and additional function COMP2_INP.
30 PB7 bidirectional 5 V tolerant FTf I/O (FM+ capable) with alternate functions USART1_RX, I2C1_SDA, LPTIM1_IN2 and TSC_G5_IO4, and additional functions COMP2_INP and PVD_IN.
31 BOOT0 input Dedicated BOOT0 pin (B structure) used for boot mode selection; the extracted text gives no level or timing limits for it.
32 PB8 bidirectional 5 V tolerant FTf I/O (FM+ capable) with alternate functions TSC_SYNC and I2C1_SCL.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package UFQFPN-32(5x5)
Category Embedded Processors & Controllers
Pins 33

CAD (KiCad official)

  • Symbol: STM32L052K8U3
  • Footprint: Package_DFN_QFN:UFQFPN-32-1EP_5x5mm_P0.5mm_EP3.5x3.5mm
  • 3D model: UFQFPN-32(5x5) (KiCad packages3D, STEP)
  • 3D model files: stm32l052k8u3-etched.step / stm32l052k8u3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l052k8u3.step / stm32l052k8u3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (150 pp, sha256 ccec04f26ebfb036, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF