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README

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STM32L052C8U6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFQFPN-48(7x7)

STM32L052C8U6 from STMicroelectronics, in a UFQFPN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Digital supply pin for the core and I/Os; the features list the device power supply as 1.65 V to 3.6 V.
2 PC13 bidirectional 5 V tolerant (FT) GPIO, floating input after reset, with additional functions RTC_TAMP1, RTC_TS, RTC_OUT and WKUP2.
3 PC14-OSC32_IN bidirectional 5 V tolerant (FT) GPIO, floating input after reset, which is also the 32 kHz oscillator input OSC32_IN.
4 PC15-OSC32_OUT bidirectional Standard 3.3 V (TC) GPIO, floating input after reset, which is also the 32 kHz oscillator output OSC32_OUT.
5 PH0-OSC_IN bidirectional Standard 3.3 V (TC) GPIO, which is also the HSE oscillator input OSC_IN and has alternate function USB_CRS_SYNC.
6 PH1-OSC_OUT bidirectional Standard 3.3 V (TC) GPIO, which is also the HSE oscillator output OSC_OUT.
7 NRST bidirectional Bidirectional reset pin with an embedded weak pull-up resistor.
8 VSSA power_in Analog ground pin; the datasheet references all voltages to VSS.
9 VDDA power_in Analog supply pin for the analog blocks; the features list the ADC and comparators down to 1.65 V and the DAC down to 1.8 V.
10 PA0 bidirectional Standard 3.3 V (TC) GPIO with alternate functions TIM2_CH1, USART2_CTS and COMP1_OUT, and analog inputs ADC_IN0 and COMP1_INM6.
11 PA1 bidirectional 5 V tolerant (FT) GPIO with alternate functions TIM2_CH2, USART2_RTS/USART2_DE and TIM21_ETR, and analog inputs ADC_IN1 and COMP1_INP.
12 PA2 bidirectional 5 V tolerant (FT) GPIO with alternate functions TIM21_CH1, TIM2_CH3, USART2_TX and COMP2_OUT, and analog inputs ADC_IN2 and COMP2_INM6.
13 PA3 bidirectional 5 V tolerant (FT) GPIO with alternate functions TIM21_CH2, TIM2_CH4 and USART2_RX, and analog inputs ADC_IN3 and COMP2_INP.
14 PA4 bidirectional Standard 3.3 V (TC) GPIO with reduced touch sensing sensitivity (note 2, recommended as sampling capacitor I/O), with alternate functions SPI1_NSS, USART2_CK and TIM22_ETR, and analog input ADC_IN4 and DAC_OUT.
15 PA5 bidirectional Standard 3.3 V (TC) GPIO with alternate functions SPI1_SCK, TIM2_ETR and TIM2_CH1, and analog inputs ADC_IN5, COMP1_INM5 and COMP2_INM5.
16 PA6 bidirectional 5 V tolerant (FT) GPIO with alternate functions SPI1_MISO, LPUART1_CTS, TIM22_CH1, EVENTOUT and COMP1_OUT, and analog input ADC_IN6.
17 PA7 bidirectional 5 V tolerant (FT) GPIO with alternate functions SPI1_MOSI, TIM22_CH2, EVENTOUT and COMP2_OUT, and analog input ADC_IN7.
18 PB0 bidirectional 5 V tolerant (FT) GPIO with alternate functions EVENTOUT and TSC_G3_IO2, and analog input ADC_IN8 and VREF_OUT.
19 PB1 bidirectional 5 V tolerant (FT) GPIO with alternate functions TSC_G3_IO3 and LPUART1_RTS/LPUART1_DE, and analog input ADC_IN9 and VREF_OUT.
20 PB2 bidirectional 5 V tolerant (FT) GPIO with alternate functions LPTIM1_OUT and TSC_G3_IO4.
21 PB10 bidirectional 5 V tolerant (FT) GPIO with alternate functions TIM2_CH3, TSC_SYNC, LPUART1_TX, SPI2_SCK and I2C2_SCL.
22 PB11 bidirectional 5 V tolerant (FT) GPIO with alternate functions EVENTOUT, TIM2_CH4, TSC_G6_IO1, LPUART1_RX and I2C2_SDA.
23 VSS power_in Ground pin for the digital supply domain.
24 VDD power_in Digital supply pin for the core and I/Os; the features list the device power supply as 1.65 V to 3.6 V.
25 PB12 bidirectional 5 V tolerant (FT) GPIO with alternate functions SPI2_NSS/I2S2_WS, LPUART1_RTS/LPUART1_DE, TSC_G6_IO2, I2C2_SMBA and EVENTOUT.
26 PB13 bidirectional 5 V tolerant, FM+ capable (FTf) GPIO with alternate functions SPI2_SCK/I2S2_CK, TSC_G6_IO3, LPUART1_CTS, I2C2_SCL and TIM21_CH1.
27 PB14 bidirectional 5 V tolerant, FM+ capable (FTf) GPIO with alternate functions SPI2_MISO/I2S2_MCK, RTC_OUT, TSC_G6_IO4, LPUART1_RTS/LPUART1_DE, I2C2_SDA and TIM21_CH2.
28 PB15 bidirectional 5 V tolerant (FT) GPIO with alternate function SPI2_MOSI/I2S2_SD and additional function RTC_REFIN.
29 PA8 bidirectional 5 V tolerant (FT) GPIO with alternate functions MCO, USB_CRS_SYNC, EVENTOUT and USART1_CK.
30 PA9 bidirectional 5 V tolerant (FT) GPIO with alternate functions MCO, TSC_G4_IO1 and USART1_TX.
31 PA10 bidirectional 5 V tolerant (FT) GPIO with alternate functions TSC_G4_IO2 and USART1_RX.
32 PA11 bidirectional 5 V tolerant (FT) GPIO powered by VDD_USB (note 3), with alternate functions SPI1_MISO, EVENTOUT, TSC_G4_IO3, USART1_CTS and COMP1_OUT, and additional function USB_DM.
33 PA12 bidirectional 5 V tolerant (FT) GPIO powered by VDD_USB (note 3), with alternate functions SPI1_MOSI, EVENTOUT, TSC_G4_IO4, USART1_RTS/USART1_DE and COMP2_OUT, and additional function USB_DP.
34 PA13 bidirectional 5 V tolerant (FT) GPIO with alternate function SWDIO and additional function USB_NOE.
35 VSS power_in Ground pin for the digital supply domain.
36 VDD_USB power_in Supply pin for the USB-related I/Os PA11 and PA12; per note 3, characteristics that refer to VDD must use VDD_USB for these pins.
37 PA14 bidirectional 5 V tolerant (FT) GPIO with alternate functions SWCLK and USART2_TX.
38 PA15 bidirectional 5 V tolerant (FT) GPIO with alternate functions SPI1_NSS, TIM2_ETR, EVENTOUT, USART2_RX and TIM2_CH1.
39 PB3 bidirectional 5 V tolerant (FT) GPIO with alternate functions SPI1_SCK, TIM2_CH2 and EVENTOUT, a touch sensing group 5 signal, and additional function COMP2_INN.
40 PB4 bidirectional 5 V tolerant (FT) GPIO with alternate functions SPI1_MISO, EVENTOUT, TSC_G5_IO2 and TIM22_CH1, and additional function COMP2_INP.
41 PB5 bidirectional 5 V tolerant (FT) GPIO with alternate functions SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA and TIM22_CH2, and additional function COMP2_INP.
42 PB6 bidirectional 5 V tolerant, FM+ capable (FTf) GPIO with alternate functions USART1_TX, I2C1_SCL, LPTIM1_ETR and TSC_G5_IO3, and additional function COMP2_INP.
43 PB7 bidirectional 5 V tolerant, FM+ capable (FTf) GPIO with alternate functions USART1_RX, I2C1_SDA, LPTIM1_IN2 and TSC_G5_IO4, and additional functions COMP2_INP and PVD_IN.
44 BOOT0 input Dedicated BOOT0 pin (I/O structure B) used to select the boot mode.
45 PB8 bidirectional 5 V tolerant, FM+ capable (FTf) GPIO with alternate functions TSC_SYNC and I2C1_SCL.
46 PB9 bidirectional 5 V tolerant, FM+ capable (FTf) GPIO with alternate functions EVENTOUT, I2C1_SDA and SPI2_NSS/I2S2_WS.
47 VSS power_in Ground pin for the digital supply domain.
48 VDD power_in Digital supply pin for the core and I/Os; the features list the device power supply as 1.65 V to 3.6 V.
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package UFQFPN-48(7x7)
Category Embedded Processors & Controllers
Pins 49

CAD (KiCad official)

  • Symbol: STM32L052C8U6
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: UFQFPN-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32l052c8u6-etched.step / stm32l052c8u6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l052c8u6.step / stm32l052c8u6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (150 pp, sha256 8fdd784104b88c64, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF