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STM32L031C4T6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM32L031C4T6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PC0 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions LPTIM1_IN1, EVENTOUT and LPUART1_RX.
2 PC13 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate function ANTI_TAMP and additional function TAMP1/WKUP2.
3 PC14-OSC32_IN bidirectional General-purpose I/O with standard 3.3 V (TC) structure; its additional function is the OSC32_IN low-speed oscillator input.
4 PC15-OSC32_OUT bidirectional General-purpose I/O with standard 3.3 V (TC) structure; its additional function is the OSC32_OUT low-speed oscillator output.
5 PH0-OSC_IN bidirectional I/O with standard 3.3 V (TC) structure; its alternate function is OSC_IN, the high-speed oscillator input.
6 PH1-OSC_OUT bidirectional I/O with standard 3.3 V (TC) structure; its alternate function is OSC_OUT, the high-speed oscillator output.
7 NRST bidirectional Bidirectional reset pin with an embedded weak pull-up resistor.
8 VSSA power_in Analog ground pin for the analog peripherals.
9 VDDA power_in Analog supply pin for the analog peripherals; the datasheet gives a minimum VDDA of 1.65 V.
10 PA0 bidirectional General-purpose I/O with standard 3.3 V (TC) structure; alternate functions include LPTIM1_IN1, TIM2_CH1, USART2_CTS, TIM2_ETR and COMP1_OUT, and additional functions COMP1_INM6, ADC_IN0 and RTC_TAMP2/WKUP1.
11 PA1 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include EVENTOUT, LPTIM1_IN2, TIM2_CH2, I2C1_SMBA, USART2_RTS/USART2_DE and TIM21_ETR, and additional functions COMP1_INP and ADC_IN1.
12 PA2 bidirectional General-purpose I/O with standard 3.3 V (TC) structure; alternate functions include TIM21_CH1, TIM2_CH3, USART2_TX, LPUART1_TX and COMP2_OUT, and additional functions COMP2_INM6, ADC_IN2 and RTC_TAMP3/RTC_TS/RTC_OUT/WKUP3.
13 PA3 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include TIM21_CH2, TIM2_CH4, USART2_RX and LPUART1_RX, and additional functions COMP2_INP and ADC_IN3.
14 PA4 bidirectional General-purpose I/O with standard 3.3 V (TC) structure; alternate functions include SPI1_NSS, LPTIM1_IN1, USART2_CK and TIM22_ETR, and additional functions COMP1_INM4, COMP2_INM4 and ADC_IN4.
15 PA5 bidirectional General-purpose I/O with standard 3.3 V (TC) structure; alternate functions include SPI1_SCK, LPTIM1_IN2, TIM2_ETR and TIM2_CH1, and additional functions COMP1_INM5, COMP2_INM5 and ADC_IN5.
16 PA6 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include SPI1_MISO, LPTIM1_ETR, LPUART1_CTS, TIM22_CH1, EVENTOUT and COMP1_OUT, and additional function ADC_IN6.
17 PA7 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include SPI1_MOSI, LPTIM1_OUT, USART2_CTS, TIM22_CH2, EVENTOUT and COMP2_OUT, and additional function ADC_IN7.
18 PB0 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include EVENTOUT, SPI1_MISO, USART2_RTS/USART2_DE and TIM2_CH3, and additional functions ADC_IN8 and VREF_OUT.
19 PB1 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include USART2_CK, SPI1_MOSI, LPUART1_RTS/LPUART1_DE and TIM2_CH4, and additional functions ADC_IN9 and VREF_OUT.
20 PB2 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate function is LPTIM1_OUT.
21 PB10 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include TIM2_CH3 and LPUART1_TX.
22 PB11 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include EVENTOUT, TIM2_CH4 and LPUART1_RX.
23 VSS power_in Ground pin of the digital supply domain.
24 VDD power_in Digital supply pin; the device operates from a 1.65 V to 3.6 V power supply.
25 PB12 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include SPI1_NSS and EVENTOUT.
26 PB13 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include SPI1_SCK, MCO, TIM21_CH1 and LPUART1_CTS.
27 PB14 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include SPI1_MISO, RTC_OUT, TIM21_CH2 and LPUART1_RTS/LPUART1_DE.
28 PB15 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include SPI1_MOSI and RTC_REFIN.
29 PA8 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include MCO, LPTIM1_IN1, EVENTOUT, USART2_CK and TIM2_CH1.
30 PA9 bidirectional Fast Mode Plus capable 5 V tolerant I/O (FTf); alternate functions include MCO, I2C1_SCL, USART2_TX and TIM22_CH1.
31 PA10 bidirectional Fast Mode Plus capable 5 V tolerant I/O (FTf); alternate functions include I2C1_SDA, USART2_RX and TIM22_CH2.
32 PA11 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include SPI1_MISO, EVENTOUT, USART2_CTS, TIM21_CH2 and COMP1_OUT.
33 PA12 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include SPI1_MOSI, EVENTOUT, USART2_RTS/USART2_DE and COMP2_OUT.
34 PA13 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include SWDIO, LPTIM1_ETR and LPUART1_RX.
35 VSS power_in Ground pin of the digital supply domain.
36 VDD power_in Digital supply pin; the device operates from a 1.65 V to 3.6 V power supply.
37 PA14 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include SWCLK, LPTIM1_OUT, I2C1_SMBA, USART2_TX and LPUART1_TX.
38 PA15 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include SPI1_NSS, TIM2_ETR, EVENTOUT, USART2_RX and TIM2_CH1.
39 PB3 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include SPI1_SCK, TIM2_CH2 and EVENTOUT, and additional function COMP2_INN.
40 PB4 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include SPI1_MISO, EVENTOUT and TIM22_CH1, and additional function COMP2_INP.
41 PB5 bidirectional General-purpose I/O with 5 V tolerant (FT) structure; alternate functions include SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA and TIM22_CH2, and additional function COMP2_INP.
42 PB6 bidirectional Fast Mode Plus capable 5 V tolerant I/O (FTf); alternate functions include USART2_TX, I2C1_SCL, LPTIM1_ETR and TIM21_CH1, and additional function COMP2_INP.
43 PB7 bidirectional Fast Mode Plus capable 5 V tolerant I/O (FTf); alternate functions include USART2_RX, I2C1_SDA and LPTIM1_IN2, and additional functions COMP2_INP and VREF_PVD_IN.
44 BOOT0 input Dedicated BOOT0 pin used for boot mode selection.
45 PB8 bidirectional Fast Mode Plus capable 5 V tolerant I/O (FTf); alternate function is I2C1_SCL.
46 PB9 bidirectional Fast Mode Plus capable 5 V tolerant I/O (FTf); alternate functions include EVENTOUT and I2C1_SDA.
47 VSS power_in Ground pin of the digital supply domain.
48 VDD power_in Digital supply pin; the device operates from a 1.65 V to 3.6 V power supply.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

CAD (KiCad official)

  • Symbol: STM32L031C4T6
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32l031c4t6-etched.step / stm32l031c4t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l031c4t6.step / stm32l031c4t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (126 pp, sha256 9726c48418e03f62, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF