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STM32L021K4T6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)

STM32L021K4T6 from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Digital power supply; the device operates from 1.65 V to 3.6 V according to the features list.
2 PC14-OSC32_IN bidirectional 5 V tolerant (FT) I/O, default function PC14, with additional function OSC32_IN.
3 PC15-OSC32_OUT bidirectional Standard 3.3 V I/O (TC structure), default function PC15, with additional function OSC32_OUT.
4 NRST bidirectional Active-low bidirectional reset pin with embedded weak pull-up; acts as device reset input and internal reset output.
5 VDDA power_in Analog power supply.
6 PA0 bidirectional 3.3 V tolerant I/O directly connected to the ADC (TTa structure), with ADC_IN0, COMP1_INM and RTC_TAMP2/WKUP1 as additional functions.
7 PA1 bidirectional 5 V tolerant (FT) I/O, with ADC_IN1 and COMP1_INP as additional functions.
8 PA2 bidirectional 3.3 V tolerant I/O directly connected to the ADC (TTa structure), with ADC_IN2, COMP2_INM and RTC_TAMP3/WKUP3 as additional functions.
9 PA3 bidirectional 5 V tolerant (FT) I/O, with COMP2_INP and ADC_IN3 as additional functions.
10 PA4 bidirectional 3.3 V tolerant I/O directly connected to the ADC (TTa structure), with COMP1_INM, COMP2_INM and ADC_IN4 as additional functions.
11 PA5 bidirectional 3.3 V tolerant I/O directly connected to the ADC (TTa structure), with COMP1_INM, COMP2_INM and ADC_IN5 as additional functions.
12 PA6 bidirectional 5 V tolerant (FT) I/O, with ADC_IN6 as additional function.
13 PA7 bidirectional 5 V tolerant (FT) I/O, with COMP2_INP and ADC_IN7 as additional functions.
14 PB0 bidirectional 5 V tolerant (FT) I/O, with ADC_IN8 and VREF_OUT as additional functions.
15 PB1 bidirectional 5 V tolerant (FT) I/O, with ADC_IN9 and VREF_OUT as additional functions.
16 VSS power_in Digital and analog ground.
17 VDD power_in Digital power supply.
18 PA8 bidirectional 5 V tolerant (FT) I/O with alternate functions MCO, LPTIM1_IN1, EVENTOUT, USART2_CK and TIM2_CH1.
19 PA9 bidirectional 5 V tolerant (FTf) I/O that is Fast Mode Plus capable, with alternate functions MCO, I2C1_SCL, LPTIM1_OUT, USART2_TX, TIM21_CH2 and COMP1_OUT.
20 PA10 bidirectional 5 V tolerant (FTf) I/O that is Fast Mode Plus capable, with alternate functions TIM21_CH1, I2C1_SDA, RTC_REFIN, USART2_RX, TIM2_CH3 and COMP1_OUT.
21 PA11 bidirectional 5 V tolerant (FT) I/O, with alternate functions SPI1_MISO, LPTIM1_OUT, EVENTOUT, USART2_CTS, TIM21_CH2 and COMP1_OUT.
22 PA12 bidirectional 5 V tolerant (FT) I/O, with alternate functions SPI1_MOSI, EVENTOUT, USART2_RTS_DE and COMP2_OUT.
23 PA13 bidirectional 5 V tolerant (FTf) I/O that is Fast Mode Plus capable, with alternate function SWDIO and others including LPTIM1_ETR, I2C1_SDA, SPI1_SCK, LPUART1_RX and COMP1_OUT.
24 PA14 bidirectional 5 V tolerant (FT) I/O, with alternate function SWCLK and others including LPTIM1_OUT, I2C1_SMBA, USART2_TX, SPI1_MISO, LPUART1_TX and COMP2_OUT.
25 PA15 bidirectional 5 V tolerant (FT) I/O, with alternate functions SPI1_NSS, TIM2_ETR, EVENTOUT, USART2_RX and TIM2_CH1.
26 PB3 bidirectional 5 V tolerant (FT) I/O, with alternate functions SPI1_SCK, TIM2_CH2, EVENTOUT and COMP2_INM.
27 PB4 bidirectional 5 V tolerant (FT) I/O, with alternate functions SPI1_MISO and EVENTOUT, and COMP2_INP as additional function.
28 PB5 bidirectional 5 V tolerant (FT) I/O, with alternate functions SPI1_MOSI, LPTIM1_IN1, I2C1_SMBA and TIM21_CH1, and COMP2_INP as additional function.
29 PB6 bidirectional 5 V tolerant (FTf) I/O that is Fast Mode Plus capable, with alternate functions USART2_TX, I2C1_SCL, LPTIM1_ETR, TIM2_CH3 and LPUART1_TX, and COMP2_INP as additional function.
30 PB7 bidirectional 5 V tolerant (FTf) I/O that is Fast Mode Plus capable, with alternate functions USART2_RX, I2C1_SDA, LPTIM1_IN2, TIM2_CH4 and LPUART1_RX, and COMP2_INP and VREF_PVD_IN as additional functions.
31 PB9-BOOT0 input Dedicated BOOT0 pin (B structure) used for boot memory selection.
32 VSS power_in Digital and analog ground.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-32(7x7)
Category Embedded Processors & Controllers
Pins 32

CAD (KiCad official)

  • Symbol: STM32L021K4T6
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32l021k4t6-etched.step / stm32l021k4t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32l021k4t6.step / stm32l021k4t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (114 pp, sha256 97b23667dad711b9, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF