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Contents

README

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STM32H7B0RBT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32H7B0RBT6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup domain supply for RTC, LSE oscillator and backup registers; 1.62-3.6 V.
2 PC13 bidirectional 5 V-tolerant GPIO; additional functions TAMP_IN1/OUT2/OUT3, RTC_OUT1/TS, WKUP2; floating input after reset.
3 PC14-OSC32_IN bidirectional 5 V-tolerant GPIO; serves as LSE oscillator input (OSC32_IN) when 32.768 kHz crystal is used; floating input after reset.
4 PC15-OSC32_OUT bidirectional 5 V-tolerant GPIO; serves as LSE oscillator output (OSC32_OUT) when 32.768 kHz crystal is used; floating input after reset.
5 PH0-OSC_IN bidirectional 5 V-tolerant GPIO; serves as HSE oscillator input (OSC_IN) for external 4-50 MHz crystal; floating input after reset.
6 PH1-OSC_OUT bidirectional 5 V-tolerant GPIO; serves as HSE oscillator output (OSC_OUT); floating input after reset.
7 NRST bidirectional Active-low bidirectional reset pin with embedded weak pull-up resistor; minimum valid reset pulse width 100 µs.
8 PC0 bidirectional 5 V-tolerant analog GPIO with ADC12_INP10; alternate functions include DFSDM1_CKIN0, SAI2_FS_B, OTG_HS_ULPI_STP, FMC_SDNWE, LCD_G2/R5.
9 PC1 bidirectional 5 V-tolerant analog GPIO with ADC12_INP11/INN10; alternate functions include TRACED0, SPI2_MOSI/I2S2_SDO, SAI1_SD_A, SDMMC2_CK, OCTOSPIM_P1_IO4, MDIOS_MDC.
10 PC2 bidirectional 5 V-tolerant analog GPIO with ADC12_INP12, PWR_CSTOP; alternate functions include SPI2_MISO/I2S2_SDI, DFSDM1_CKOUT, OCTOSPIM_P1_IO2/IO5, FMC_SDNE0.
11 PC3 bidirectional 5 V-tolerant analog GPIO with ADC12_INP13, PWR_CSLEEP; alternate functions include SPI2_MOSI/I2S2_SDO, OCTOSPIM_P1_IO0/IO6, FMC_SDCKE0.
12 VSSA power_in Analog ground reference for ADC, DAC, COMP, and OPAMP; must be connected to the same potential as VSS with filtering capacitors.
13 VDDA power_in Analog supply for ADC/DAC/COMP/OPAMP/VREFBUF; 1.62-3.6 V (min 1.8 V for DAC and VREFBUF, 2.0 V for OPAMP); no separate VREF+ in this package.
14 PA0 bidirectional 5 V-tolerant analog GPIO with ADC1_INP16, WKUP0; alternate functions include TIM2_CH1/ETR, TIM5_CH1, TIM8_ETR, UART4_TX, SDMMC2_CMD, SAI2_SD_B.
15 PA1 bidirectional 5 V-tolerant GPIO with ADC1_INP17; alternate functions include TIM2_CH2, TIM5_CH2, LPTIM3_OUT, USART2_RTS, UART4_RX, OCTOSPIM_P1_IO3/DQS, SAI2_MCK_B, LCD_R2.
16 PA2 bidirectional 5 V-tolerant analog GPIO with ADC1_INP14, WKUP1; alternate functions include TIM2_CH3, TIM5_CH3, TIM15_CH1, USART2_TX, SAI2_SCK_B, MDIOS_MDIO, LCD_R1.
17 PA3 bidirectional 5 V-tolerant GPIO with ADC1_INP15; alternate functions include TIM2_CH4, TIM5_CH4, OCTOSPIM_P1_CLK, TIM15_CH2, USART2_RX, OTG_HS_ULPI_D0, LCD_B2/B5.
18 VSS power_in Digital ground; each VSS pin must be decoupled with 100 nF capacitor on the adjacent VDD pin.
19 VDD power_in Main digital supply, 1.62-3.6 V; 100 nF decoupling capacitor required on each VDD pin per AN5307.
20 PA4 bidirectional 3.3 V-tolerant analog GPIO with ADC1_INP18, DAC1_OUT1; alternate functions include TIM5_ETR, SPI1/3/6_NSS/I2Sx_WS, USART2_CK, DCMI_HSYNC/PSSI_DE, LCD_VSYNC.
21 PA5 bidirectional 3.3 V-tolerant GPIO with ADC1_INP19, DAC1_OUT2, PWR_NDSTOP2; alternate functions include TIM2_CH1/ETR, TIM8_CH1N, SPI1/6_SCK, OTG_HS_ULPI_CK, LCD_R4.
22 PA6 bidirectional 3.3 V-tolerant GPIO with ADC12_INP3, DAC2_OUT1; alternate functions include TIM1/8_BKIN, TIM3_CH1, SPI1/6_MISO, OCTOSPIM_P1_IO3, TIM13_CH1, MDIOS_MDC, LCD_G2.
23 PA7 bidirectional 5 V-tolerant analog GPIO with ADC12_INP7, OPAMP1_VINM; alternate functions include TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1/6_MOSI, TIM14_CH1, OCTOSPIM_P1_IO2, LCD_VSYNC.
24 PC4 bidirectional 5 V-tolerant analog GPIO with ADC12_INP4, OPAMP1_VOUT, COMP1_INM; alternate functions include DFSDM1_CKIN2, I2S1_MCK, SPDIFRX1_IN2, FMC_SDNE0, LCD_R7.
25 PC5 bidirectional 5 V-tolerant GPIO with ADC12_INP8, OPAMP1_VINM; alternate functions include SAI1_D3, DFSDM1_DATIN2, SPDIFRX1_IN3, OCTOSPIM_P1_DQS, FMC_SDCKE0, COMP1_OUT, LCD_DE.
26 PB0 bidirectional 5 V-tolerant GPIO with ADC12_INP9, OPAMP1_VINP, COMP1_INP; alternate functions include TIM1/3/8 CH2N/CH3/CH2N, UART4_CTS, OTG_HS_ULPI_D1, OCTOSPIM_P1_IO1, LCD_R3/G1.
27 PB1 bidirectional 5 V-tolerant GPIO with ADC12_INP5, COMP1_INM; alternate functions include TIM1_CH3N, TIM3_CH4, TIM8_CH3N, DFSDM1_DATIN1, OTG_HS_ULPI_D2, OCTOSPIM_P1_IO0, LCD_R6/G0.
28 PB2 bidirectional 5 V-tolerant GPIO with COMP1_INP; alternate functions include RTC_OUT2, SAI1_D1/SD_A, DFSDM1_CKIN1, SPI3_MOSI/I2S3_SDO, OCTOSPIM_P1_CLK/DQS.
29 PB10 bidirectional 5 V-tolerant I2C FM+ GPIO; alternate functions include TIM2_CH3, LPTIM2_IN1, I2C2_SCL, SPI2_SCK/I2S2_CK, DFSDM1_DATIN7, USART3_TX, OCTOSPIM_P1_NCS, OTG_HS_ULPI_D3, LCD_G4.
30 VCAP passive Internal LDO core voltage output (VCORE 0.95-1.35 V depending on VOS0-VOS3); connect 2.2 µF low-ESR ceramic capacitor to VSS.
31 VSS power_in Digital ground.
32 VDD power_in Main digital supply, 1.62-3.6 V; 100 nF decoupling capacitor required.
33 PB12 bidirectional 5 V-tolerant GPIO; alternate functions include TIM1_BKIN, OCTOSPIM_P1_NCLK, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, FDCAN2_RX, OTG_HS_ULPI_D5, DFSDM2_DATIN1, UART5_RX.
34 PB13 bidirectional 5 V-tolerant GPIO; alternate functions include TIM1_CH1N, LPTIM2_OUT, SPI2_SCK/I2S2_CK, USART3_CTS/NSS, FDCAN2_TX, OTG_HS_ULPI_D6, SDMMC1_D0, UART5_TX.
35 PB14 bidirectional 5 V-tolerant GPIO; alternate functions include TIM1_CH2N, TIM12_CH1, TIM8_CH2N, USART1_TX, SPI2_MISO/I2S2_SDI, USART3_RTS, UART4_RTS, SDMMC2_D0, LCD_CLK.
36 PB15 bidirectional 5 V-tolerant GPIO; alternate functions include RTC_REFIN, TIM1_CH3N, TIM12_CH2, TIM8_CH3N, USART1_RX, SPI2_MOSI/I2S2_SDO, DFSDM1_CKIN2, SDMMC2_D1, LCD_G7.
37 PC6 bidirectional 5 V-tolerant GPIO with SWPMI_IO additional function; alternate functions include TIM3_CH1, TIM8_CH1, I2S2_MCK, USART6_TX, SDMMC1_D0DIR, FMC_NWAIT, SDMMC1/2_D6, LCD_HSYNC.
38 PC7 bidirectional 5 V-tolerant GPIO; alternate functions include TRGIO, TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, SDMMC1_D123DIR, FMC_NE1, SDMMC1/2_D7, SWPMI_TX, LCD_G6.
39 PC9 bidirectional 5 V-tolerant I2C FM+ GPIO; alternate functions include MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, OCTOSPIM_P1_IO0, SWPMI_SUSPEND, SDMMC1_D1, LCD_G3/B2.
40 PA8 bidirectional 5 V-tolerant I2C FM+ GPIO; alternate functions include MCO1, TIM1_CH1, TIM8_BKIN2, I2C3_SCL, USART1_CK, OTG_HS_SOF, UART7_RX, LCD_B3/R6.
41 PA9 bidirectional 5 V-tolerant USB-domain GPIO with OTG_HS_VBUS additional function; alternate functions include TIM1_CH2, LPUART1_TX, I2C3_SMBA, SPI2_SCK, USART1_TX, DCMI_D0, LCD_R5.
42 PA10 bidirectional 5 V-tolerant USB-domain GPIO; alternate functions include TIM1_CH3, LPUART1_RX, USART1_RX, OTG_HS_ID, MDIOS_MDIO, DCMI_D1/PSSI_D1, LCD_B4/B1.
43 PA11 bidirectional 5 V-tolerant USB-domain GPIO with OTG_HS_DM additional function; alternate functions include TIM1_CH4, LPUART1_CTS, SPI2_NSS, UART4_RX, USART1_CTS/NSS, FDCAN1_RX, LCD_R4.
44 PA12 bidirectional 5 V-tolerant USB-domain GPIO with OTG_HS_DP additional function; alternate functions include TIM1_ETR, LPUART1_RTS, SPI2_SCK, UART4_TX, USART1_RTS, SAI2_FS_B, FDCAN1_TX, LCD_R5.
45 PA13 bidirectional 5 V-tolerant GPIO; default function JTMS/SWDIO (pulled up after reset); only alternate function is EVENTOUT; do not leave unconnected if SWD is used.
46 VCAP passive Second internal LDO VCORE output pin; connect 2.2 µF low-ESR ceramic capacitor to VSS; both VCAP pins (30 and 46) must be populated.
47 VSS power_in Digital ground.
48 VDD power_in Main digital supply, 1.62-3.6 V; 100 nF decoupling capacitor required.
49 PA14 bidirectional 5 V-tolerant GPIO; default function JTCK/SWCLK (pulled down after reset); only alternate function is EVENTOUT; do not leave unconnected if SWD is used.
50 PA15 bidirectional 5 V-tolerant GPIO; default function JTDI (JTAG); alternate functions include TIM2_CH1/ETR, HDMI_CEC, SPI1/3/6_NSS, UART4_RTS, UART7_TX, LCD_R3/B6.
51 PC10 bidirectional 5 V-tolerant GPIO; alternate functions include DFSDM1_CKIN5, SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, OCTOSPIM_P1_IO1, SWPMI_RX, SDMMC1_D2, DCMI_D8, LCD_B1/R2.
52 PC11 bidirectional 5 V-tolerant GPIO; alternate functions include DFSDM1_DATIN5, SPI3_MISO/I2S3_SDI, USART3_RX, UART4_RX, OCTOSPIM_P1_NCS, SDMMC1_D3, DCMI_D4/PSSI_D4, LCD_B4.
53 PC12 bidirectional 5 V-tolerant GPIO; alternate functions include TRACED3, TIM15_CH1, SPI3_MOSI/I2S3_SDO, SPI6_SCK, USART3_CK, UART5_TX, SDMMC1_CK, DCMI_D9/PSSI_D9, LCD_R6.
54 PD2 bidirectional 5 V-tolerant GPIO; alternate functions include TRACED2, TIM3_ETR, TIM15_BKIN, UART5_RX, SDMMC1_CMD, DCMI_D11/PSSI_D11, LCD_B7/B2.
55 PB3 bidirectional 5 V-tolerant GPIO; default function JTDO/TRACESWO; alternate functions include TIM2_CH2, SPI1/3/6_SCK, SDMMC2_D2, CRS_SYNC, UART7_RX.
56 PB4 bidirectional 5 V-tolerant GPIO; default function NJTRST (JTAG TRST); alternate functions include TIM3_CH1, SPI1/2/3/6_MISO, SDMMC2_D3, UART7_TX.
57 PB5 bidirectional 5 V-tolerant GPIO; alternate functions include TIM3_CH2, I2C1/4_SMBA, SPI1/3/6_MOSI, FDCAN2_RX, OTG_HS_ULPI_D7, FMC_SDCKE1, SDMMC2_D5, LCD_B5, UART5_RX.
58 PB6 bidirectional 5 V-tolerant I2C FM+ GPIO; alternate functions include TIM4_CH1, I2C1/4_SCL, HDMI_CEC, USART1_TX, LPUART1_TX, FDCAN2_TX, OCTOSPIM_P1_NCS, FMC_SDNE1, UART5_TX.
59 PB7 bidirectional 5 V-tolerant I2C FM+ analog GPIO with PVD_IN additional function; alternate functions include TIM4_CH2, I2C1/4_SDA, USART1_RX, LPUART1_RX, DFSDM1_CKIN5, FMC_NL, DCMI_VSYNC.
60 BOOT0 input Dedicated boot-mode selection input (B-type, 0-9 V tolerant per Table 17); selects boot source at reset; also serves as VPP for Flash programming.
61 PB8 bidirectional 5 V-tolerant I2C FM+ GPIO with SDMMC secondary supply (_s); alternate functions include TIM4_CH3, I2C1/4_SCL, SDMMC1_CKIN/D4, UART4_RX, FDCAN1_RX, SDMMC2_D4, LCD_B6.
62 PB9 bidirectional 5 V-tolerant I2C FM+ GPIO with SDMMC secondary supply (_s); alternate functions include TIM4_CH4, I2C1/4_SDA, SPI2_NSS/I2S2_WS, SDMMC1_CDIR/D5, UART4_TX, FDCAN1_TX, SDMMC2_D5, LCD_B7.
63 VSS power_in Digital ground.
64 VDD power_in Main digital supply, 1.62-3.6 V; 100 nF decoupling capacitor required.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-64(10x10)
Category Embedded Processors & Controllers
Pins 64

CAD (KiCad official)

  • Symbol: STM32H7B0RBT6
  • Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
  • 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: stm32h7b0rbt6-etched.step / stm32h7b0rbt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32h7b0rbt6.step / stm32h7b0rbt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (202 pp, sha256 eeb37a566bb0f97e, retrieved 2026-09-25, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF