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STM32H757XIH6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), TFBGA-265. Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32h757xih6factory-2.0.0extractor-text
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docs stm32h757xih6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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page.json stm32h757xih6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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stm32h757xih6-etched.glb stm32h757xih6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
stm32h757xih6-etched.step stm32h757xih6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
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STM32H757XIH6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · TFBGA-265

STM32H757XIH6 from STMicroelectronics, in a TFBGA-265. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
A1 VSS power_in Ground supply pin for domain D1.
A2 PI6 bidirectional Port I pin 6, I/O with 5V tolerant high-speed low-voltage I/O structure.
A3 PI5 bidirectional Port I pin 5, I/O with 5V tolerant high-speed low-voltage I/O structure.
A4 PI4 bidirectional Port I pin 4, I/O with 5V tolerant high-speed low-voltage I/O structure.
A5 PB5 bidirectional Port B pin 5, I/O with 5V tolerant I/O structure.
A6 VDDLDO power_in Supply voltage output from embedded LDO regulator.
A7 VCAP power_in External capacitor connection pin for main regulator stabilization.
A8 PK5 bidirectional Port K pin 5, I/O for LCD display control.
A9 PG10 bidirectional Port G pin 10, I/O with 5V tolerant high-speed low-voltage I/O structure.
B1 VBAT power_in Battery supply pin for backup domain and VBAT charging, 1.2 to 3.6 V.
B2 VSS power_in Ground supply pin.
B3 PI7 bidirectional Port I pin 7, I/O with 5V tolerant high-speed low-voltage I/O structure.
B4 PE1 bidirectional Port E pin 1, I/O with 5V tolerant high-speed low-voltage I/O structure.
B5 PB6 bidirectional Port B pin 6, I/O with 5V tolerant and FM+ I/O structure.
B6 VSS power_in Ground supply pin.
B7 PB4 (NJTRST) bidirectional Port B pin 4 NJTRST, I/O with 5V tolerant I/O structure, JTAG interface.
B8 PK4 bidirectional Port K pin 4, I/O for LCD display control.
B9 PG11 bidirectional Port G pin 11, I/O with 5V tolerant high-speed low-voltage I/O structure.
C1 PC15-OSC32_OUT (OSC32_OUT) bidirectional Port C pin 15 OSC32_OUT, I/O with 5V tolerant I/O structure, 32 kHz oscillator output.
C2 PC14-OSC32_IN (OSC32_IN) bidirectional Port C pin 14 OSC14_IN, I/O with 5V tolerant I/O structure, 32 kHz oscillator input.
C3 PE2 bidirectional Port E pin 2, I/O with 5V tolerant high-speed low-voltage I/O structure.
C4 PE0 bidirectional Port E pin 0, I/O with 5V tolerant high-speed low-voltage I/O structure.
C5 PB7 bidirectional Port B pin 7, I/O with 5V tolerant FM+ and analog I/O structure.
C6 PB3 (JTDO/TRACESWO) bidirectional Port B pin 3 JTDO/TRACESWO, I/O with 5V tolerant I/O structure, JTAG trace interface.
C7 PK6 bidirectional Port K pin 6, I/O for LCD display control.
C8 PK3 bidirectional Port K pin 3, I/O for LCD display control.
C9 PG12 bidirectional Port G pin 12, I/O with 5V tolerant high-speed low-voltage I/O structure.
D1 PE5 bidirectional Port E pin 5, I/O with 5V tolerant high-speed low-voltage I/O structure.
D2 PE4 bidirectional Port E pin 4, I/O with 5V tolerant high-speed low-voltage I/O structure.
D3 PE3 bidirectional Port E pin 3, I/O with 5V tolerant high-speed low-voltage I/O structure.
D4 PB9 bidirectional Port B pin 9, I/O with 5V tolerant FM+ and high-speed low-voltage I/O structure.
D5 PB8 bidirectional Port B pin 8, I/O with 5V tolerant FM+ and high-speed low-voltage I/O structure.
D6 PG15 bidirectional Port G pin 15, I/O with 5V tolerant high-speed low-voltage I/O structure.
D7 PK7 bidirectional Port K pin 7, I/O for LCD display control.
D8 PG14 bidirectional Port G pin 14, I/O with 5V tolerant high-speed low-voltage I/O structure.
D9 PG13 bidirectional Port G pin 13, I/O with 5V tolerant high-speed low-voltage I/O structure.
E1 VLXSMPS power_in SMPS step-down converter switching node, inductor connection pin.
E2 PI9 bidirectional Port I pin 9, I/O with 5V tolerant high-speed low-voltage I/O structure.
E3 PC13 bidirectional Port C pin 13, I/O with 5V tolerant I/O structure, RTC tamper/wakeup.
E4 PI8 bidirectional Port I pin 8, I/O with 5V tolerant I/O structure, RTC tamper/wakeup.
E5 PE6 bidirectional Port E pin 6, I/O with 5V tolerant high-speed low-voltage I/O structure.
E6 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
E7 PDR_ON power_in
E8 BOOT0 input Boot pin (VPP), selects boot mode from Flash or system memory.
E9 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
F1 VDDSMPS power_in SMPS step-down converter power supply input pin.
F2 VSSSMPS power_in SMPS step-down converter ground return pin.
F3 PI10 bidirectional Port I pin 10, I/O with 5V tolerant high-speed low-voltage I/O structure.
F4 PI11 bidirectional Port I pin 11, I/O with 5V tolerant I/O structure, USB wakeup.
F5 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
G1 PF2 bidirectional Port F pin 2, I/O with 5V tolerant FM+ I/O structure.
G2 VFBSMPS power_in SMPS step-down converter feedback network connection pin.
G3 PF1 bidirectional Port F pin 1, I/O with 5V tolerant FM+ I/O structure.
G4 PF0 bidirectional Port F pin 0, I/O with 5V tolerant FM+ I/O structure.
G5 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
G7 VSS power_in Ground supply pin.
G8 VSS power_in Ground supply pin.
G9 VSS power_in Ground supply pin.
H1 PI12 bidirectional Port I pin 12, I/O with 5V tolerant I/O structure.
H2 PI13 bidirectional Port I pin 13, I/O with 5V tolerant I/O structure.
H3 PI14 bidirectional Port I pin 14, I/O with 5V tolerant high-speed low-voltage I/O structure.
H4 PF3 bidirectional Port F pin 3, I/O with 5V tolerant FM+ and analog I/O structure.
H5 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
H7 VSS power_in Ground supply pin.
H8 VSS power_in Ground supply pin.
H9 VSS power_in Ground supply pin.
J1 PH1-OSC_OUT (PH1) bidirectional Port H pin 1 OSC_OUT, I/O with 5V tolerant I/O structure, oscillator output.
J2 PH0-OSC_IN (PH0) bidirectional Port H pin 0 OSC_IN, I/O with 5V tolerant I/O structure, oscillator input.
J3 VSS power_in Ground supply pin.
J4 PF5 bidirectional Port F pin 5, I/O with 5V tolerant FM+ and analog I/O structure.
J5 PF4 bidirectional Port F pin 4, I/O with 5V tolerant FM+ and analog I/O structure.
J7 VSS power_in Ground supply pin.
J8 VSS power_in Ground supply pin.
J9 VSS power_in Ground supply pin.
K1 NRST input Reset pin with embedded pull-up resistor, bidirectional reset interface.
K2 PF6 bidirectional Port F pin 6, I/O with 5V tolerant FM+ and analog I/O structure.
K3 PF7 bidirectional Port F pin 7, I/O with 5V tolerant FM+ and analog I/O structure.
K4 PF8 bidirectional Port F pin 8, I/O with 5V tolerant FM+ and analog I/O structure.
K5 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
K7 VSS power_in Ground supply pin.
K8 VSS power_in Ground supply pin.
K9 VSS power_in Ground supply pin.
L1 VDDA power_in Analog power supply pin for ADCs, DACs, comparators and operational amplifiers.
L2 PC0 bidirectional Port C pin 0, I/O with 5V tolerant and analog I/O structure.
L3 PF10 bidirectional Port F pin 10, I/O with 5V tolerant FM+ and analog I/O structure.
L4 PF9 bidirectional Port F pin 9, I/O with 5V tolerant FM+ and analog I/O structure.
L5 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
L7 VSS power_in Ground supply pin.
L8 VSS power_in Ground supply pin.
L9 VSS power_in Ground supply pin.
M1 VREF+ power_in Reference voltage output for analog peripherals, ADCs and DACs.
M2 PC1 bidirectional Port C pin 1, I/O with 5V tolerant FM+ and analog I/O structure.
M3 PC2 bidirectional Port C pin 2, I/O with 5V tolerant and analog I/O structure.
M4 PC3 bidirectional Port C pin 3, I/O with 5V tolerant and analog I/O structure.
M5 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
N1 VREF- power_in Reference voltage negative, ground reference for analog peripherals.
N2 PH2 bidirectional Port H pin 2, I/O with 5V tolerant FM+ and analog I/O structure.
N3 PA2 bidirectional Port A pin 2, I/O with 5V tolerant and analog I/O structure.
N4 PA1 bidirectional Port A pin 1, I/O with 5V tolerant FM+ and analog I/O structure.
N5 PA0 bidirectional Port A pin 0, I/O with 5V tolerant and analog I/O structure.
N6 PJ0 bidirectional Port J pin 0, I/O for LCD display control.
N7 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
N8 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
N9 PE10 bidirectional Port E pin 10, I/O with 5V tolerant FM+ and analog I/O structure.
P1 VSSA power_in Ground supply pin for analog circuits.
P2 PH3 bidirectional Port H pin 3, I/O with 5V tolerant FM+ and analog I/O structure.
P3 PH4 bidirectional Port H pin 4, I/O with 5V tolerant FM+ and analog I/O structure.
P4 PH5 bidirectional Port H pin 5, I/O with 5V tolerant FM+ and analog I/O structure.
P5 PI15 bidirectional Port I pin 15, I/O with 5V tolerant I/O structure.
P6 PJ1 bidirectional Port J pin 1, I/O for LCD display control.
P7 PF13 bidirectional Port F pin 13, I/O with 5V tolerant FM+ and analog I/O structure.
P8 PF14 bidirectional Port F pin 14, I/O with 5V tolerant FM+ and analog I/O structure.
P9 PE9 bidirectional Port E pin 9, I/O with 5V tolerant FM+ and analog I/O structure.
R1 PC2_C bidirectional Port C pin 2 Complementary pad, analog-only I/O with 3.3V tolerant and analog structure.
R2 PC3_C bidirectional Port C pin 3 Complementary pad, analog-only I/O with 3.3V tolerant and analog structure.
R3 PA6 bidirectional Port A pin 6, I/O with 5V tolerant and analog I/O structure.
R4 VSS power_in Ground supply pin.
R5 PA7 bidirectional Port A pin 7, I/O with 3.3V tolerant and analog I/O structure.
R6 PB2 bidirectional Port B pin 2, I/O with 5V tolerant FM+ and analog I/O structure.
R7 PF12 bidirectional Port F pin 12, I/O with 5V tolerant FM+ and analog I/O structure.
R8 VSS power_in Ground supply pin.
R9 PF15 bidirectional Port F pin 15, I/O with 5V tolerant FM+ and high-speed low-voltage I/O structure.
T1 PA0_C bidirectional Port A pin 0 Complementary pad, analog-only I/O with 3.3V tolerant and analog structure.
T2 PA1_C bidirectional Port A pin 1 Complementary pad, analog-only I/O with 3.3V tolerant and analog structure.
T3 PA5 bidirectional Port A pin 5, I/O with 3.3V tolerant FM+ and analog I/O structure.
T4 PC4 bidirectional Port C pin 4, I/O with 3.3V tolerant and analog I/O structure.
T5 PB1 bidirectional Port B pin 1, I/O with 3.3V tolerant and USB I/O structure.
T6 PJ2 bidirectional Port J pin 2, I/O for LCD display control.
T7 PF11 bidirectional Port F pin 11, I/O with 5V tolerant and analog I/O structure.
T8 PG0 bidirectional Port G pin 0, I/O with 5V tolerant high-speed low-voltage I/O structure.
T9 PE8 bidirectional Port E pin 8, I/O with 3.3V tolerant FM+ and analog I/O structure.
U1 VSS power_in Ground supply pin.
U2 PA3 bidirectional Port A pin 3, I/O with 5V tolerant FM+ and analog I/O structure.
U3 PA4 bidirectional Port A pin 4, I/O with 3.3V tolerant and analog I/O structure.
U4 PC5 bidirectional Port C pin 5, I/O with 3.3V tolerant and analog I/O structure.
U5 PB0 bidirectional Port B pin 0, I/O with 5V tolerant and analog I/O structure.
U6 PJ3 bidirectional Port J pin 3, I/O for LCD display control.
U7 PJ4 bidirectional Port J pin 4, I/O for LCD display control.
U8 PG1 bidirectional Port G pin 1, I/O with 3.3V tolerant high-speed low-voltage I/O structure.
U9 PE7 bidirectional Port E pin 7, I/O with 3.3V tolerant FM+ and analog I/O structure.
A10 PG9 bidirectional Port G pin 9, I/O with 5V tolerant high-speed low-voltage I/O structure.
A11 PD5 bidirectional Port D pin 5, I/O with 5V tolerant high-speed low-voltage I/O structure.
A12 PD4 bidirectional Port D pin 4, I/O with 5V tolerant high-speed low-voltage I/O structure.
A13 PC10 bidirectional Port C pin 10, I/O with 5V tolerant high-speed and analog I/O structure.
A14 PA15 (JTDI) bidirectional Port A pin 15 JTDI, I/O with 5V tolerant I/O structure, JTAG debug interface.
A15 PI1 bidirectional Port I pin 1, I/O with 5V tolerant high-speed low-voltage I/O structure.
A16 PI0 bidirectional Port I pin 0, I/O with 5V tolerant high-speed low-voltage I/O structure.
A17 VSS power_in Ground supply pin.
B10 PJ15 bidirectional Port J pin 15, I/O for LCD display control.
B11 PD6 bidirectional Port D pin 6, I/O with 5V tolerant high-speed low-voltage I/O structure.
B12 PD3 bidirectional Port D pin 3, I/O with 5V tolerant high-speed low-voltage I/O structure.
B13 PC11 bidirectional Port C pin 11, I/O with 5V tolerant high-speed low-voltage I/O structure.
B14 PA14 (JTCK/SWCLK) bidirectional Port A pin 14 JTCK/SWCLK, I/O with 5V tolerant I/O structure, debug interface.
B15 PI2 bidirectional Port I pin 2, I/O with 5V tolerant high-speed low-voltage I/O structure.
B16 PH15 bidirectional Port H pin 15, I/O with 5V tolerant high-speed low-voltage I/O structure.
B17 PH14 bidirectional Port H pin 14, I/O with 5V tolerant high-speed low-voltage I/O structure.
C10 VSS power_in Ground supply pin.
C11 PD7 bidirectional Port D pin 7, I/O with 5V tolerant high-speed low-voltage I/O structure.
C12 PC12 bidirectional Port C pin 12, I/O with 5V tolerant high-speed low-voltage I/O structure.
C13 VSS power_in Ground supply pin.
C14 PI3 bidirectional Port I pin 3, I/O with 5V tolerant high-speed low-voltage I/O structure.
C15 PA13 (JTMS/SWDIO) bidirectional
C16 VSS power_in Ground supply pin.
C17 VDDLDO power_in Supply voltage output from embedded LDO regulator.
D10 PJ14 bidirectional Port J pin 14, I/O for LCD display control.
D11 PJ12 bidirectional Port J pin 12, I/O for LCD display control.
D12 PD2 bidirectional Port D pin 2, I/O with 5V tolerant high-speed low-voltage I/O structure.
D13 PD0 bidirectional Port D pin 0, I/O with 5V tolerant high-speed low-voltage I/O structure.
D14 PA10 bidirectional Port A pin 10, I/O with 5V tolerant and USB I/O structure.
D15 PA9 bidirectional Port A pin 9, I/O with 5V tolerant and USB I/O structure.
D16 PH13 bidirectional Port H pin 13, I/O with 5V tolerant high-speed low-voltage I/O structure.
D17 VCAP power_in External capacitor connection pin for main regulator stabilization.
E10 PJ13 bidirectional Port J pin 13, I/O for LCD display control.
E11 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
E12 PD1 bidirectional Port D pin 1, I/O with 5V tolerant high-speed low-voltage I/O structure.
E13 PC8 bidirectional Port C pin 8, I/O with 5V tolerant high-speed low-voltage I/O structure.
E14 PC9 bidirectional Port C pin 9, I/O with 5V tolerant FM+ and high-speed low-voltage I/O structure.
E15 PA8 bidirectional Port A pin 8, I/O with 5V tolerant FM+, high-speed and analog I/O structure.
E16 PA12 bidirectional Port A pin 12, I/O with 5V tolerant and USB I/O structure.
E17 PA11 bidirectional Port A pin 11, I/O with 5V tolerant and USB I/O structure.
F13 PC7 bidirectional Port C pin 7, I/O with 5V tolerant high-speed low-voltage I/O structure.
F14 PC6 bidirectional Port C pin 6, I/O with 5V tolerant high-speed low-voltage I/O structure.
F15 PG8 bidirectional Port G pin 8, I/O with 5V tolerant high-speed low-voltage I/O structure.
F16 PG7 bidirectional Port G pin 7, I/O with 5V tolerant high-speed low-voltage I/O structure.
F17 VDD33_USB power_in USB 3.3V power supply pin.
G10 VSS power_in Ground supply pin.
G11 VSS power_in Ground supply pin.
G13 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
G14 PG5 bidirectional Port G pin 5, I/O with 5V tolerant high-speed low-voltage I/O structure.
G15 PG6 bidirectional Port G pin 6, I/O with 5V tolerant high-speed low-voltage I/O structure.
G16 VSS power_in Ground supply pin.
G17 VDD50_USB power_in USB 5V tolerant I/O power supply pin.
H10 VSS power_in Ground supply pin.
H11 VSS power_in Ground supply pin.
H13 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
H14 PG4 bidirectional Port G pin 4, I/O with 5V tolerant high-speed low-voltage I/O structure.
H15 PG3 bidirectional Port G pin 3, I/O with 5V tolerant high-speed low-voltage I/O structure.
H16 PG2 bidirectional Port G pin 2, I/O with 5V tolerant high-speed low-voltage I/O structure.
H17 PK2 bidirectional Port K pin 2, I/O for LCD display control.
J10 VSS power_in Ground supply pin.
J11 VSS power_in Ground supply pin.
J13 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
J14 PK0 bidirectional Port K pin 0, I/O for LCD display control.
J15 PK1 bidirectional Port K pin 1, I/O for LCD display control.
J16 VSS power_in Ground supply pin.
J17 VSS power_in Ground supply pin.
K10 VSS power_in Ground supply pin.
K11 VSS power_in Ground supply pin.
K13 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
K14 PJ11 bidirectional Port J pin 11, I/O for LCD display control.
K15 VSSDSI power_in DSI host ground supply pin.
K16 DSI_D1P bidirectional DSI host data lane 1 positive signal line, differential pair.
K17 DSI_D1N bidirectional DSI host data lane 1 negative signal line, differential pair.
L10 VSS power_in Ground supply pin.
L11 VSS power_in Ground supply pin.
L13 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
L14 PJ10 bidirectional Port J pin 10, I/O for LCD display control.
L15 VSSDSI power_in DSI host ground supply pin.
L16 DSI_CKP bidirectional DSI host clock lane positive signal line, differential pair.
L17 DSI_CKN bidirectional DSI host clock lane negative signal line, differential pair.
M13 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
M14 PJ9 bidirectional Port J pin 9, I/O for LCD display control.
M15 VSSDSI power_in DSI host ground supply pin.
M16 DSI_D0P bidirectional DSI host data lane 0 positive signal line, differential pair.
M17 DSI_D0N bidirectional DSI host data lane 0 negative signal line, differential pair.
N10 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
N11 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
N12 VDD power_in Main positive power supply pin, 1.62 to 3.6 V.
N13 PJ8 bidirectional Port J pin 8, I/O for LCD display control.
N14 PJ7 bidirectional Port J pin 7, I/O for LCD display control.
N15 PJ6 bidirectional Port J pin 6, I/O for LCD display control.
N16 VSS power_in Ground supply pin.
N17 VCAPDSI power_in External capacitor connection pin for DSI regulator stabilization.
P10 PE11 bidirectional Port E pin 11, I/O with 5V tolerant FM+ and analog I/O structure.
P11 PB10 bidirectional Port B pin 10, I/O with 5V tolerant FM+ I/O structure.
P12 PB11 bidirectional Port B pin 11, I/O with 5V tolerant FM+ I/O structure.
P13 PH10 bidirectional Port H pin 10, I/O with 5V tolerant high-speed low-voltage I/O structure.
P14 PH11 bidirectional Port H pin 11, I/O with 5V tolerant FM+ and high-speed low-voltage I/O structure.
P15 PD15 bidirectional Port D pin 15, I/O with 5V tolerant high-speed low-voltage I/O structure.
P16 PD14 bidirectional Port D pin 14, I/O with 5V tolerant high-speed low-voltage I/O structure.
P17 VDDDSI power_in DSI host power supply pin.
R10 PE12 bidirectional
R11 PE15 bidirectional
R12 PJ5 bidirectional
R13 PH9 bidirectional Port H pin 9, I/O with 5V tolerant high-speed low-voltage I/O structure.
R14 PH12 bidirectional Port H pin 12, I/O with 5V tolerant FM+ and high-speed low-voltage I/O structure.
R15 PD11 bidirectional Port D pin 11, I/O with 5V tolerant high-speed low-voltage I/O structure.
R16 PD12 bidirectional Port D pin 12, I/O with 5V tolerant FM+ and high-speed low-voltage I/O structure.
R17 PD13 bidirectional Port D pin 13, I/O with 5V tolerant FM+ and high-speed low-voltage I/O structure.
T10 PE13 bidirectional Port E pin 13, I/O with 5V tolerant high-speed low-voltage I/O structure.
T11 PH6 bidirectional Port H pin 6, I/O with 5V tolerant I/O structure.
T12 VSS power_in Ground supply pin.
T13 PH8 bidirectional Port H pin 8, I/O with 5V tolerant FM+ and analog I/O structure.
T14 PB12 bidirectional Port B pin 12, I/O with 5V tolerant and USB I/O structure.
T15 PB15 bidirectional Port B pin 15, I/O with 5V tolerant and USB I/O structure.
T16 PD10 bidirectional Port D pin 10, I/O with 5V tolerant high-speed low-voltage I/O structure.
T17 PD9 bidirectional Port D pin 9, I/O with 5V tolerant high-speed low-voltage I/O structure.
U10 PE14 bidirectional Port E pin 14, I/O with 5V tolerant high-speed low-voltage I/O structure.
U11 VCAP power_in External capacitor connection pin for main regulator stabilization.
U12 VDDLDO power_in Supply voltage output from embedded LDO regulator.
U13 PH7 bidirectional Port H pin 7, I/O with 5V tolerant FM+ and analog I/O structure.
U14 PB13 bidirectional Port B pin 13, I/O with 5V tolerant and USB I/O structure, USB VBUS monitoring.
U15 PB14 bidirectional Port B pin 14, I/O with 5V tolerant and USB I/O structure.
U16 PD8 bidirectional Port D pin 8, I/O with 5V tolerant high-speed low-voltage I/O structure.
U17 VSS power_in Ground supply pin.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TFBGA-265
Category Embedded Processors & Controllers
Pins 265

CAD (KiCad official)

  • Symbol: STM32H757XIH6
  • Footprint: Package_BGA:TFBGA-265_14x14mm_Layout17x17_P0.8mm
  • 3D model: TFBGA-265 (KiCad packages3D, STEP)
  • 3D model files: stm32h757xih6-etched.step / stm32h757xih6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32h757xih6.step / stm32h757xih6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (251 pp, sha256 ad71256d2aa3541a, retrieved 2026-09-29, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF