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STM32H753XIH6

Public Made by Adom

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), TFBGA-265. Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32h753xih6factory-2.0.0extractor-text
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Symbol & Footprint

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Contents

README

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STM32H753XIH6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · TFBGA-265

STM32H753XIH6 from STMicroelectronics, in a TFBGA-265. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
A1 VSS power_in Ground connection for the device
A2 PI6 bidirectional Port I pin 6; TIM8_CH2, SAI2_SD_A, FMC_D28, DCMI_D6, LCD_B6, EVENTOUT
A3 PI5 bidirectional Port I pin 5; TIM8_CH1, SAI2_SCK_A, FMC_NBL3, DCMI_VSYNC, LCD_B5, EVENTOUT
A4 PI4 bidirectional
A5 PB5 bidirectional Port B pin 5; TIM17_BKIN, TIM3_CH2, HRTIM_EEV7, I2C1_SMBA, SPI1_MOSI/I2S1_SDO, I2C4_SMBA, SPI3_MOSI/I2S3_SDO, SPI6_MOSI, FDCAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1, DCMI_D10, UART5_RX, EVENTOUT
A6 VDDLDO power_in Supply voltage for internal LDO regulator
A7 VCAP power_in External capacitor connection for voltage regulator stabilization
A8 PK5 bidirectional
A9 PG10 bidirectional
B1 VBAT power_in Battery supply voltage for backup domain
B2 VSS power_in Ground connection
B3 PI7 bidirectional Port I pin 7; TIM8_CH3, SAI2_FS_A, FMC_D29, DCMI_D7, LCD_B7, EVENTOUT
B4 PE1 bidirectional Port E pin 1; LPTIM1_IN2, HRTIM_SCOUT, UART8_TX, FDCAN1_TXFD_MODE, FMC_NBL1, DCMI_D3, EVENTOUT
B5 PB6 bidirectional
B6 VSS power_in Ground connection
B7 PB4 (NJTRST) bidirectional
B8 PK4 bidirectional Port K pin 4; LCD_B5, EVENTOUT
B9 PG11 bidirectional
C1 PC15-OSC32_OUT (OSC32_OUT) bidirectional Port C pin 15 (OSC32_OUT); OSC32_OUT, EVENTOUT
C2 PC14-OSC32_IN (OSC32_IN) bidirectional Port C pin 14 (OSC32_IN); OSC32_IN, EVENTOUT
C3 PE2 bidirectional Port E pin 2; TRACECLK, SAI1_CK1, SPI4_SCK, SAI1_MCLK_A, SAI4_MCLK_A, QUADSPI_BK1_IO2, SAI4_CK1, ETH_MII_TXD3, FMC_A23, EVENTOUT
C4 PE0 bidirectional
C5 PB7 bidirectional Port B pin 7; TIM17_CH1N, TIM4_CH2, HRTIM_EEV9, I2C1_SDA, I2C4_SDA, USART1_RX, LPUART1_RX, FDCAN2_TXFD_MODE, DFSDM1_CKIN5, FMC_NL, DCMI_VSYNC, EVENTOUT with PVD_IN
C6 PB3 (JTDO/TRACESWO) bidirectional
C7 PK6 bidirectional Port K pin 6; LCD_B7, EVENTOUT
C8 PK3 bidirectional
C9 PG12 bidirectional Port G pin 12; LPTIM1_IN1, HRTIM_EEV5, SPI6_MISO, USART6_RTS/USART6_DE, SPDIFRX1_IN2, LCD_B4, ETH_MII_TXD1/ETH_RMII_TXD1, FMC_NE4, LCD_B1, EVENTOUT
D1 PE5 bidirectional Port E pin 5; TRACED2, SAI1_CK2, DFSDM1_CKIN3, TIM15_CH1, SPI4_MISO, SAI1_SCK_A, SAI4_SCK_A, SAI4_CK2, FMC_A21, DCMI_D6, LCD_G0, EVENTOUT
D2 PE4 bidirectional Port E pin 4; TRACED1, SAI1_D2, DFSDM1_DATIN3, TIM15_CH1N, SPI4_NSS, SAI1_FS_A, SAI4_FS_A, SAI4_D2, FMC_A20, DCMI_D4, LCD_B0, EVENTOUT
D3 PE3 bidirectional Port E pin 3; TRACED0, TIM15_BKIN, SAI1_SD_B, SAI4_SD_B, FMC_A19, EVENTOUT
D4 PB9 bidirectional
D5 PB8 bidirectional Port B pin 8; TIM16_CH1, TIM4_CH3, DFSDM1_CKIN7, I2C1_SCL, I2C4_SCL, SDMMC1_CKIN, UART4_RX, FDCAN1_RX, SDMMC2_D4, ETH_MII_TXD3, SDMMC1_D4, DCMI_D6, LCD_B6, EVENTOUT
D6 PG15 bidirectional Port G pin 15; USART6_CTS/USART6_NSS, FMC_SDNCAS, DCMI_D13, EVENTOUT
D7 PK7 bidirectional Port K pin 7; LCD_DE, EVENTOUT
D8 PG14 bidirectional Port G pin 14; TRACED1, LPTIM1_ETR, SPI6_MOSI, USART6_TX, QUADSPI_BK2_IO3, ETH_MII_TXD1/ETH_RMII_TXD1, FMC_A25, LCD_B0, EVENTOUT
D9 PG13 bidirectional
E1 NC unconnected
E2 PI9 bidirectional Port I pin 9; UART4_RX, FDCAN1_RX, FMC_D30, LCD_VSYNC, EVENTOUT
E3 PC13 bidirectional Port C pin 13; EVENTOUT with RTC_TAMP1/RTC_TS/WKUP2
E4 PI8 bidirectional Port I pin 8; EVENTOUT with RTC_TAMP2/WKUP3
E5 PE6 bidirectional Port E pin 6; TRACED3, TIM1_BKIN2, SAI1_D1, TIM15_CH2, SPI4_MOSI, SAI1_SD_A, SAI4_SD_A, SAI4_D1, SAI2_MCLK_B, TIM1_BKIN2_COMP12, FMC_A22, DCMI_D7, LCD_G1, EVENTOUT
E6 VDD power_in Main supply voltage
E7 PDR_ON power_in
E8 BOOT0 input Boot mode selection pin; VPP
E9 VDD power_in Main supply voltage
F1 VSS power_in Ground connection
F2 VSS power_in Ground connection
F3 PI10 bidirectional Port I pin 10; FDCAN1_RXFD_MODE, ETH_MII_RX_ER, FMC_D31, LCD_HSYNC, EVENTOUT
F4 PI11 bidirectional Port I pin 11; LCD_G6, OTG_HS_ULPI_DIR, EVENTOUT with WKUP4
F5 VDD power_in Main supply voltage
G1 PF2 bidirectional Port F pin 2; I2C2_SMBA, FMC_A2, EVENTOUT
G2 VSS power_in Ground connection
G3 PF1 bidirectional Port F pin 1; I2C2_SCL, FMC_A1, EVENTOUT
G4 PF0 bidirectional Port F pin 0; I2C2_SDA, FMC_A0, EVENTOUT
G5 VDD power_in Main supply voltage
G7 VSS power_in Ground connection
G8 VSS power_in Ground connection
G9 VSS power_in Ground connection
H1 PI12 bidirectional Port I pin 12; LCD_HSYNC, EVENTOUT
H2 PI13 bidirectional Port I pin 13; LCD_VSYNC, EVENTOUT
H3 PI14 bidirectional Port I pin 14; LCD_CLK, EVENTOUT
H4 PF3 bidirectional Port F pin 3; FMC_A3, EVENTOUT with ADC3_INP5
H5 VDD power_in Main supply voltage
H7 VSS power_in Ground connection
H8 VSS power_in Ground connection
H9 VSS power_in Ground connection
J1 PH1-OSC_OUT (PH1) bidirectional Port H pin 1 (OSC_OUT); OSC_OUT, EVENTOUT
J2 PH0-OSC_IN (PH0) bidirectional Port H pin 0 (OSC_IN); OSC_IN, EVENTOUT
J3 VSS power_in Ground connection
J4 PF5 bidirectional Port F pin 5; FMC_A5, EVENTOUT with ADC3_INP4
J5 PF4 bidirectional Port F pin 4; FMC_A4, EVENTOUT with ADC3_INN5, ADC3_INP9
J7 VSS power_in Ground connection
J8 VSS power_in Ground connection
J9 VSS power_in Ground connection
K1 NRST input Reset pin with embedded weak pull-up resistor
K2 PF6 bidirectional Port F pin 6; TIM16_CH1, SPI5_NSS, SAI1_SD_B, UART7_RX, SAI4_SD_B, QUADSPI_BK1_IO3, EVENTOUT with ADC3_INN4, ADC3_INP8
K3 PF7 bidirectional Port F pin 7; TIM17_CH1, SPI5_SCK, SAI1_MCLK_B, UART7_TX, SAI4_MCLK_B, QUADSPI_BK1_IO2, EVENTOUT with ADC3_INP3
K4 PF8 bidirectional Port F pin 8; TIM16_CH1N, SPI5_MISO, SAI1_SCK_B, UART7_RTS/UART7_DE, SAI4_SCK_B, TIM13_CH1, QUADSPI_BK1_IO0, EVENTOUT with ADC3_INN3, ADC3_INP7
K5 VDD power_in Main supply voltage
K7 VSS power_in Ground connection
K8 VSS power_in Ground connection
K9 VSS power_in Ground connection
L1 VDDA power_in Analog power supply
L2 PC0 bidirectional Port C pin 0; DFSDM1_CKIN0, DFSDM1_DATIN4, SAI2_FS_B, OTG_HS_ULPI_STP, FMC_SDNWE, LCD_R5, EVENTOUT with ADC123_INP10
L3 PF10 bidirectional Port F pin 10; TIM16_BKIN, SAI1_D3, QUADSPI_CLK, SAI4_D3, DCMI_D11, LCD_DE, EVENTOUT with ADC3_INN2, ADC3_INP6
L4 PF9 bidirectional Port F pin 9; TIM17_CH1N, SPI5_MOSI, SAI1_FS_B, UART7_CTS, SAI4_FS_B, TIM14_CH1, QUADSPI_BK1_IO1, EVENTOUT with ADC3_INP2
L5 VDD power_in Main supply voltage
L7 VSS power_in Ground connection
L8 VSS power_in Ground connection
L9 VSS power_in Ground connection
M1 VREF+ power_in Reference voltage for analog peripherals
M2 PC1 bidirectional Port C pin 1; TRACED0, SAI1_D1, DFSDM1_DATIN0, DFSDM1_CKIN4, SPI2_MOSI/I2S2_SDO, SAI1_SD_A, SAI4_SD_A, SDMMC2_CK, SAI4_D1, ETH_MDC, MDIOS_MDC, EVENTOUT with ADC123_INN10, ADC123_INP11, RTC_TAMP3/WKUP5
M3 PC2 bidirectional Port C pin 2; CDSLEEP, DFSDM1_CKIN1, SPI2_MISO/I2S2_SDI, DFSDM1_CKOUT, OTG_HS_ULPI_DIR, ETH_MII_TXD2, FMC_SDNE0, EVENTOUT with ADC123_INN11, ADC123_INP12
M4 PC3 bidirectional Port C pin 3; CSLEEP, DFSDM1_DATIN1, SPI2_MOSI/I2S2_SDO, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, FMC_SDCKE0, EVENTOUT with ADC12_INN12, ADC12_INP13
M5 VDD power_in Main supply voltage
N1 VREF- power_in Negative reference voltage
N2 PH2 bidirectional Port H pin 2; LPTIM1_IN2, QUADSPI_BK2_IO0, SAI2_SCK_B, ETH_MII_CRS, FMC_SDCKE0, LCD_R0, EVENTOUT
N3 PA2 bidirectional Port A pin 2; TIM2_CH3, TIM5_CH3, LPTIM4_OUT, TIM15_CH1, USART2_TX, SAI2_SCK_B, ETH_MDIO, MDIOS_MDIO, LCD_R1, EVENTOUT with ADC12_INP14, WKUP1
N4 PA1 bidirectional Port A pin 1; TIM2_CH2, TIM5_CH2, LPTIM3_OUT, TIM15_CH1N, USART2_RTS/USART2_DE, UART4_RX, QUADSPI_BK1_IO3, SAI2_MCLK_B, ETH_MII_RX_CLK/ETH_RMII_REF_CLK, LCD_R2, EVENTOUT with ADC1_INN16, ADC1_INP17
N5 PA0 bidirectional Port A pin 0; TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, TIM15_BKIN, USART2_CTS/USART2_NSS, UART4_TX, SDMMC2_CMD, SAI2_SD_B, ETH_MII_CRS, EVENTOUT with ADC1_INP16, WKUP0
N6 PJ0 bidirectional
N7 VDD power_in Main supply voltage
N8 VDD power_in Main supply voltage
N9 PE10 bidirectional
P1 VSSA power_in Ground reference for analog circuits
P2 PH3 bidirectional Port H pin 3; QUADSPI_BK2_IO1, SAI2_MCLK_B, ETH_MII_COL, FMC_SDNE0, LCD_R1, EVENTOUT with ADC3_INN13, ADC3_INP14
P3 PH4 bidirectional Port H pin 4; I2C2_SCL, LCD_G5, OTG_HS_ULPI_NXT, LCD_G4, EVENTOUT with ADC3_INN14, ADC3_INP15
P4 PH5 bidirectional Port H pin 5; I2C2_SDA, SPI5_NSS, FMC_SDNWE, EVENTOUT with ADC3_INN15, ADC3_INP16
P5 PI15 bidirectional Port I pin 15; LCD_G2, LCD_R0, EVENTOUT
P6 PJ1 bidirectional Port J pin 1; LCD_R2, EVENTOUT
P7 PF13 bidirectional Port F pin 13; DFSDM1_DATIN6, I2C4_SMBA, FMC_A7, EVENTOUT with ADC2_INP2
P8 PF14 bidirectional
P9 PE9 bidirectional Port E pin 9; TIM1_CH1, DFSDM1_CKOUT, UART7_RTS/UART7_DE, QUADSPI_BK2_IO2, FMC_D6/FMC_DA6, EVENTOUT with OPAMP2_VINP, COMP2_INP
R1 PC2_C bidirectional Port C pin 2 (analog pad); ADC3_INN1, ADC3_INP0
R2 PC3_C bidirectional Port C pin 3 (analog pad); ADC3_INP1
R3 PA6 bidirectional Port A pin 6; TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO/I2S1_SDI, SPI6_MISO, TIM13_CH1, TIM8_BKIN_COMP12, MDIOS_MDC, TIM1_BKIN_COMP12, DCMI_PIXCLK, LCD_G2, EVENTOUT with ADC12_INP3
R4 VSS power_in Ground connection
R5 PA7 bidirectional Port A pin 7; TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI/I2S1_SDO, SPI6_MOSI, TIM14_CH1, ETH_MII_RX_DV/ETH_RMII_CRS_DV, FMC_SDNWE, EVENTOUT with ADC12_INN3, ADC12_INP7, OPAMP1_VINM
R6 PB2 bidirectional Port B pin 2; RTC_OUT, SAI1_D1, DFSDM1_CKIN1, SAI1_SD_A, SPI3_MOSI/I2S3_SDO, SAI4_SD_A, QUADSPI_CLK, SAI4_D1, EVENTOUT with COMP1_INP
R7 PF12 bidirectional Port F pin 12; FMC_A6, EVENTOUT with ADC1_INN2, ADC1_INP6
R8 VSS power_in Ground connection
R9 PF15 bidirectional Port F pin 15; I2C4_SDA, FMC_A9, EVENTOUT
T1 PA0_C bidirectional Port A pin 0 (analog pad); ADC12_INN1, ADC12_INP0
T2 PA1_C bidirectional Port A pin 1 (analog pad); ADC12_INP1
T3 PA5 bidirectional Port A pin 5; D2PWREN, TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK/I2S1_CK, SPI6_SCK, OTG_HS_ULPI_CK, LCD_R4, EVENTOUT with ADC12_INN18, ADC12_INP19, DAC1_OUT2
T4 PC4 bidirectional Port C pin 4; DFSDM1_CKIN2, I2S1_MCK, SPDIFRX1_IN3, ETH_MII_RXD0/ETH_RMII_RXD0, FMC_SDNE0, EVENTOUT with ADC12_INP4, OPAMP1_VOUT, COMP1_INM
T5 PB1 bidirectional Port B pin 1; TIM1_CH3N, TIM3_CH4, TIM8_CH3N, DFSDM1_DATIN1, LCD_R6, OTG_HS_ULPI_D2, ETH_MII_RXD3, LCD_G0, EVENTOUT with ADC12_INP5, COMP1_INM
T6 PJ2 bidirectional Port J pin 2; LCD_R3, EVENTOUT
T7 PF11 bidirectional Port F pin 11; SPI5_MOSI, SAI2_SD_B, FMC_SDNRAS, DCMI_D12, EVENTOUT with ADC1_INP2
T8 PG0 bidirectional Port G pin 0; FMC_A10, EVENTOUT
T9 PE8 bidirectional Port E pin 8; TIM1_CH1N, DFSDM1_CKIN2, UART7_TX, QUADSPI_BK2_IO1, FMC_D5/FMC_DA5, COMP2_OUT, EVENTOUT with OPAMP2_VINM
U1 VSS power_in Ground connection
U2 PA3 bidirectional Port A pin 3; TIM2_CH4, TIM5_CH4, LPTIM5_OUT, TIM15_CH2, USART2_RX, LCD_B2, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5, EVENTOUT with ADC12_INP15
U3 PA4 bidirectional
U4 PC5 bidirectional Port C pin 5; SAI1_D3, DFSDM1_DATIN2, SPDIFRX1_IN4, SAI4_D3, ETH_MII_RXD1/ETH_RMII_RXD1, FMC_SDCKE0, COMP1_OUT, EVENTOUT with ADC12_INN4, ADC12_INP8, OPAMP1_VINM
U5 PB0 bidirectional Port B pin 0; TIM1_CH2N, TIM3_CH3, TIM8_CH2N, DFSDM1_CKOUT, UART4_CTS, LCD_R3, OTG_HS_ULPI_D1, ETH_MII_RXD2, LCD_G1, EVENTOUT with ADC12_INN5, ADC12_INP9, OPAMP1_VINP, COMP1_INP
U6 PJ3 bidirectional Port J pin 3; LCD_R4, EVENTOUT
U7 PJ4 bidirectional Port J pin 4; LCD_R5, EVENTOUT
U8 PG1 bidirectional Port G pin 1; FMC_A11, EVENTOUT with OPAMP2_VINM
U9 PE7 bidirectional Port E pin 7; TIM1_ETR, DFSDM1_DATIN2, UART7_RX, QUADSPI_BK2_IO0, FMC_D4/FMC_DA4, EVENTOUT with OPAMP2_VOUT, COMP2_INM
A10 PG9 bidirectional
A11 PD5 bidirectional
A12 PD4 bidirectional
A13 PC10 bidirectional
A14 PA15 (JTDI) bidirectional
A15 PI1 bidirectional
A16 PI0 bidirectional
A17 VSS power_in Ground connection
B10 PJ15 bidirectional Port J pin 15; LCD_B3, EVENTOUT
B11 PD6 bidirectional
B12 PD3 bidirectional
B13 PC11 bidirectional
B14 PA14 (JTCK/SWCLK) bidirectional Port A pin 14 (JTCK-SWCLK); JTCK-SWCLK, EVENTOUT
B15 PI2 bidirectional Port I pin 2; TIM8_CH4, SPI2_MISO/I2S2_SDI, FMC_D26, DCMI_D9, LCD_G7, EVENTOUT
B16 PH15 bidirectional Port H pin 15; TIM8_CH3N, FDCAN1_TXFD_MODE, FMC_D23, DCMI_D11, LCD_G4, EVENTOUT
B17 PH14 bidirectional Port H pin 14; TIM8_CH2N, UART4_RX, FDCAN1_RX, FMC_D22, DCMI_D4, LCD_G3, EVENTOUT
C10 VSS power_in Ground connection
C11 PD7 bidirectional Port D pin 7; DFSDM1_DATIN4, SPI1_MOSI/I2S1_SDO, DFSDM1_CKIN1, USART2_CK, SPDIFRX1_IN1, SDMMC2_CMD, FMC_NE1, EVENTOUT
C12 PC12 bidirectional Port C pin 12; TRACED3, HRTIM_EEV2, SPI3_MOSI/I2S3_SDO, USART3_CK, UART5_TX, SDMMC1_CK, DCMI_D9, EVENTOUT
C13 VSS power_in Ground connection
C14 PI3 bidirectional Port I pin 3; TIM8_ETR, SPI2_MOSI/I2S2_SDO, FMC_D27, DCMI_D10, EVENTOUT
C15 PA13 (JTMS/SWDIO) bidirectional
C16 VSS power_in Ground connection
C17 VDDLDO power_in Supply voltage for internal LDO regulator
D10 PJ14 bidirectional Port J pin 14; LCD_B2, EVENTOUT
D11 PJ12 bidirectional Port J pin 12; TRGOUT, LCD_G3, LCD_B0, EVENTOUT
D12 PD2 bidirectional Port D pin 2; TRACED2, TIM3_ETR, UART5_RX, SDMMC1_CMD, DCMI_D11, EVENTOUT
D13 PD0 bidirectional
D14 PA10 bidirectional Port A pin 10; TIM1_CH3, HRTIM_CHC2, LPUART1_RX, USART1_RX, FDCAN1_TXFD_MODE, OTG_FS_ID, MDIOS_MDIO, LCD_B4, DCMI_D1, LCD_B1, EVENTOUT
D15 PA9 bidirectional Port A pin 9; TIM1_CH2, HRTIM_CHC1, LPUART1_TX, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX, FDCAN1_RXFD_MODE, DCMI_D0, LCD_R5, EVENTOUT with OTG_FS_VBUS
D16 PH13 bidirectional Port H pin 13; TIM8_CH1N, UART4_TX, FDCAN1_TX, FMC_D21, LCD_G2, EVENTOUT
D17 VCAP power_in External capacitor connection for voltage regulator stabilization
E10 PJ13 bidirectional Port J pin 13; LCD_B4, LCD_B1, EVENTOUT
E11 VDD power_in Main supply voltage
E12 PD1 bidirectional Port D pin 1; DFSDM1_DATIN6, SAI3_SD_A, UART4_TX, FDCAN1_TX, FMC_D3/FMC_DA3, EVENTOUT
E13 PC8 bidirectional Port C pin 8; TRACED1, HRTIM_CHB1, TIM3_CH3, TIM8_CH3, USART6_CK, UART5_RTS/UART5_DE, FMC_NE2/FMC_NCE, SWPMI_RX, SDMMC1_D0, DCMI_D2, EVENTOUT
E14 PC9 bidirectional Port C pin 9; MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, UART5_CTS, QUADSPI_BK1_IO0, LCD_G3, SWPMI_SUSPEND, SDMMC1_D1, DCMI_D3, LCD_B2, EVENTOUT
E15 PA8 bidirectional Port A pin 8; MCO1, TIM1_CH1, HRTIM_CHB2, TIM8_BKIN2, I2C3_SCL, USART1_CK, OTG_FS_SOF, UART7_RX, TIM8_BKIN2_COMP12, LCD_B3, LCD_R6, EVENTOUT
E16 PA12 bidirectional Port A pin 12; TIM1_ETR, HRTIM_CHD2, LPUART1_RTS/LPUART1_DE, SPI2_SCK/I2S2_CK, UART4_TX, USART1_RTS/USART1_DE, SAI2_FS_B, FDCAN1_TX, OTG_FS_DP, LCD_R5, EVENTOUT
E17 PA11 bidirectional
F13 PC7 bidirectional Port C pin 7; TRGIO, HRTIM_CHA2, TIM3_CH2, TIM8_CH2, DFSDM1_DATIN3, I2S3_MCK, USART6_RX, SDMMC1_D123DIR, FMC_NE1, SDMMC2_D7, SWPMI_TX, SDMMC1_D7, DCMI_D1, LCD_G6, EVENTOUT
F14 PC6 bidirectional Port C pin 6; HRTIM_CHA1, TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, I2S2_MCK, USART6_TX, SDMMC1_D0DIR, FMC_NWAIT, SDMMC2_D6, SDMMC1_D6, DCMI_D0, LCD_HSYNC, EVENTOUT with SWPMI_IO
F15 PG8 bidirectional Port G pin 8; TIM8_ETR, SPI6_NSS, USART6_RTS/USART6_DE, SPDIFRX1_IN3, ETH_PPS_OUT, FMC_SDCLK, LCD_G7, EVENTOUT
F16 PG7 bidirectional Port G pin 7; HRTIM_CHE2, SAI1_MCLK_A, USART6_CK, FMC_INT, DCMI_D13, LCD_CLK, EVENTOUT
F17 VDD33_USB power_in USB domain supply voltage (3.3V)
G10 VSS power_in Ground connection
G11 VSS power_in Ground connection
G13 VDD power_in Main supply voltage
G14 PG5 bidirectional Port G pin 5; TIM1_ETR, FMC_A15/FMC_BA1, EVENTOUT
G15 PG6 bidirectional Port G pin 6; TIM17_BKIN, HRTIM_CHE1, QUADSPI_BK1_NCS, FMC_NE3, DCMI_D12, LCD_R7, EVENTOUT
G16 VSS power_in Ground connection
G17 VDD50_USB power_in USB domain supply voltage (5.0V)
H10 VSS power_in Ground connection
H11 VSS power_in Ground connection
H13 VDD power_in Main supply voltage
H14 PG4 bidirectional Port G pin 4; TIM1_BKIN2, TIM1_BKIN2_COMP12, FMC_A14/FMC_BA0, EVENTOUT
H15 PG3 bidirectional Port G pin 3; TIM8_BKIN2, TIM8_BKIN2_COMP12, FMC_A13, EVENTOUT
H16 PG2 bidirectional Port G pin 2; TIM8_BKIN, TIM8_BKIN_COMP12, FMC_A12, EVENTOUT
H17 PK2 bidirectional Port K pin 2; TIM1_BKIN, TIM8_BKIN, TIM8_BKIN_COMP12, TIM1_BKIN_COMP12, LCD_G7, EVENTOUT
J10 VSS power_in Ground connection
J11 VSS power_in Ground connection
J13 VDD power_in Main supply voltage
J14 PK0 bidirectional
J15 PK1 bidirectional
J16 VSS power_in Ground connection
J17 VSS power_in Ground connection
K10 VSS power_in Ground connection
K11 VSS power_in Ground connection
K13 VDD power_in Main supply voltage
K14 PJ11 bidirectional Port J pin 11; TIM1_CH2, TIM8_CH2N, SPI5_MISO, LCD_G4, EVENTOUT
K15 VSS power_in Ground connection
K16 NC unconnected
K17 NC unconnected
L10 VSS power_in Ground connection
L11 VSS power_in Ground connection
L13 VDD power_in Main supply voltage
L14 PJ10 bidirectional Port J pin 10; TIM1_CH2N, TIM8_CH2, SPI5_MOSI, LCD_G3, EVENTOUT
L15 VSS power_in Ground connection
L16 NC unconnected
L17 NC unconnected
M13 VDD power_in Main supply voltage
M14 PJ9 bidirectional Port J pin 9; TIM1_CH3, TIM8_CH1N, UART8_RX, LCD_G2, EVENTOUT
M15 VSS power_in Ground connection
M16 NC unconnected
M17 NC unconnected
N10 VDD power_in Main supply voltage
N11 VDD power_in Main supply voltage
N12 VDD power_in Main supply voltage
N13 PJ8 bidirectional Port J pin 8; TIM1_CH3N, TIM8_CH1, UART8_TX, LCD_G1, EVENTOUT
N14 PJ7 bidirectional Port J pin 7; TRGIN, TIM8_CH2N, LCD_G0, EVENTOUT
N15 PJ6 bidirectional
N16 VSS power_in Ground connection
N17 NC unconnected
P10 PE11 bidirectional Port E pin 11; TIM1_CH2, DFSDM1_CKIN4, SPI4_NSS, SAI2_SD_B, FMC_D8/FMC_DA8, LCD_G3, EVENTOUT with COMP2_INP
P11 PB10 bidirectional Port B pin 10; TIM2_CH3, HRTIM_SCOUT, LPTIM2_IN1, I2C2_SCL, SPI2_SCK/I2S2_CK, DFSDM1_DATIN7, USART3_TX, QUADSPI_BK1_NCS, OTG_HS_ULPI_D3, ETH_MII_RX_ER, LCD_G4, EVENTOUT
P12 PB11 bidirectional Port B pin 11; TIM2_CH4, HRTIM_SCIN, LPTIM2_ETR, I2C2_SDA, DFSDM1_CKIN7, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN/ETH_RMII_TX_EN, LCD_G5, EVENTOUT
P13 PH10 bidirectional Port H pin 10; TIM5_CH1, I2C4_SMBA, FMC_D18, DCMI_D1, LCD_R4, EVENTOUT
P14 PH11 bidirectional Port H pin 11; TIM5_CH2, I2C4_SCL, FMC_D19, DCMI_D2, LCD_R5, EVENTOUT
P15 PD15 bidirectional Port D pin 15; TIM4_CH4, SAI3_MCLK_A, UART8_RTS/UART8_DE, FMC_D1/FMC_DA1, EVENTOUT
P16 PD14 bidirectional Port D pin 14; TIM4_CH3, SAI3_MCLK_B, UART8_CTS, FMC_D0/FMC_DA0, EVENTOUT
P17 VDD power_in Main supply voltage
R10 PE12 bidirectional
R11 PE15 bidirectional Port E pin 15; TIM1_BKIN, FMC_D12/FMC_DA12, TIM1_BKIN_COMP12/COMP_TIM1_BKIN, LCD_R7, EVENTOUT
R12 PJ5 bidirectional Port J pin 5; LCD_R6, EVENTOUT
R13 PH9 bidirectional Port H pin 9; TIM12_CH2, I2C3_SMBA, FMC_D17, DCMI_D0, LCD_R3, EVENTOUT
R14 PH12 bidirectional Port H pin 12; TIM5_CH3, I2C4_SDA, FMC_D20, DCMI_D3, LCD_R6, EVENTOUT
R15 PD11 bidirectional Port D pin 11; LPTIM2_IN2, I2C4_SMBA, USART3_CTS/USART3_NSS, QUADSPI_BK1_IO0, SAI2_SD_A, FMC_A16, EVENTOUT
R16 PD12 bidirectional Port D pin 12; LPTIM1_IN1, TIM4_CH1, LPTIM2_IN1, I2C4_SCL, USART3_RTS/USART3_DE, QUADSPI_BK1_IO1, SAI2_FS_A, FMC_A17, EVENTOUT
R17 PD13 bidirectional Port D pin 13; LPTIM1_OUT, TIM4_CH2, I2C4_SDA, QUADSPI_BK1_IO3, SAI2_SCK_A, FMC_A18, EVENTOUT
T10 PE13 bidirectional Port E pin 13; TIM1_CH3, DFSDM1_CKIN5, SPI4_MISO, SAI2_FS_B, FMC_D10/FMC_DA10, COMP2_OUT, LCD_DE, EVENTOUT
T11 PH6 bidirectional
T12 VSS power_in Ground connection
T13 PH8 bidirectional
T14 PB12 bidirectional Port B pin 12; TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, DFSDM1_DATIN1, USART3_CK, FDCAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0, OTG_HS_ID, TIM1_BKIN_COMP12, UART5_RX, EVENTOUT
T15 PB15 bidirectional Port B pin 15; RTC_REFIN, TIM1_CH3N, TIM12_CH2, TIM8_CH3N, USART1_RX, SPI2_MOSI/I2S2_SDO, DFSDM1_CKIN2, UART4_CTS, SDMMC2_D1, OTG_HS_DP, EVENTOUT
T16 PD10 bidirectional Port D pin 10; DFSDM1_CKOUT, SAI3_FS_B, USART3_CK, FDCAN2_TXFD_MODE, FMC_D15/FMC_DA15, LCD_B3, EVENTOUT
T17 PD9 bidirectional Port D pin 9; DFSDM1_DATIN3, SAI3_SD_B, USART3_RX, FDCAN2_RXFD_MODE, FMC_D14/FMC_DA14, EVENTOUT
U10 PE14 bidirectional
U11 VCAP power_in External capacitor connection for voltage regulator stabilization
U12 VDDLDO power_in Supply voltage for internal LDO regulator
U13 PH7 bidirectional Port H pin 7; I2C3_SCL, SPI5_MISO, ETH_MII_RXD3, FMC_SDCKE1, DCMI_D9, EVENTOUT
U14 PB13 bidirectional Port B pin 13; TIM1_CH1N, LPTIM2_OUT, SPI2_SCK/I2S2_CK, DFSDM1_CKIN1, USART3_CTS/USART3_NSS, FDCAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1/ETH_RMII_TXD1, UART5_TX, EVENTOUT with OTG_HS_VBUS
U15 PB14 bidirectional Port B pin 14; TIM1_CH2N, TIM12_CH1, TIM8_CH2N, USART1_TX, SPI2_MISO/I2S2_SDI, DFSDM1_DATIN2, USART3_RTS/USART3_DE, UART4_RTS/UART4_DE, SDMMC2_D0, OTG_HS_DM, EVENTOUT
U16 PD8 bidirectional Port D pin 8; DFSDM1_CKIN3, SAI3_SCK_B, USART3_TX, SPDIFRX1_IN2, FMC_D13/FMC_DA13, EVENTOUT
U17 VSS power_in Ground connection

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TFBGA-265
Category Embedded Processors & Controllers
Pins 265

CAD (KiCad official)

  • Symbol: STM32H753XIH6
  • Footprint: Package_BGA:TFBGA-265_14x14mm_Layout17x17_P0.8mm
  • 3D model: TFBGA-265 (KiCad packages3D, STEP)
  • 3D model files: stm32h753xih6-etched.step / stm32h753xih6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32h753xih6.step / stm32h753xih6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (356 pp, sha256 61fe6bb884401fbd, retrieved 2026-09-29, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF