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STM32H745ZIT6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32h745zit6factory-2.0.0extractor-text
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Symbol & Footprint

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Contents

README

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STM32H745ZIT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-144(20x20)

STM32H745ZIT6 from STMicroelectronics, in a LQFP-144(20x20). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional GPIO Port E pin 2, can function as TRACECLK, SAI1_CK1, SPI4_SCK, SAI1_MCLK_A, SAI4_MCLK_A, QUADSPI_BK1_IO2, SAI4_CK1, ETH_MII_TXD3, FMC_A23, or EVENTOUT in alternate function modes.
2 PE3 bidirectional GPIO Port E pin 3, can function as TRACED0, TIM15_BKIN, SAI1_SD_B, SAI4_SD_B, FMC_A19, or EVENTOUT in alternate function modes.
3 PE4 bidirectional GPIO Port E pin 4, can function as TRACED1, SAI1_D2, DFSDM1_DATIN3, TIM15_CH1N, SPI4_NSS, SAI1_FS_A, SAI4_FS_A, SAI4_D2, FMC_A20, DCMI_D4, LCD_B0, or EVENTOUT in alternate function modes.
4 PE5 bidirectional GPIO Port E pin 5, can function as TRACED2, SAI1_CK2, DFSDM1_CKIN3, TIM15_CH1, SPI4_MISO, SAI1_SCK_A, SAI4_SCK_A, SAI4_CK2, FMC_A21, DCMI_D6, LCD_G0, or EVENTOUT in alternate function modes.
5 PE6 bidirectional GPIO Port E pin 6, can function as TRACED3, TIM1_BKIN2, SAI1_D1, TIM15_CH2, SPI4_MOSI, SAI1_SD_A, SAI4_SD_A, SAI4_D1, SAI2_MCLK_B, TIM1_BKIN2_COMP12, FMC_A22, DCMI_D7, LCD_G1, or EVENTOUT in alternate function modes.
6 VSS power_in Ground power supply connection.
7 VDD power_in Main 1.62 to 3.6 V power supply pin.
8 VBAT power_in Backup domain power supply, 1.2 to 3.6 V.
9 PC13 bidirectional GPIO Port C pin 13, can function as EVENTOUT or RTC_TAMP1/RTC_TS/WKUP2 in alternate function modes.
10 PC14-OSC32_IN (OSC32_IN) bidirectional GPIO Port C pin 14 for 32 kHz oscillator input, functions as OSC32_IN or EVENTOUT.
11 PC15-OSC32_OUT (OSC32_OUT) bidirectional GPIO Port C pin 15 for 32 kHz oscillator output, functions as OSC32_OUT or EVENTOUT.
12 VSS power_in Ground power supply connection.
13 VDD power_in Main 1.62 to 3.6 V power supply pin.
14 VSSSMPS power_in SMPS step-down converter ground connection.
15 VLXSMPS power_in SMPS step-down converter switching node (inductor connection).
16 VDDSMPS power_in SMPS step-down converter power supply input.
17 VFBSMPS power_in SMPS step-down converter feedback voltage pin.
18 VSS power_in Ground power supply connection.
19 VDD power_in Main 1.62 to 3.6 V power supply pin.
20 PF6 bidirectional GPIO Port F pin 6, can function as TIM16_CH1, SPI5_NSS, SAI1_SD_B, UART7_RX, SAI4_SD_B, QUADSPI_BK1_IO3, or EVENTOUT in alternate function modes; supports analog inputs ADC3_INN4, ADC3_INP8.
21 PF7 bidirectional GPIO Port F pin 7, can function as TIM17_CH1, SPI5_SCK, SAI1_MCLK_B, UART7_TX, SAI4_MCLK_B, QUADSPI_BK1_IO2, or EVENTOUT in alternate function modes; supports analog input ADC3_INP3.
22 PF8 bidirectional GPIO Port F pin 8, can function as TIM16_CH1N, SPI5_MISO, SAI1_SCK_B, UART7_RTS/UART7_DE, SAI4_SCK_B, TIM13_CH1, QUADSPI_BK1_IO0, or EVENTOUT in alternate function modes; supports analog inputs ADC3_INN3, ADC3_INP7.
23 PF9 bidirectional GPIO Port F pin 9, can function as TIM17_CH1N, SPI5_MOSI, SAI1_FS_B, UART7_CTS, SAI4_FS_B, TIM14_CH1, QUADSPI_BK1_IO1, or EVENTOUT in alternate function modes; supports analog input ADC3_INP2.
24 PF10 bidirectional GPIO Port F pin 10, can function as TIM16_BKIN, SAI1_D3, QUADSPI_CLK, SAI4_D3, DCMI_D11, LCD_DE, or EVENTOUT in alternate function modes; supports analog inputs ADC3_INN2, ADC3_INP6.
25 PH0-OSC_IN (PH0) bidirectional GPIO Port H pin 0 for main oscillator input, functions as OSC_IN or EVENTOUT.
26 PH1-OSC_OUT (PH1) bidirectional GPIO Port H pin 1 for main oscillator output, functions as OSC_OUT or EVENTOUT.
27 NRST input Reset pin with embedded weak pull-up resistor, used for device reset control and status monitoring.
28 PC0 bidirectional GPIO Port C pin 0, can function as DFSDM1_CKIN0, DFSDM1_DATIN4, SAI2_FS_B, OTG_HS_ULPI_STP, FMC_SDNWE, LCD_R5, or EVENTOUT in alternate function modes; supports analog input ADC123_INP10.
29 PC1 bidirectional GPIO Port C pin 1, can function as TRACED0, SAI1_D1, DFSDM1_DATIN0, DFSDM1_CKIN4, SPI2_MOSI/I2S2_SDO, SAI1_SD_A, SAI4_SD_A, SDMMC2_CK, SAI4_D1, ETH_MDC, MDIOS_MDC, or EVENTOUT in alternate function modes; supports analog inputs and RTC_TAMP3/WKUP5.
30 PC2_C bidirectional GPIO Port C pin 2 analog alternative pad, can function as C1DSLEEP, DFSDM1_CKIN1, SPI2_MISO/I2S2_SDI, DFSDM1_CKOUT, OTG_HS_ULPI_DIR, ETH_MII_TXD2, FMC_SDNE0, or EVENTOUT in alternate function modes; supports analog inputs ADC123_INN11, ADC123_INP12.
31 PC3_C bidirectional GPIO Port C pin 3 analog alternative pad, can function as C1SLEEP, DFSDM1_DATIN1, SPI2_MOSI/I2S2_SDO, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, FMC_SDCKE0, or EVENTOUT in alternate function modes; supports analog inputs ADC12_INN12, ADC12_INP13.
32 VDD power_in Main 1.62 to 3.6 V power supply pin.
33 VSS power_in Ground power supply connection.
34 VSSA power_in Analog ground power supply connection.
35 VREF+ power_in Positive voltage reference for analog peripherals, 0 to VDDA.
36 VDDA power_in Analog power supply, 1.62 to 3.6 V.
37 PA0 bidirectional GPIO Port A pin 0, can function as TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, TIM15_BKIN, USART2_CTS/USART2_NSS, UART4_TX, SDMMC2_CMD, SAI2_SD_B, ETH_MII_CRS, or EVENTOUT in alternate function modes; supports WKUP0 and analog inputs ADC1_INP16.
38 PA1 bidirectional GPIO Port A pin 1, can function as TIM2_CH2, TIM5_CH2, LPTIM3_OUT, TIM15_CH1N, USART2_RTS/USART2_DE, UART4_RX, QUADSPI_BK1_IO3, SAI2_MCLK_B, ETH_MII_RX_CLK/ETH_RMII_REF_CLK, LCD_R2, or EVENTOUT in alternate function modes; supports analog inputs ADC1_INN16, ADC1_INP17.
39 PA2 bidirectional GPIO Port A pin 2, can function as TIM2_CH3, TIM5_CH3, LPTIM4_OUT, TIM15_CH1, USART2_TX, SAI2_SCK_B, ETH_MDIO, MDIOS_MDIO, LCD_R1, or EVENTOUT in alternate function modes; supports WKUP1 and analog input ADC12_INP14.
40 PA3 bidirectional GPIO Port A pin 3, can function as TIM2_CH4, TIM5_CH4, LPTIM5_OUT, TIM15_CH2, USART2_RX, LCD_B2, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5, or EVENTOUT in alternate function modes; supports analog input ADC12_INP15.
41 VSS power_in Ground power supply connection.
42 VDD power_in Main 1.62 to 3.6 V power supply pin.
43 PA4 bidirectional GPIO Port A pin 4, can function as D1PWREN, TIM5_ETR, SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, USART2_CK, SPI6_NSS, OTG_HS_SOF, DCMI_HSYNC, LCD_VSYNC, or EVENTOUT in alternate function modes; supports analog inputs ADC12_INP18 and DAC1_OUT1.
44 PA5 bidirectional GPIO Port A pin 5, can function as D2PWREN, TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK/I2S1_CK, SPI6_SCK, OTG_HS_ULPI_CK, LCD_R4, or EVENTOUT in alternate function modes; supports analog inputs ADC12_INN18, ADC12_INP19 and DAC1_OUT2.
45 PA6 bidirectional GPIO Port A pin 6, can function as TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO/I2S1_SDI, SPI6_MISO, TIM13_CH1, TIM8_BKIN_COMP12, MDIOS_MDC, TIM1_BKIN_COMP12, DCMI_PIXCLK, LCD_G2, or EVENTOUT in alternate function modes; supports analog input ADC12_INP3.
46 PA7 bidirectional GPIO Port A pin 7, can function as TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI/I2S1_SDO, SPI6_MOSI, TIM14_CH1, ETH_MII_RX_DV/ETH_RMII_CRS_DV, FMC_SDNWE, or EVENTOUT in alternate function modes; supports analog inputs ADC12_INN3, ADC12_INP7 and OPAMP1_VINM.
47 PC4 bidirectional GPIO Port C pin 4, can function as C2DSLEEP, DFSDM1_CKIN2, I2S1_MCK, SPDIFRX1_IN3, ETH_MII_RXD0/ETH_RMII_RXD0, FMC_SDNE0, or EVENTOUT in alternate function modes; supports analog inputs ADC12_INP4, OPAMP1_VOUT, and COMP1_INM.
48 PC5 bidirectional GPIO Port C pin 5, can function as C2SLEEP, SAI1_D3, DFSDM1_DATIN2, SPDIFRX1_IN4, SAI4_D3, ETH_MII_RXD1/ETH_RMII_RXD1, FMC_SDCKE0, or EVENTOUT in alternate function modes; supports analog inputs ADC12_INN4, ADC12_INP8, OPAMP1_VINM, and COMP1_OUT.
49 PB0 bidirectional GPIO Port B pin 0, can function as TIM1_CH2N, TIM3_CH3, TIM8_CH2N, DFSDM1_CKOUT, UART4_CTS, LCD_R3, OTG_HS_ULPI_D1, ETH_MII_RXD2, LCD_G1, or EVENTOUT in alternate function modes; supports analog inputs ADC12_INN5, ADC12_INP9, OPAMP1_VINP, and COMP1_INP.
50 PB1 bidirectional GPIO Port B pin 1, can function as TIM1_CH3N, TIM3_CH4, TIM8_CH3N, DFSDM1_DATIN1, LCD_R6, OTG_HS_ULPI_D2, ETH_MII_RXD3, LCD_G0, or EVENTOUT in alternate function modes; supports analog input ADC12_INP5 and COMP1_INM.
51 PB2 bidirectional GPIO Port B pin 2, can function as RTC_OUT, SAI1_D1, DFSDM1_CKIN1, SAI1_SD_A, SPI3_MOSI/I2S3_SDO, SAI4_SD_A, QUADSPI_CLK, SAI4_D1, or EVENTOUT in alternate function modes; supports COMP1_INP.
52 PF11 bidirectional GPIO Port F pin 11, can function as SPI5_MOSI, SAI2_SD_B, FMC_SDNRAS, DCMI_D12, or EVENTOUT in alternate function modes; supports analog input ADC1_INP2.
53 PF14 bidirectional GPIO Port F pin 14, can function as DFSDM1_CKIN6, I2C4_SCL, FMC_A8, or EVENTOUT in alternate function modes; supports analog inputs ADC2_INN2, ADC2_INP6.
54 PF15 bidirectional GPIO Port F pin 15, can function as I2C4_SDA or FMC_A9, EVENTOUT in alternate function modes.
55 VSS power_in Ground power supply connection.
56 VDD power_in Main 1.62 to 3.6 V power supply pin.
57 PE7 bidirectional GPIO Port E pin 7, can function as TIM1_ETR, DFSDM1_DATIN2, UART7_RX, QUADSPI_BK2_IO0, FMC_D4/FMC_DA4, or EVENTOUT in alternate function modes; supports OPAMP2_VOUT and COMP2_INM.
58 PE8 bidirectional GPIO Port E pin 8, can function as TIM1_CH1N, DFSDM1_CKIN2, UART7_TX, QUADSPI_BK2_IO1, FMC_D5/FMC_DA5, or EVENTOUT in alternate function modes; supports OPAMP2_VINM and COMP2_OUT.
59 PE9 bidirectional GPIO Port E pin 9, can function as TIM1_CH1, DFSDM1_CKOUT, UART7_RTS/UART7_DE, QUADSPI_BK2_IO2, FMC_D6/FMC_DA6, or EVENTOUT in alternate function modes; supports OPAMP2_VINP and COMP2_INP.
60 PE10 bidirectional GPIO Port E pin 10, can function as TIM1_CH2N, DFSDM1_DATIN4, UART7_CTS, QUADSPI_BK2_IO3, FMC_D7/FMC_DA7, or EVENTOUT in alternate function modes; supports COMP2_INM.
61 PE11 bidirectional GPIO Port E pin 11, can function as TIM1_CH2, DFSDM1_CKIN4, SPI4_NSS, SAI2_SD_B, FMC_D8/FMC_DA8, LCD_G3, or EVENTOUT in alternate function modes; supports COMP2_INP.
62 PE12 bidirectional GPIO Port E pin 12, can function as TIM1_CH3N, DFSDM1_DATIN5, SPI4_SCK, SAI2_SCK_B, FMC_D9/FMC_DA9, LCD_B4, or EVENTOUT in alternate function modes; supports COMP1_OUT.
63 PE13 bidirectional GPIO Port E pin 13, can function as TIM1_CH3, DFSDM1_CKIN5, SPI4_MISO, SAI2_FS_B, FMC_D10/FMC_DA10, LCD_DE, or EVENTOUT in alternate function modes; supports COMP2_OUT.
64 PE14 bidirectional GPIO Port E pin 14, can function as TIM1_CH4, SPI4_MOSI, SAI2_MCLK_B, FMC_D11/FMC_DA11, LCD_CLK, or EVENTOUT in alternate function modes.
65 PE15 bidirectional GPIO Port E pin 15, can function as TIM1_BKIN, FMC_D12/FMC_DA12, TIM1_BKIN_COMP12/COMP_TIM1_BKIN, LCD_R7, or EVENTOUT in alternate function modes.
66 PB10 bidirectional GPIO Port B pin 10, can function as TIM2_CH3, HRTIM_SCOUT, LPTIM2_IN1, I2C2_SCL, SPI2_SCK/I2S2_CK, DFSDM1_DATIN7, USART3_TX, QUADSPI_BK1_NCS, OTG_HS_ULPI_D3, ETH_MII_RX_ER, LCD_G4, or EVENTOUT in alternate function modes.
67 PB11 bidirectional GPIO Port B pin 11, can function as TIM2_CH4, HRTIM_SCIN, LPTIM2_ETR, I2C2_SDA, DFSDM1_CKIN7, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN/ETH_RMII_TX_EN, LCD_G5, or EVENTOUT in alternate function modes.
68 VCAP power_in Decoupling capacitor connection for main regulator stabilization, requires 2.2 µF external capacitor with ESR < 100 mΩ.
69 VSS power_in Ground power supply connection.
70 VDDLDO power_in LDO regulator output power supply, approximately 3.3 V.
71 VDD power_in Main 1.62 to 3.6 V power supply pin.
72 PB12 bidirectional GPIO Port B pin 12, can function as TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, DFSDM1_DATIN1, USART3_CK, FDCAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0, OTG_HS_ID, TIM1_BKIN_COMP12, UART5_RX, or EVENTOUT in alternate function modes.
73 PB13 bidirectional GPIO Port B pin 13, can function as TIM1_CH1N, LPTIM2_OUT, SPI2_SCK/I2S2_CK, DFSDM1_CKIN1, USART3_CTS/USART3_NSS, FDCAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1/ETH_RMII_TXD1, UART5_TX, or EVENTOUT in alternate function modes; supports OTG_HS_VBUS.
74 PB14 bidirectional GPIO Port B pin 14, can function as TIM1_CH2N, TIM12_CH1, TIM8_CH2N, USART1_TX, SPI2_MISO/I2S2_SDI, DFSDM1_DATIN2, USART3_RTS/USART3_DE, UART4_RTS/UART4_DE, SDMMC2_D0, OTG_HS_DM, or EVENTOUT in alternate function modes.
75 PB15 bidirectional GPIO Port B pin 15, can function as RTC_REFIN, TIM1_CH3N, TIM12_CH2, TIM8_CH3N, USART1_RX, SPI2_MOSI/I2S2_SDO, DFSDM1_CKIN2, UART4_CTS, SDMMC2_D1, OTG_HS_DP, or EVENTOUT in alternate function modes.
76 PD8 bidirectional GPIO Port D pin 8, can function as DFSDM1_CKIN3, SAI3_SCK_B, USART3_TX, SPDIFRX1_IN2, FMC_D13/FMC_DA13, or EVENTOUT in alternate function modes.
77 PD9 bidirectional GPIO Port D pin 9, can function as DFSDM1_DATIN3, SAI3_SD_B, USART3_RX, FDCAN2_RXFD_MODE, FMC_D14/FMC_DA14, or EVENTOUT in alternate function modes.
78 PD10 bidirectional GPIO Port D pin 10, can function as DFSDM1_CKOUT, SAI3_FS_B, USART3_CK, FDCAN2_TXFD_MODE, FMC_D15/FMC_DA15, LCD_B3, or EVENTOUT in alternate function modes.
79 VDD power_in Main 1.62 to 3.6 V power supply pin.
80 VSS power_in Ground power supply connection.
81 PD11 bidirectional GPIO Port D pin 11, can function as LPTIM2_IN2, I2C4_SMBA, USART3_CTS/USART3_NSS, QUADSPI_BK1_IO0, SAI2_SD_A, FMC_A16, or EVENTOUT in alternate function modes.
82 PD12 bidirectional GPIO Port D pin 12, can function as LPTIM1_IN1, TIM4_CH1, LPTIM2_IN1, I2C4_SCL, USART3_RTS/USART3_DE, QUADSPI_BK1_IO1, SAI2_FS_A, FMC_A17, or EVENTOUT in alternate function modes.
83 PD13 bidirectional GPIO Port D pin 13, can function as LPTIM1_OUT, TIM4_CH2, I2C4_SDA, QUADSPI_BK1_IO3, SAI2_SCK_A, FMC_A18, or EVENTOUT in alternate function modes.
84 PD14 bidirectional GPIO Port D pin 14, can function as TIM4_CH3, SAI3_MCLK_B, UART8_CTS, FMC_D0/FMC_DA0, or EVENTOUT in alternate function modes.
85 PD15 bidirectional GPIO Port D pin 15, can function as TIM4_CH4, SAI3_MCLK_A, UART8_RTS/UART8_DE, FMC_D1/FMC_DA1, or EVENTOUT in alternate function modes.
86 PG6 bidirectional GPIO Port G pin 6, can function as TIM17_BKIN, HRTIM_CHE1, QUADSPI_BK1_NCS, FMC_NE3, DCMI_D12, LCD_R7, or EVENTOUT in alternate function modes.
87 PG7 bidirectional GPIO Port G pin 7, can function as HRTIM_CHE2, SAI1_MCLK_A, USART6_CK, FMC_INT, DCMI_D13, LCD_CLK, or EVENTOUT in alternate function modes.
88 PG8 bidirectional GPIO Port G pin 8, can function as TIM8_ETR, SPI6_NSS, USART6_RTS/USART6_DE, SPDIFRX1_IN3, ETH_PPS_OUT, FMC_SDCLK, LCD_G7, or EVENTOUT in alternate function modes.
89 VSS power_in Ground power supply connection.
90 VDD50_USB power_in 5V power supply for USB OTG high-speed PHY, 4.5 to 5.5 V.
91 VDD33_USB power_in 3.3V power supply for USB, 3.0 to 3.6 V with embedded 3.3V internal regulator.
92 VDD power_in Main 1.62 to 3.6 V power supply pin.
93 PC6 bidirectional GPIO Port C pin 6, can function as HRTIM_CHA1, TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, I2S2_MCK, USART6_TX, SDMMC1_D0DIR, FMC_NWAIT, SDMMC2_D6, SDMMC1_D6, DCMI_D0, LCD_HSYNC, or EVENTOUT in alternate function modes; supports SWPMI_IO.
94 PC7 bidirectional GPIO Port C pin 7, can function as TRGIO, HRTIM_CHA2, TIM3_CH2, TIM8_CH2, DFSDM1_DATIN3, I2S3_MCK, USART6_RX, SDMMC1_D123DIR, FMC_NE1, SDMMC2_D7, SWPMI_TX, SDMMC1_D7, DCMI_D1, LCD_G6, or EVENTOUT in alternate function modes.
95 PC8 bidirectional GPIO Port C pin 8, can function as TRACED1, HRTIM_CHB1, TIM3_CH3, TIM8_CH3, USART6_CK, UART5_RTS/UART5_DE, FMC_NE2/FMC_NCE, SWPMI_RX, SDMMC1_D0, DCMI_D2, or EVENTOUT in alternate function modes.
96 PC9 bidirectional GPIO Port C pin 9, can function as MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, UART5_CTS, QUADSPI_BK1_IO0, LCD_G3, SWPMI_SUSPEND, SDMMC1_D1, DCMI_D3, LCD_B2, or EVENTOUT in alternate function modes.
97 PA8 bidirectional GPIO Port A pin 8, can function as MCO1, TIM1_CH1, HRTIM_CHB2, TIM8_BKIN2, I2C3_SCL, USART1_CK, OTG_FS_SOF, UART7_RX, TIM8_BKIN2_COMP12, LCD_B3, LCD_R6, or EVENTOUT in alternate function modes.
98 PA9 bidirectional GPIO Port A pin 9, can function as TIM1_CH2, HRTIM_CHC1, LPUART1_TX, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX, FDCAN1_RXFD_MODE, DCMI_D0, LCD_R5, or EVENTOUT in alternate function modes; supports OTG_FS_VBUS.
99 PA10 bidirectional GPIO Port A pin 10, can function as TIM1_CH3, HRTIM_CHC2, LPUART1_RX, USART1_RX, FDCAN1_TXFD_MODE, OTG_FS_ID, MDIOS_MDIO, LCD_B4, DCMI_D1, LCD_B1, or EVENTOUT in alternate function modes.
100 PA11 bidirectional GPIO Port A pin 11, can function as TIM1_CH4, HRTIM_CHD1, LPUART1_CTS, SPI2_NSS/I2S2_WS, UART4_RX, USART1_CTS/USART1_NSS, FDCAN1_RX, OTG_FS_DM, LCD_R4, or EVENTOUT in alternate function modes.
101 PA12 bidirectional GPIO Port A pin 12, can function as TIM1_ETR, HRTIM_CHD2, LPUART1_RTS/LPUART1_DE, SPI2_SCK/I2S2_CK, UART4_TX, USART1_RTS/USART1_DE, SAI2_FS_B, FDCAN1_TX, OTG_FS_DP, LCD_R5, or EVENTOUT in alternate function modes.
102 PA13 (JTMS/SWDIO) bidirectional JTMS/SWDIO pin for JTAG/SWD debug interface with I/O capability, functions as JTMS-SWDIO or EVENTOUT.
103 VCAP power_in Decoupling capacitor connection for main regulator stabilization, requires 2.2 µF external capacitor with ESR < 100 mΩ.
104 VSS power_in Ground power supply connection.
105 VDDLDO power_in LDO regulator output power supply, approximately 3.3 V.
106 VDD power_in Main 1.62 to 3.6 V power supply pin.
107 PA14 (JTCK/SWCLK) bidirectional JTCK/SWCLK pin for JTAG/SWD debug interface with I/O capability, functions as JTCK-SWCLK or EVENTOUT.
108 PA15 (JTDI) bidirectional JTDI pin for JTAG debug interface, can function as JTDI, TIM2_CH1/TIM2_ETR, HRTIM_FLT1, CEC, SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, SPI6_NSS, UART4_RTS/UART4_DE, UART7_TX, or EVENTOUT in alternate function modes.
109 PC10 bidirectional GPIO Port C pin 10, can function as HRTIM_EEV1, DFSDM1_CKIN5, SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDMMC1_D2, DCMI_D8, LCD_R2, or EVENTOUT in alternate function modes.
110 PC11 bidirectional GPIO Port C pin 11, can function as HRTIM_FLT2, DFSDM1_DATIN5, SPI3_MISO/I2S3_SDI, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDMMC1_D3, DCMI_D4, or EVENTOUT in alternate function modes.
111 PC12 bidirectional GPIO Port C pin 12, can function as TRACED3, HRTIM_EEV2, SPI3_MOSI/I2S3_SDO, USART3_CK, UART5_TX, SDMMC1_CK, DCMI_D9, or EVENTOUT in alternate function modes.
112 PD0 bidirectional GPIO Port D pin 0, can function as DFSDM1_CKIN6, SAI3_SCK_A, UART4_RX, FDCAN1_RX, FMC_D2/FMC_DA2, or EVENTOUT in alternate function modes.
113 PD1 bidirectional GPIO Port D pin 1, can function as DFSDM1_DATIN6, SAI3_SD_A, UART4_TX, FDCAN1_TX, FMC_D3/FMC_DA3, or EVENTOUT in alternate function modes.
114 PD2 bidirectional GPIO Port D pin 2, can function as TRACED2, TIM3_ETR, UART5_RX, SDMMC1_CMD, DCMI_D11, or EVENTOUT in alternate function modes.
115 PD3 bidirectional GPIO Port D pin 3, can function as DFSDM1_CKOUT, SPI2_SCK/I2S2_CK, USART2_CTS/USART2_NSS, FMC_CLK, DCMI_D5, LCD_G7, or EVENTOUT in alternate function modes.
116 PD4 bidirectional GPIO Port D pin 4, can function as HRTIM_FLT3, SAI3_FS_A, USART2_RTS/USART2_DE, FDCAN1_RXFD_MODE, FMC_NOE, or EVENTOUT in alternate function modes.
117 PD5 bidirectional GPIO Port D pin 5, can function as HRTIM_EEV3, USART2_TX, FDCAN1_TXFD_MODE, FMC_NWE, or EVENTOUT in alternate function modes.
118 VSS power_in Ground power supply connection.
119 VDD power_in Main 1.62 to 3.6 V power supply pin.
120 PD6 bidirectional GPIO Port D pin 6, can function as SAI1_D1, DFSDM1_CKIN4, DFSDM1_DATIN1, SPI3_MOSI/I2S3_SDO, SAI1_SD_A, USART2_RX, SAI4_SD_A, FDCAN2_RXFD_MODE, SAI4_D1, SDMMC2_CK, FMC_NWAIT, DCMI_D10, LCD_B2, or EVENTOUT in alternate function modes.
121 PD7 bidirectional GPIO Port D pin 7, can function as DFSDM1_DATIN4, SPI1_MOSI/I2S1_SDO, DFSDM1_CKIN1, USART2_CK, SPDIFRX1_IN1, SDMMC2_CMD, FMC_NE1, or EVENTOUT in alternate function modes.
122 PG9 bidirectional GPIO Port G pin 9, can function as SPI1_MISO/I2S1_SDI, USART6_RX, SPDIFRX1_IN4, QUADSPI_BK2_IO2, SAI2_FS_B, FMC_NE2/FMC_NCE, DCMI_VSYNC, or EVENTOUT in alternate function modes.
123 PG10 bidirectional GPIO Port G pin 10, can function as HRTIM_FLT5, SPI1_NSS/I2S1_WS, LCD_G3, SAI2_SD_B, FMC_NE3, DCMI_D2, LCD_B2, or EVENTOUT in alternate function modes.
124 PG11 bidirectional GPIO Port G pin 11, can function as LPTIM1_IN2, HRTIM_EEV4, SPI1_SCK/I2S1_CK, SPDIFRX1_IN1, SDMMC2_D2, ETH_MII_TX_EN/ETH_RMII_TX_EN, DCMI_D3, LCD_B3, or EVENTOUT in alternate function modes.
125 PG12 bidirectional GPIO Port G pin 12, can function as LPTIM1_IN1, HRTIM_EEV5, SPI6_MISO, USART6_RTS/USART6_DE, SPDIFRX1_IN2, LCD_B4, ETH_MII_TXD1/ETH_RMII_TXD1, FMC_NE4, LCD_B1, or EVENTOUT in alternate function modes.
126 PG13 bidirectional GPIO Port G pin 13, can function as TRACED0, LPTIM1_OUT, HRTIM_EEV10, SPI6_SCK, USART6_CTS/USART6_NSS, ETH_MII_TXD0/ETH_RMII_TXD0, FMC_A24, LCD_R0, or EVENTOUT in alternate function modes.
127 PG14 bidirectional GPIO Port G pin 14, can function as TRACED1, LPTIM1_ETR, SPI6_MOSI, USART6_TX, QUADSPI_BK2_IO3, ETH_MII_TXD1/ETH_RMII_TXD1, FMC_A25, LCD_B0, or EVENTOUT in alternate function modes.
128 VSS power_in Ground power supply connection.
129 VDD power_in Main 1.62 to 3.6 V power supply pin.
130 PB3 (JTDO/TRACESWO) bidirectional JTDO/TRACESWO pin for JTAG debug interface and trace output, can function as JTDO/TRACESWO, TIM2_CH2, HRTIM_FLT4, SPI1_SCK/I2S1_CK, SPI3_SCK/I2S3_CK, SPI6_SCK, SDMMC2_D2, CRS_SYNC, UART7_RX, or EVENTOUT in alternate function modes.
131 PB4 (NJTRST) bidirectional NJTRST pin for JTAG reset interface, can function as NJTRST, TIM16_BKIN, TIM3_CH1, HRTIM_EEV6, SPI1_MISO/I2S1_SDI, SPI3_MISO/I2S3_SDI, SPI2_NSS/I2S2_WS, SPI6_MISO, SDMMC2_D3, UART7_TX, or EVENTOUT in alternate function modes.
132 PB5 bidirectional GPIO Port B pin 5, can function as TIM17_BKIN, TIM3_CH2, HRTIM_EEV7, I2C1_SMBA, SPI1_MOSI/I2S1_SDO, I2C4_SMBA, SPI3_MOSI/I2S3_SDO, SPI6_MOSI, FDCAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1, DCMI_D10, UART5_RX, or EVENTOUT in alternate function modes.
133 PB6 bidirectional GPIO Port B pin 6, can function as TIM16_CH1N, TIM4_CH1, HRTIM_EEV8, I2C1_SCL, CEC, I2C4_SCL, USART1_TX, LPUART1_TX, FDCAN2_TX, QUADSPI_BK1_NCS, DFSDM1_DATIN5, FMC_SDNE1, DCMI_D5, UART5_TX, or EVENTOUT in alternate function modes.
134 PB7 bidirectional GPIO Port B pin 7, can function as TIM17_CH1N, TIM4_CH2, HRTIM_EEV9, I2C1_SDA, I2C4_SDA, USART1_RX, LPUART1_RX, FDCAN2_TXFD_MODE, DFSDM1_CKIN5, FMC_NL, DCMI_VSYNC, or EVENTOUT in alternate function modes; supports PVD_IN.
135 BOOT0 input Boot configuration pin, determines execution start address after reset; must be sampled during power-up.
136 PB8 bidirectional GPIO Port B pin 8, can function as TIM16_CH1, TIM4_CH3, DFSDM1_CKIN7, I2C1_SCL, I2C4_SCL, SDMMC1_CKIN, UART4_RX, FDCAN1_RX, SDMMC2_D4, ETH_MII_TXD3, SDMMC1_D4, DCMI_D6, LCD_B6, or EVENTOUT in alternate function modes.
137 PB9 bidirectional GPIO Port B pin 9, can function as TIM17_CH1, TIM4_CH4, DFSDM1_DATIN7, I2C1_SDA, SPI2_NSS/I2S2_WS, I2C4_SDA, SDMMC1_CDIR, UART4_TX, FDCAN1_TX, SDMMC2_D5, I2C4_SMBA, SDMMC1_D5, DCMI_D7, LCD_B7, or EVENTOUT in alternate function modes.
138 PE0 bidirectional GPIO Port E pin 0, can function as LPTIM1_ETR, TIM4_ETR, HRTIM_SCIN, LPTIM2_ETR, UART8_RX, FDCAN1_RXFD_MODE, SAI2_MCLK_A, FMC_NBL0, DCMI_D2, or EVENTOUT in alternate function modes.
139 PE1 bidirectional GPIO Port E pin 1, can function as LPTIM1_IN2, HRTIM_SCOUT, UART8_TX, FDCAN1_TXFD_MODE, FMC_NBL1, DCMI_D3, or EVENTOUT in alternate function modes.
140 VCAP power_in Decoupling capacitor connection for main regulator stabilization, requires 2.2 µF external capacitor with ESR < 100 mΩ.
141 VSS power_in Ground power supply connection.
142 PDR_ON power_in Power domain regulator ON control input; when pulled low, disables the regulator for external VCORE supply.
143 VDDLDO power_in LDO regulator output power supply, approximately 3.3 V.
144 VDD power_in Main 1.62 to 3.6 V power supply pin.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-144(20x20)
Category Embedded Processors & Controllers
Pins 144

CAD (KiCad official)

  • Symbol: STM32H745ZIT6
  • Footprint: Package_QFP:LQFP-144_20x20mm_P0.5mm
  • 3D model: LQFP-144(20x20) (KiCad packages3D, STEP)
  • 3D model files: stm32h745zit6-etched.step / stm32h745zit6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32h745zit6.step / stm32h745zit6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (252 pp, sha256 d244663ee17e7c6c, retrieved 2026-09-29, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF