component
STM32H735AGI6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFBGA-169. Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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Publish 0.1.0
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docs/stm32h735agi6-datasheet.pdfadded⋯ 1 unchanged line ⋯
package.jsonadded+1159@@ -0,0 +1,1159 @@+{+ "slug": "stm32h735agi6",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFBGA-169. Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm32h735agi6",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm32h735agi6.kicad_sym",+ "stm32h735agi6.kicad_mod",+ "stm32h735agi6.glb",+ "stm32h735agi6.step",+ "stm32h735agi6.lbr",+ "docs/hero.png",+ "docs/stm32h735agi6-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stm32h735agi6-hero.glb",+ "stm32h735agi6-hero.overlay.json"+ ],+ "component": {+ "mpn": "STM32H735AGI6",+ "manufacturer": "STMicroelectronics",+ "package": "UFBGA-169",+ "pin_count": 169,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588918195722072064",+ "parts": {+ "symbol": "stm32h735agi6.kicad_sym",+ "footprint": "stm32h735agi6.kicad_mod",+ "model_3d": "stm32h735agi6-hero.glb",+ "model_3d_plain": "stm32h735agi6.glb",+ "model_3d_step": "stm32h735agi6-etched.step",+ "model_3d_step_plain": "stm32h735agi6.step",+ "lbr": "stm32h735agi6.lbr"+ },+ "distributor_links": {+ "lcsc": "C730163",+ "digikey": "497-STM32H735AGI6-ND",+ "mouser": "511-STM32H735AGI6"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T04:29:43Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-STM32H735AGI6-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "511-STM32H735AGI6",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "A1",+ "name": "PE4",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O (high-speed low-voltage option); alternate functions include TRACED1, SAI1_FS_A, SPI4_NSS, FMC_A20 and DCMI_D4/PSSI_D4."+ },+ {+ "number": "A2",+ "name": "PE2",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TRACECLK, SAI1_CK1, SPI4_SCK, FMC_A23 and ETH_MII_TXD3."+ },+ {+ "number": "A3",+ "name": "VDD",+ "type": "power_in",+ "description": "Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13)."+ },+ {+ "number": "A4",+ "name": "VCAP",+ "type": "power_in",+ "description": "Connection for the external VCORE capacitor (CEXT) of the internal regulator (Section 6.3.2)."+ },+ {+ "number": "A5",+ "name": "PB6",+ "type": "bidirectional",+ "description": "5 V tolerant FT_fh I/O (FM+ and high-speed low-voltage options); alternate functions include I2C1_SCL, TIM16_CH1N, CEC, USART1_TX and FDCAN2_TX."+ },+ {+ "number": "A6",+ "name": "VDD",+ "type": "power_in",+ "description": "Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13)."+ },+ {+ "number": "A7",+ "name": "VDD",+ "type": "power_in",+ "description": "Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13)."+ },+ {+ "number": "A8",+ "name": "PG10",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include FDCAN3_RX, SPI1_NSS/I2S1_WS, SAI4_SD_B, FMC_NE3 and DCMI_D2/PSSI_D2."+ },+ {+ "number": "A9",+ "name": "PD5",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include USART2_TX, OCTOSPIM_P1_IO5 and FMC_NWE."+ },+ {+ "number": "A10",+ "name": "VDD",+ "type": "power_in",+ "description": "Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13)."+ },+ {+ "number": "A11",+ "name": "PC12",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TRACED3, FMC_D6/FMC_AD6, TIM15_CH1, UART5_TX, SDMMC1_CK and DCMI_D9/PSSI_D9."+ },+ {+ "number": "A12",+ "name": "PC10",+ "type": "bidirectional",+ "description": "5 V tolerant FT_fh I/O; alternate functions include DFSDM1_CKIN5, I2C5_SDA, SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX and SDMMC1_D2."+ },+ {+ "number": "A13",+ "name": "PH14",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM8_CH2N, UART4_RX, FDCAN1_RX (boot), FMC_D22 and DCMI_D4/PSSI_D4."+ },+ {+ "number": "B1",+ "name": "PC15-OSC32_OUT",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; LSE oscillator output (OSC32_OUT) with EVENTOUT as alternate function."+ },+ {+ "number": "B2",+ "name": "PE3",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TRACED0, TIM15_BKIN, SAI1_SD_B, USART10_TX and FMC_A19."+ },+ {+ "number": "B3",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10)."+ },+ {+ "number": "B4",+ "name": "VDDLDO",+ "type": "power_in",+ "description": "Supply input for the internal LDO regulator; VDDLDO must be less than or equal to VDD, range 1.62 V to 3.6 V."+ },+ {+ "number": "B5",+ "name": "PB8",+ "type": "bidirectional",+ "description": "5 V tolerant FT_fh I/O; alternate functions include TIM16_CH1, I2C1_SCL, FDCAN1_RX, SDMMC1_D4 and DCMI_D6/PSSI_D6."+ },+ {+ "number": "B6",+ "name": "PB4",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; default function NJTRST debug pin; alternate functions include TIM16_BKIN, TIM3_CH1, SPI1_MISO/I2S1_SDI and UART7_TX."+ },+ {+ "number": "B7",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10)."+ },+ {+ "number": "B8",+ "name": "PG11",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include LPTIM1_IN2, USART10_RX, SPI1_SCK/I2S1_CK, SPDIFRX1_IN1 and ETH_MII_TX_EN."+ },+ {+ "number": "B9",+ "name": "PD6",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include SAI1_D1, SPI3_MOSI/I2S3_SDO, USART2_RX, SDMMC2_CK and FMC_NWAIT."+ },+ {+ "number": "B10",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10)."+ },+ {+ "number": "B11",+ "name": "PC11",+ "type": "bidirectional",+ "description": "5 V tolerant FT_fh I/O; alternate functions include DFSDM1_DATIN5, I2C5_SCL, SPI3_MISO/I2S3_SDI, USART3_RX, UART4_RX and SDMMC1_D3."+ },+ {+ "number": "B12",+ "name": "PA14",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; default function JTCK/SWCLK debug pin, with EVENTOUT as alternate function."+ },+ {+ "number": "B13",+ "name": "PH13",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM8_CH1N, UART4_TX, FDCAN1_TX (boot), FMC_D21 and LCD_G2."+ },+ {+ "number": "C1",+ "name": "PC14-OSC32_IN",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; LSE oscillator input (OSC32_IN) with EVENTOUT as alternate function."+ },+ {+ "number": "C2",+ "name": "PE6",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TRACED3, TIM1_BKIN2, SAI1_D1, TIM15_CH2, SPI4_MOSI and FMC_A22."+ },+ {+ "number": "C3",+ "name": "PE5",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TRACED2, SAI1_CK2, DFSDM1_CKIN3, TIM15_CH1, SPI4_MISO and FMC_A21."+ },+ {+ "number": "C4",+ "name": "PDR_ON",+ "type": "input",+ "description": "Control pin that enables or disables the power-down reset (PDR); the PDR can only be switched OFF through this pin."+ },+ {+ "number": "C5",+ "name": "PB9",+ "type": "bidirectional",+ "description": "5 V tolerant FT_fh I/O; alternate functions include TIM17_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, SDMMC1_CDIR, FDCAN1_TX and DCMI_D7/PSSI_D7."+ },+ {+ "number": "C6",+ "name": "PB5",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM17_BKIN, TIM3_CH2, I2C1_SMBA, SPI1_MOSI/I2S1_SDO, FDCAN2_RX and UART5_RX."+ },+ {+ "number": "C7",+ "name": "PG14",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TRACED1, LPTIM1_ETR, USART10_RTS/USART10_DE, SPI6_MOSI/I2S6_SDO, USART6_TX and FMC_A25."+ },+ {+ "number": "C8",+ "name": "PG9",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include FDCAN3_TX, SPI1_MISO/I2S1_SDI, USART6_RX, SDMMC2_D0 and FMC_NE2/FMC_NCE."+ },+ {+ "number": "C9",+ "name": "PD4",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include USART2_RTS/USART2_DE, OCTOSPIM_P1_IO4 and FMC_NOE."+ },+ {+ "number": "C10",+ "name": "PD1",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include DFSDM1_DATIN6, UART4_TX, FDCAN1_TX (boot) and FMC_D3/FMC_AD3."+ },+ {+ "number": "C11",+ "name": "PA15",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; default function JTDI debug pin; alternate functions include TIM2_CH1/TIM2_ETR, CEC, SPI1_NSS/I2S1_WS and UART7_TX."+ },+ {+ "number": "C12",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10)."+ },+ {+ "number": "C13",+ "name": "VDD",+ "type": "power_in",+ "description": "Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13)."+ },+ {+ "number": "D1",+ "name": "VDD",+ "type": "power_in",+ "description": "Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13)."+ },+ {+ "number": "D2",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10)."+ },+ {+ "number": "D3",+ "name": "PC13",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; additional functions RTC_TAMP1/RTC_TS and WKUP4, with EVENTOUT as alternate function."+ },+ {+ "number": "D4",+ "name": "PE1",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include LPTIM1_IN2, UART8_TX, FMC_NBL1, DCMI_D3/PSSI_D3 and LCD_R6."+ },+ {+ "number": "D5",+ "name": "PE0",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include LPTIM1_ETR, TIM4_ETR, LPTIM2_ETR, UART8_RX, SAI4_MCLK_A and FMC_NBL0."+ },+ {+ "number": "D6",+ "name": "PB7",+ "type": "bidirectional",+ "description": "5 V tolerant FT_fa I/O (analog option supplied by VDDA); alternate functions include TIM17_CH1N, I2C1_SDA, USART1_RX and FMC_NL; additional function PVD_IN."+ },+ {+ "number": "D7",+ "name": "PG13",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TRACED0, LPTIM1_OUT, USART10_CTS, SPI6_SCK/I2S6_CK, ETH_MII_TXD0 and FMC_A24."+ },+ {+ "number": "D8",+ "name": "PD7",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include DFSDM1_DATIN4, SPI1_MOSI/I2S1_SDO, USART2_CK, SDMMC2_CMD and FMC_NE1."+ },+ {+ "number": "D9",+ "name": "PD3",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include DFSDM1_CKOUT, SPI2_SCK/I2S2_CK, USART2_CTS/USART2_NSS, FMC_CLK and DCMI_D5/PSSI_D5."+ },+ {+ "number": "D10",+ "name": "PD0",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include DFSDM1_CKIN6, UART4_RX, FDCAN1_RX (boot), UART9_CTS and FMC_D2/FMC_AD2."+ },+ {+ "number": "D11",+ "name": "PA13",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; default function JTMS/SWDIO debug pin, with EVENTOUT as alternate function."+ },+ {+ "number": "D12",+ "name": "VDDLDO",+ "type": "power_in",+ "description": "Supply input for the internal LDO regulator; VDDLDO must be less than or equal to VDD, range 1.62 V to 3.6 V."+ },+ {+ "number": "D13",+ "name": "VCAP",+ "type": "power_in",+ "description": "Connection for the external VCORE capacitor (CEXT) of the internal regulator (Section 6.3.2)."+ },+ {+ "number": "E1",+ "name": "VLXSMPS",+ "type": "power_out",+ "description": "Switching (LX) node of the internal SMPS step-down converter; external components are shown in Figure 17."+ },+ {+ "number": "E2",+ "name": "VSSSMPS",+ "type": "power_in",+ "description": "Ground pin for the internal SMPS step-down converter."+ },+ {+ "number": "E3",+ "name": "VBAT",+ "type": "power_in",+ "description": "Backup-domain supply for the RTC, backup registers and backup SRAM (VBAT supply, Section 6.1.6)."+ },+ {+ "number": "E4",+ "name": "PF1",+ "type": "bidirectional",+ "description": "5 V tolerant FT_fh I/O; alternate functions include I2C2_SCL (boot), I2C5_SCL, OCTOSPIM_P2_IO1, FMC_A1 and TIM23_CH2."+ },+ {+ "number": "E5",+ "name": "PF3",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include OCTOSPIM_P2_IO3, FMC_A3 and TIM23_CH4; additional function ADC3_INP5."+ },+ {+ "number": "E6",+ "name": "BOOT0",+ "type": "input",+ "description": "Dedicated BOOT0 pin; input voltage range is VSS to 9.0 V (Table 10 and Table 13)."+ },+ {+ "number": "E7",+ "name": "PG15",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include USART6_CTS/USART6_NSS, OCTOSPIM_P2_DQS, USART10_CK, FMC_NCAS and DCMI_D13/PSSI_D13."+ },+ {+ "number": "E8",+ "name": "PG12",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include LPTIM1_IN1, OCTOSPIM_P2_NCS, USART10_TX, SPI6_MISO/I2S6_SDI, FMC_NE4 and TIM23_CH1."+ },+ {+ "number": "E9",+ "name": "PD2",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TRACED2, FMC_D7/FMC_AD7, TIM3_ETR, TIM15_BKIN, UART5_RX and SDMMC1_CMD."+ },+ {+ "number": "E10",+ "name": "PA10",+ "type": "bidirectional",+ "description": "5 V tolerant FT_u I/O (USB option, supplied by VDD33USB); alternate functions include TIM1_CH3, LPUART1_RX, USART1_RX (boot) and OTG_HS_ID."+ },+ {+ "number": "E11",+ "name": "PA9",+ "type": "bidirectional",+ "description": "5 V tolerant FT_u I/O (USB option, supplied by VDD33USB); alternate functions include TIM1_CH2, LPUART1_TX, SPI2_SCK/I2S2_CK and USART1_TX (boot); additional function OTG_HS_VBUS."+ },+ {+ "number": "E12",+ "name": "PA8",+ "type": "bidirectional",+ "description": "5 V tolerant FT_fh I/O; alternate functions include MCO1, TIM1_CH1, I2C3_SCL (boot), I2C5_SCL, USART1_CK and OTG_HS_SOF."+ },+ {+ "number": "E13",+ "name": "PA12",+ "type": "bidirectional",+ "description": "5 V tolerant FT_u I/O (USB option, supplied by VDD33USB); alternate functions include TIM1_ETR, LPUART1_RTS, SPI2_SCK/I2S2_CK and USART1_RTS/USART1_DE; additional function OTG_HS_DP (boot)."+ },+ {+ "number": "F1",+ "name": "VDDSMPS",+ "type": "power_in",+ "description": "Supply input for the internal SMPS step-down converter; VDDSMPS equals VDD, range 1.62 V to 3.6 V."+ },+ {+ "number": "F2",+ "name": "VFBSMPS",+ "type": "input",+ "description": "Feedback pin of the internal SMPS step-down converter (external components per Figure 17)."+ },+ {+ "number": "F3",+ "name": "PF0",+ "type": "bidirectional",+ "description": "5 V tolerant FT_fh I/O; alternate functions include I2C2_SDA (boot), I2C5_SDA, OCTOSPIM_P2_IO0, FMC_A0 and TIM23_CH1."+ },+ {+ "number": "F4",+ "name": "PF2",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include I2C2_SMBA, I2C5_SMBA, OCTOSPIM_P2_IO2, FMC_A2 and TIM23_CH3."+ },+ {+ "number": "F5",+ "name": "PF5",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include OCTOSPIM_P2_NCLK and FMC_A5; additional function ADC3_INP4."+ },+ {+ "number": "F6",+ "name": "PF7",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM17_CH1, FDCAN3_TX, SPI5_SCK, UART7_TX and TIM23_CH2; additional function ADC3_INP3."+ },+ {+ "number": "F7",+ "name": "PB3",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; default function JTDO/TRACESWO debug pin; alternate functions include TIM2_CH2, SPI1_SCK/I2S1_CK, SDMMC2_D2 and UART7_RX."+ },+ {+ "number": "F8",+ "name": "PG4",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM1_BKIN2, FMC_A14/FMC_BA0 and TIM1_BKIN2_COMP12."+ },+ {+ "number": "F9",+ "name": "PC6",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, I2S2_MCK, USART6_TX, FMC_NWAIT and DCMI_D0/PSSI_D0."+ },+ {+ "number": "F10",+ "name": "PC7",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include DBTRGIO, TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, FMC_NE1 and DCMI_D1/PSSI_D1."+ },+ {+ "number": "F11",+ "name": "PC9",+ "type": "bidirectional",+ "description": "5 V tolerant FT_fh I/O; alternate functions include MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA (boot), I2C5_SDA and SDMMC1_D1."+ },+ {+ "number": "F12",+ "name": "PC8",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TRACED1, TIM3_CH3, TIM8_CH3, USART6_CK, FMC_NE2/FMC_NCE and SDMMC1_D0."+ },+ {+ "number": "F13",+ "name": "PA11",+ "type": "bidirectional",+ "description": "5 V tolerant FT_u I/O (USB option, supplied by VDD33USB); alternate functions include TIM1_CH4, LPUART1_CTS, SPI2_NSS/I2S2_WS, UART4_RX and FDCAN1_RX; additional function OTG_HS_DM (boot)."+ },+ {+ "number": "G1",+ "name": "VDD",+ "type": "power_in",+ "description": "Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13)."+ },+ {+ "number": "G2",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10)."+ },+ {+ "number": "G3",+ "name": "PF4",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include OCTOSPIM_P2_CLK and FMC_A4; additional functions ADC3_INN5 and ADC3_INP9."+ },+ {+ "number": "G4",+ "name": "PF6",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM16_CH1, FDCAN3_RX, SPI5_NSS, UART7_RX and TIM23_CH1; additional functions ADC3_INN4 and ADC3_INP8."+ },+ {+ "number": "G5",+ "name": "PF9",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM17_CH1N, SPI5_MOSI, UART7_CTS, TIM14_CH1 and TIM23_CH4; additional function ADC3_INP2."+ },+ {+ "number": "G6",+ "name": "NRST",+ "type": "bidirectional",+ "description": "Bidirectional reset pin with embedded weak pull-up resistor (RST pin type)."+ },+ {+ "number": "G7",+ "name": "PF13",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include DFSDM1_DATIN6, I2C4_SMBA, FMC_A7 and TIM24_CH3; additional function ADC2_INP2."+ },+ {+ "number": "G8",+ "name": "PE7",+ "type": "bidirectional",+ "description": "3.3 V tolerant TT_ha I/O (analog option supplied by VDDA); alternate functions include TIM1_ETR, DFSDM1_DATIN2, UART7_RX, OCTOSPIM_P1_IO4 and FMC_D4/FMC_AD4."+ },+ {+ "number": "G9",+ "name": "PG6",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM17_BKIN, OCTOSPIM_P1_NCS, FMC_NE3, DCMI_D12/PSSI_D12 and LCD_R7."+ },+ {+ "number": "G10",+ "name": "PG7",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include SAI1_MCLK_A, USART6_CK, OCTOSPIM_P2_DQS, FMC_INT and DCMI_D13/PSSI_D13."+ },+ {+ "number": "G11",+ "name": "PG8",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM8_ETR, SPI6_NSS/I2S6_WS, USART6_RTS/USART6_DE, SPDIFRX1_IN3, ETH_PPS_OUT and FMC_SDCLK."+ },+ {+ "number": "G12",+ "name": "VDD50USB",+ "type": "power_in",+ "description": "USB regulator supply input; 4 V to 5.5 V when the USB regulator is ON (Table 13)."+ },+ {+ "number": "G13",+ "name": "VDD33USB",+ "type": "power_in",+ "description": "USB domain supply; 3.0 V to 3.6 V when USB is used, 0 V to 3.6 V when USB is not used (Table 13)."+ },+ {+ "number": "H1",+ "name": "PH0-OSC_IN",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; HSE oscillator input (OSC_IN) with EVENTOUT as alternate function."+ },+ {+ "number": "H2",+ "name": "PH1-OSC_OUT",+ "type": "bidirectional",+ "description": "5 V tolerant FT I/O; HSE oscillator output (OSC_OUT) with EVENTOUT as alternate function."+ },+ {+ "number": "H3",+ "name": "PF10",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM16_BKIN, SAI1_D3, OCTOSPIM_P1_CLK and LCD_DE; additional functions ADC3_INN2 and ADC3_INP6."+ },+ {+ "number": "H4",+ "name": "PF8",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM16_CH1N, SPI5_MISO, SAI1_SCK_B, UART7_RTS/UART7_DE and OCTOSPIM_P1_IO0; additional functions ADC3_INN3 and ADC3_INP7."+ },+ {+ "number": "H5",+ "name": "PC2",+ "type": "bidirectional",+ "description": "5 V tolerant FT_a I/O (analog option supplied by VDDA); alternate functions include PWR_DEEPSLEEP, DFSDM1_CKIN1, SPI2_MISO/I2S2_SDI, OTG_HS_ULPI_DIR and FMC_SDNE0; additional functions ADC123_INN11 and ADC123_INP12."+ },+ {+ "number": "H6",+ "name": "PA4",+ "type": "bidirectional",+ "description": "3.3 V tolerant TT_ha I/O (analog option supplied by VDDA); alternate functions include D1PWREN, TIM5_ETR, SPI1_NSS/I2S1_WS, USART2_CK and FMC_D8/FMC_AD8; additional functions ADC12_INP18 and DAC1_OUT1."+ },+ {+ "number": "H7",+ "name": "PF14",+ "type": "bidirectional",+ "description": "5 V tolerant FT_fha I/O (analog option supplied by VDDA); alternate functions include DFSDM1_CKIN6, I2C4_SCL, FMC_A8 and TIM24_CH4; additional functions ADC2_INN2 and ADC2_INP6."+ },+ {+ "number": "H8",+ "name": "PE8",+ "type": "bidirectional",+ "description": "3.3 V tolerant TT_ha I/O (analog option supplied by VDDA); alternate functions include TIM1_CH1N, DFSDM1_CKIN2, UART7_TX, OCTOSPIM_P1_IO5 and FMC_D5/FMC_AD5; additional functions COMP2_OUT and OPAMP2_VINM."+ },+ {+ "number": "H9",+ "name": "PG2",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM8_BKIN, TIM8_BKIN_COMP12, FMC_A12 and TIM24_ETR."+ },+ {+ "number": "H10",+ "name": "PG3",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM8_BKIN2, TIM8_BKIN2_COMP12, FMC_A13 and TIM23_ETR."+ },+ {+ "number": "H11",+ "name": "PG5",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM1_ETR, FMC_A15/FMC_BA1 and EVENTOUT."+ },+ {+ "number": "H12",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10)."+ },+ {+ "number": "H13",+ "name": "VDD",+ "type": "power_in",+ "description": "Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13)."+ },+ {+ "number": "J1",+ "name": "PC0",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include FMC_D12/FMC_AD12, DFSDM1_CKIN0, FMC_A25, OTG_HS_ULPI_STP and FMC_SDNWE; additional function ADC123_INP10."+ },+ {+ "number": "J2",+ "name": "PC1",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TRACED0, SAI4_D1, SAI1_D1, DFSDM1_DATIN0, SPI2_MOSI/I2S2_SDO and ETH_MDC; additional functions ADC123_INN10, ADC123_INP11, RTC_TAMP3 and WKUP6."+ },+ {+ "number": "J3",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog ground reference for the ADC, DAC, OPAMP, COMP and VREFBUF blocks."+ },+ {+ "number": "J4",+ "name": "PC3",+ "type": "bidirectional",+ "description": "5 V tolerant FT_a I/O (analog option supplied by VDDA); alternate functions include PWR_SLEEP, DFSDM1_DATIN1, SPI2_MOSI/I2S2_SDO, OTG_HS_ULPI_NXT and FMC_SDCKE0; additional functions ADC12_INN12 and ADC12_INP13."+ },+ {+ "number": "J5",+ "name": "PA0",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, SPI6_NSS/I2S6_WS, USART2_CTS/USART2_NSS and FMC_A19; additional functions ADC1_INP16 and WKUP1."+ },+ {+ "number": "J6",+ "name": "PA7",+ "type": "bidirectional",+ "description": "3.3 V tolerant TT_ha I/O (analog option supplied by VDDA); alternate functions include TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI/I2S1_SDO, ETH_MII_RX_DV and FMC_SDNWE; additional functions ADC12_INN3, ADC12_INP7 and OPAMP1_VINM."+ },+ {+ "number": "J7",+ "name": "PF15",+ "type": "bidirectional",+ "description": "5 V tolerant FT_fh I/O; alternate functions include I2C4_SDA, FMC_A9 and EVENTOUT."+ },+ {+ "number": "J8",+ "name": "PE9",+ "type": "bidirectional",+ "description": "3.3 V tolerant TT_ha I/O (analog option supplied by VDDA); alternate functions include TIM1_CH1, DFSDM1_CKOUT, UART7_RTS/UART7_DE, OCTOSPIM_P1_IO6 and FMC_D6/FMC_AD6; additional functions OPAMP2_VINP and COMP2_INP."+ },+ {+ "number": "J9",+ "name": "PE14",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM1_CH4, SPI4_MOSI (boot), SAI4_MCLK_B, FMC_D11/FMC_AD11 and LCD_CLK."+ },+ {+ "number": "J10",+ "name": "PD11",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include LPTIM2_IN2, I2C4_SMBA, USART3_CTS/USART3_NSS, OCTOSPIM_P1_IO0, SAI4_SD_A and FMC_A16/FMC_CLE."+ },+ {+ "number": "J11",+ "name": "PD13",+ "type": "bidirectional",+ "description": "5 V tolerant FT_fh I/O; alternate functions include LPTIM1_OUT, TIM4_CH2, I2C4_SDA, FDCAN3_TX, OCTOSPIM_P1_IO3 and FMC_A18."+ },+ {+ "number": "J12",+ "name": "PD15",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM4_CH4, UART8_RTS/UART8_DE, UART9_TX and FMC_D1/FMC_AD1."+ },+ {+ "number": "J13",+ "name": "PD14",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM4_CH3, UART8_CTS, UART9_RX and FMC_D0/FMC_AD0."+ },+ {+ "number": "K1",+ "name": "PC3_C",+ "type": "passive",+ "description": "Analog-only pin (ANA, TT_a) supplied by VDDA; additional function ADC3_INP1."+ },+ {+ "number": "K2",+ "name": "PC2_C",+ "type": "passive",+ "description": "Analog-only pin (ANA, TT_a) supplied by VDDA; additional functions ADC3_INN1 and ADC3_INP0."+ },+ {+ "number": "K3",+ "name": "PA0_C",+ "type": "passive",+ "description": "Analog-only pin (ANA, TT_a) supplied by VDDA; additional functions ADC12_INN1 and ADC12_INP0."+ },+ {+ "number": "K4",+ "name": "PA1",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM2_CH2, TIM5_CH2, LPTIM3_OUT, USART2_RTS/USART2_DE, UART4_RX and ETH_MII_RX_CLK; additional functions ADC1_INN16 and ADC1_INP17."+ },+ {+ "number": "K5",+ "name": "PA6",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO/I2S1_SDI and SPI6_MISO/I2S6_SDI; additional function ADC12_INP3."+ },+ {+ "number": "K6",+ "name": "PC4",+ "type": "bidirectional",+ "description": "3.3 V tolerant TT_ha I/O (analog option supplied by VDDA); alternate functions include PWR_DEEPSLEEP, FMC_A22, DFSDM1_CKIN2, I2S1_MCK, ETH_MII_RXD0 and FMC_SDNE0; additional functions ADC12_INP4, OPAMP1_VOUT and COMP1_INM."+ },+ {+ "number": "K7",+ "name": "PG0",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include OCTOSPIM_P2_IO4, UART9_RX, FMC_A10 and EVENTOUT."+ },+ {+ "number": "K8",+ "name": "PE13",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM1_CH3, DFSDM1_CKIN5, SPI4_MISO (boot), SAI4_FS_B, FMC_D10/FMC_AD10, COMP2_OUT and LCD_DE."+ },+ {+ "number": "K9",+ "name": "PH10",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM5_CH1, I2C4_SMBA, FMC_D18, DCMI_D1/PSSI_D1 and LCD_R4."+ },+ {+ "number": "K10",+ "name": "PH12",+ "type": "bidirectional",+ "description": "5 V tolerant FT_fh I/O; alternate functions include TIM5_CH3, I2C4_SDA, FMC_D20, DCMI_D3/PSSI_D3 and LCD_R6."+ },+ {+ "number": "K11",+ "name": "PD9",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include DFSDM1_DATIN3, USART3_RX (boot), FMC_D14/FMC_AD14 and EVENTOUT."+ },+ {+ "number": "K12",+ "name": "PD10",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include DFSDM1_CKOUT, USART3_CK, FMC_D15/FMC_AD15 and LCD_B3."+ },+ {+ "number": "K13",+ "name": "PD12",+ "type": "bidirectional",+ "description": "5 V tolerant FT_fh I/O; alternate functions include LPTIM1_IN1, TIM4_CH1, LPTIM2_IN1, I2C4_SCL, FDCAN3_RX, USART3_RTS/USART3_DE and FMC_A17/FMC_ALE."+ },+ {+ "number": "L1",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog supply: 1.62 V minimum when ADC or COMP is used, 1.8 V for DAC or VREFBUF, 2.0 V for OPAMP (Table 13)."+ },+ {+ "number": "L2",+ "name": "VREF+",+ "type": "power_in",+ "description": "Positive reference voltage pin for the analog converters (ADC and DAC)."+ },+ {+ "number": "L3",+ "name": "PA1_C",+ "type": "passive",+ "description": "Analog-only pin (ANA, TT_a) supplied by VDDA; additional function ADC12_INP1."+ },+ {+ "number": "L4",+ "name": "PA5",+ "type": "bidirectional",+ "description": "3.3 V tolerant TT_ha I/O (analog option supplied by VDDA); alternate functions include D2PWREN, TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK/I2S1_CK, OTG_HS_ULPI_CK and FMC_D9/FMC_AD9; additional functions ADC12_INN18, ADC12_INP19 and DAC1_OUT2."+ },+ {+ "number": "L5",+ "name": "PB1",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM1_CH3N, TIM3_CH4, TIM8_CH3N, OCTOSPIM_P1_IO0, DFSDM1_DATIN1 and LCD_R6; additional functions ADC12_INP5 and COMP1_INM."+ },+ {+ "number": "L6",+ "name": "PB2",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include RTC_OUT, SAI4_D1, SAI1_D1, DFSDM1_CKIN1, SPI3_MOSI/I2S3_SDO and OCTOSPIM_P1_CLK; additional function COMP1_INP."+ },+ {+ "number": "L7",+ "name": "PG1",+ "type": "bidirectional",+ "description": "3.3 V tolerant TT_h I/O; alternate functions include OCTOSPIM_P2_IO5, UART9_TX and FMC_A11; additional function OPAMP2_VINM."+ },+ {+ "number": "L8",+ "name": "PE12",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM1_CH3N, DFSDM1_DATIN5, SPI4_SCK (boot), SAI4_SCK_B, FMC_D9/FMC_AD9, COMP1_OUT and LCD_B4."+ },+ {+ "number": "L9",+ "name": "PB10",+ "type": "bidirectional",+ "description": "5 V tolerant FT_fh I/O; alternate functions include TIM2_CH3, LPTIM2_IN1, I2C2_SCL, SPI2_SCK/I2S2_CK, USART3_TX (boot), OCTOSPIM_P1_NCS and OTG_HS_ULPI_D3."+ },+ {+ "number": "L10",+ "name": "PH11",+ "type": "bidirectional",+ "description": "5 V tolerant FT_fh I/O; alternate functions include TIM5_CH2, I2C4_SCL, FMC_D19, DCMI_D2/PSSI_D2 and LCD_R5."+ },+ {+ "number": "L11",+ "name": "PB13",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM1_CH1N, LPTIM2_OUT, OCTOSPIM_P1_IO2, SPI2_SCK/I2S2_CK, USART3_CTS/USART3_NSS, FDCAN2_TX and SDMMC1_D0."+ },+ {+ "number": "L12",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10)."+ },+ {+ "number": "L13",+ "name": "VDD",+ "type": "power_in",+ "description": "Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13)."+ },+ {+ "number": "M1",+ "name": "VDD",+ "type": "power_in",+ "description": "Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13)."+ },+ {+ "number": "M2",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10)."+ },+ {+ "number": "M3",+ "name": "PH3",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include OCTOSPIM_P1_IO5, SAI4_MCLK_B, ETH_MII_COL, FMC_SDNE0 and LCD_R1; additional functions ADC3_INN13 and ADC3_INP14."+ },+ {+ "number": "M4",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10)."+ },+ {+ "number": "M5",+ "name": "PB0",+ "type": "bidirectional",+ "description": "3.3 V tolerant TT_ha I/O (analog option supplied by VDDA); alternate functions include TIM1_CH2N, TIM3_CH3, TIM8_CH2N, OCTOSPIM_P1_IO1, DFSDM1_CKOUT, UART4_CTS and LCD_R3; additional functions ADC12_INN5, ADC12_INP9, OPAMP1_VINP and COMP1_INP."+ },+ {+ "number": "M6",+ "name": "PF11",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include SPI5_MOSI, OCTOSPIM_P1_NCLK, SAI4_SD_B, FMC_NRAS, DCMI_D12/PSSI_D12 and TIM24_CH1; additional function ADC1_INP2."+ },+ {+ "number": "M7",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10)."+ },+ {+ "number": "M8",+ "name": "PE10",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM1_CH2N, DFSDM1_DATIN4, UART7_CTS, OCTOSPIM_P1_IO7 and FMC_D7/FMC_AD7; additional function COMP2_INM."+ },+ {+ "number": "M9",+ "name": "PB11",+ "type": "bidirectional",+ "description": "5 V tolerant FT_f I/O (FM+ option); alternate functions include TIM2_CH4, LPTIM2_ETR, I2C2_SDA, DFSDM1_CKIN7, USART3_RX (boot), OTG_HS_ULPI_D4 and ETH_MII_TX_EN."+ },+ {+ "number": "M10",+ "name": "VDDLDO",+ "type": "power_in",+ "description": "Supply input for the internal LDO regulator; VDDLDO must be less than or equal to VDD, range 1.62 V to 3.6 V."+ },+ {+ "number": "M11",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10)."+ },+ {+ "number": "M12",+ "name": "PD8",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include DFSDM1_CKIN3, USART3_TX (boot), SPDIFRX1_IN2 and FMC_D13/FMC_AD13."+ },+ {+ "number": "M13",+ "name": "PB15",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include RTC_REFIN, TIM1_CH3N, TIM12_CH2, TIM8_CH3N, USART1_RX, SPI2_MOSI/I2S2_SDO and FMC_D11/FMC_AD11."+ },+ {+ "number": "N1",+ "name": "PA2",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM2_CH3, TIM5_CH3, LPTIM4_OUT, TIM15_CH1, OCTOSPIM_P1_IO0, USART2_TX (boot) and ETH_MDIO; additional functions ADC12_INP14 and WKUP2."+ },+ {+ "number": "N2",+ "name": "PH2",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include LPTIM1_IN2, OCTOSPIM_P1_IO4, SAI4_SCK_B, ETH_MII_CRS, FMC_SDCKE0 and LCD_R0; additional function ADC3_INP13."+ },+ {+ "number": "N3",+ "name": "PA3",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM2_CH4, TIM5_CH4, LPTIM5_OUT, TIM15_CH2, I2S6_MCK, OCTOSPIM_P1_IO2, USART2_RX (boot) and OTG_HS_ULPI_D0; additional function ADC12_INP15."+ },+ {+ "number": "N4",+ "name": "VDD",+ "type": "power_in",+ "description": "Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13)."+ },+ {+ "number": "N5",+ "name": "PC5",+ "type": "bidirectional",+ "description": "3.3 V tolerant TT_ha I/O (analog option supplied by VDDA); alternate functions include PWR_SLEEP, SAI4_D3, SAI1_D3, DFSDM1_DATIN2, PSSI_D15, OCTOSPIM_P1_DQS, FMC_SDCKE0 and COMP1_OUT; additional functions ADC12_INN4, ADC12_INP8 and OPAMP1_VINM."+ },+ {+ "number": "N6",+ "name": "PF12",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include OCTOSPIM_P2_DQS, FMC_A6 and TIM24_CH2; additional functions ADC1_INN2 and ADC1_INP6."+ },+ {+ "number": "N7",+ "name": "VDD",+ "type": "power_in",+ "description": "Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13)."+ },+ {+ "number": "N8",+ "name": "PE11",+ "type": "bidirectional",+ "description": "5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM1_CH2, DFSDM1_CKIN4, SPI4_NSS (boot), SAI4_SD_B, OCTOSPIM_P1_NCS, FMC_D8/FMC_AD8 and LCD_G3; additional function COMP2_INP."+ },+ {+ "number": "N9",+ "name": "PE15",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM1_BKIN, USART10_CK, FMC_D12/FMC_AD12, TIM1_BKIN_COMP12 and LCD_R7."+ },+ {+ "number": "N10",+ "name": "VCAP",+ "type": "power_in",+ "description": "Connection for the external VCORE capacitor (CEXT) of the internal regulator (Section 6.3.2)."+ },+ {+ "number": "N11",+ "name": "VDD",+ "type": "power_in",+ "description": "Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13)."+ },+ {+ "number": "N12",+ "name": "PB12",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM1_BKIN, OCTOSPIM_P1_NCLK, I2C2_SMBA, SPI2_NSS/I2S2_WS, FDCAN2_RX, OTG_HS_ULPI_D5 and UART5_RX."+ },+ {+ "number": "N13",+ "name": "PB14",+ "type": "bidirectional",+ "description": "5 V tolerant FT_h I/O; alternate functions include TIM1_CH2N, TIM12_CH1, TIM8_CH2N, USART1_TX, SPI2_MISO/I2S2_SDI, DFSDM1_DATIN2 and FMC_D10/FMC_AD10."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Ball positions were taken from the UFBGA169 column of Table 8 (pages 64-96), because the text extrac; Part-number check: STM32H735AGI6 decodes as 169 balls (A), UFBGA 0.5 mm pitch (I), 1 MB flash (G), i; Pin type mapping is a judgement. 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stm32h735agi6.glbadded⋯ 1 unchanged line ⋯
stm32h735agi6.kicad_modadded+1182@@ -0,0 +1,1182 @@+(footprint "UFBGA-169_7x7mm_Layout13x13_P0.5mm"+ (version 20260206)+ (generator "kicad-footprint-generator")+ (layer "F.Cu")+ (descr "UFBGA-169, 7.0x7.0mm, 169 Ball, 13x13 Layout, 0.5mm Pitch, http://www.st.com/resource/en/datasheet/stm32f429ng.pdf#page=218")+ (tags "BGA 169 0.5")+ (solder_mask_margin 0.04)+ (solder_paste_margin 0.000001)+ (property "Reference" "REF**"+ (at 0 -4.5 0)+ (layer "F.SilkS")+ (effects+ (font+ (size 1 1)+ (thickness 0.15)+ )+ )+ )+ (property "Value" "UFBGA-169_7x7mm_Layout13x13_P0.5mm"+ (at 0 4.5 0)+ (layer "F.Fab")+ (effects+ (font+ (size 1 1)+ (thickness 0.15)+ )+ )+ )+ (property "KiLib_Generator" "package/grid_array"+ (at 0 0 0)+ (layer "F.SilkS")+ (hide yes)+ (effects+ (font+ (size 1 1)+ (thickness 0.15)+ )+ )+ )+ (attr smd)+ (duplicate_pad_numbers_are_jumpers no)+ (fp_line+ (start -3.61 3.61)+ (end -3.61 -2.61)+ (stroke+ (width 0.12)+ (type solid)+ )+ (layer "F.SilkS")+ )+ (fp_line+ (start -2.61 -3.61)+ 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3.5)+ (end -3.5 3.5)+ (stroke+ (width 0.1)+ (type solid)+ )+ (layer "F.Fab")+ )+ (fp_text user "${REFERENCE}"+ (at 0 0 0)+ (layer "F.Fab")+ (effects+ (font+ (size 1 1)+ (thickness 0.15)+ )+ )+ )+ (pad "A1" smd circle+ (at -3 -3)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "A2" smd circle+ (at -2.5 -3)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "A3" smd circle+ (at -2 -3)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "A4" smd circle+ (at -1.5 -3)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "A5" smd circle+ (at -1 -3)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "A6" smd circle+ (at -0.5 -3)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "A7" smd circle+ (at 0 -3)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "A8" smd circle+ (at 0.5 -3)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "A9" smd circle+ (at 1 -3)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "A10" smd circle+ (at 1.5 -3)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "A11" smd circle+ (at 2 -3)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "A12" smd circle+ (at 2.5 -3)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "A13" smd circle+ (at 3 -3)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "B1" smd circle+ (at -3 -2.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "B2" smd circle+ (at -2.5 -2.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "B3" smd circle+ (at -2 -2.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "B4" smd circle+ (at -1.5 -2.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "B5" smd circle+ (at -1 -2.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "B6" smd circle+ (at -0.5 -2.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "B7" smd circle+ (at 0 -2.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "B8" smd circle+ (at 0.5 -2.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "B9" smd circle+ (at 1 -2.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "B10" smd circle+ (at 1.5 -2.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "B11" smd circle+ (at 2 -2.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "B12" smd circle+ (at 2.5 -2.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "B13" smd circle+ (at 3 -2.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "C1" smd circle+ (at -3 -2)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "C2" smd circle+ (at -2.5 -2)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "C3" smd circle+ (at -2 -2)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "C4" smd circle+ (at -1.5 -2)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "C5" smd circle+ (at -1 -2)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "C6" smd circle+ (at -0.5 -2)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "C7" smd circle+ (at 0 -2)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "C8" smd circle+ (at 0.5 -2)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "C9" smd circle+ (at 1 -2)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "C10" smd circle+ (at 1.5 -2)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "C11" smd circle+ (at 2 -2)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "C12" smd circle+ (at 2.5 -2)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "C13" smd circle+ (at 3 -2)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "D1" smd circle+ (at -3 -1.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "D2" smd circle+ (at -2.5 -1.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "D3" smd circle+ (at -2 -1.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "D4" smd circle+ (at -1.5 -1.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "D5" smd circle+ (at -1 -1.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "D6" smd circle+ (at -0.5 -1.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "D7" smd circle+ (at 0 -1.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "D8" smd circle+ (at 0.5 -1.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "D9" smd circle+ (at 1 -1.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "D10" smd circle+ (at 1.5 -1.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "D11" smd circle+ (at 2 -1.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "D12" smd circle+ (at 2.5 -1.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "D13" smd circle+ (at 3 -1.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "E1" smd circle+ (at -3 -1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "E2" smd circle+ (at -2.5 -1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "E3" smd circle+ (at -2 -1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "E4" smd circle+ (at -1.5 -1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "E5" smd circle+ (at -1 -1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "E6" smd circle+ (at -0.5 -1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "E7" smd circle+ (at 0 -1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "E8" smd circle+ (at 0.5 -1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "E9" smd circle+ (at 1 -1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "E10" smd circle+ (at 1.5 -1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "E11" smd circle+ (at 2 -1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "E12" smd circle+ (at 2.5 -1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "E13" smd circle+ (at 3 -1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "F1" smd circle+ (at -3 -0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "F2" smd circle+ (at -2.5 -0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "F3" smd circle+ (at -2 -0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "F4" smd circle+ (at -1.5 -0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "F5" smd circle+ (at -1 -0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "F6" smd circle+ (at -0.5 -0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "F7" smd circle+ (at 0 -0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "F8" smd circle+ (at 0.5 -0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "F9" smd circle+ (at 1 -0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "F10" smd circle+ (at 1.5 -0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "F11" smd circle+ (at 2 -0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "F12" smd circle+ (at 2.5 -0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "F13" smd circle+ (at 3 -0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "G1" smd circle+ (at -3 0)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "G2" smd circle+ (at -2.5 0)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "G3" smd circle+ (at -2 0)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "G4" smd circle+ (at -1.5 0)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "G5" smd circle+ (at -1 0)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "G6" smd circle+ (at -0.5 0)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "G7" smd circle+ (at 0 0)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "G8" smd circle+ (at 0.5 0)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "G9" smd circle+ (at 1 0)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "G10" smd circle+ (at 1.5 0)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "G11" smd circle+ (at 2 0)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "G12" smd circle+ (at 2.5 0)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "G13" smd circle+ (at 3 0)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "H1" smd circle+ (at -3 0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "H2" smd circle+ (at -2.5 0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "H3" smd circle+ (at -2 0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "H4" smd circle+ (at -1.5 0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "H5" smd circle+ (at -1 0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "H6" smd circle+ (at -0.5 0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "H7" smd circle+ (at 0 0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "H8" smd circle+ (at 0.5 0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "H9" smd circle+ (at 1 0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "H10" smd circle+ (at 1.5 0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "H11" smd circle+ (at 2 0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "H12" smd circle+ (at 2.5 0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "H13" smd circle+ (at 3 0.5)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "J1" smd circle+ (at -3 1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "J2" smd circle+ (at -2.5 1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "J3" smd circle+ (at -2 1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "J4" smd circle+ (at -1.5 1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "J5" smd circle+ (at -1 1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "J6" smd circle+ (at -0.5 1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "J7" smd circle+ (at 0 1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "J8" smd circle+ (at 0.5 1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "J9" smd circle+ (at 1 1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "J10" smd circle+ (at 1.5 1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "J11" smd circle+ (at 2 1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "J12" smd circle+ (at 2.5 1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "J13" smd circle+ (at 3 1)+ (size 0.27 0.27)+ (property pad_prop_bga)+ (layers "F.Cu" "F.Mask" "F.Paste")+ )+ (pad "K1" smd circle+ (at -3 1.5)+ (size 0.27 0.27)+ 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pad="F12"/>+ <connect gate="G$1" pin="PA11" pad="F13"/>+ <connect gate="G$1" pin="VDD@7" pad="G1"/>+ <connect gate="G$1" pin="VSS@6" pad="G2"/>+ <connect gate="G$1" pin="PF4" pad="G3"/>+ <connect gate="G$1" pin="PF6" pad="G4"/>+ <connect gate="G$1" pin="PF9" pad="G5"/>+ <connect gate="G$1" pin="NRST" pad="G6"/>+ <connect gate="G$1" pin="PF13" pad="G7"/>+ <connect gate="G$1" pin="PB14" pad="N13"/>+ <connect gate="G$1" pin="PB12" pad="N12"/>+ <connect gate="G$1" pin="VDD@8" pad="N11"/>+ <connect gate="G$1" pin="VCAP@3" pad="N10"/>+ <connect gate="G$1" pin="PE15" pad="N9"/>+ <connect gate="G$1" pin="PE11" pad="N8"/>+ <connect gate="G$1" pin="VDD@9" pad="N7"/>+ <connect gate="G$1" pin="PF12" pad="N6"/>+ <connect gate="G$1" pin="PC5" pad="N5"/>+ <connect gate="G$1" pin="VDD@10" pad="N4"/>+ <connect gate="G$1" pin="PA3" pad="N3"/>+ <connect gate="G$1" pin="PH2" pad="N2"/>+ <connect gate="G$1" pin="PA2" pad="N1"/>+ <connect gate="G$1" pin="PB15" pad="M13"/>+ <connect gate="G$1" pin="PD8" pad="M12"/>+ <connect gate="G$1" pin="VSS@7" pad="M11"/>+ <connect gate="G$1" pin="VDDLDO@3" pad="M10"/>+ <connect gate="G$1" pin="PB11" pad="M9"/>+ <connect gate="G$1" pin="PE10" pad="M8"/>+ <connect gate="G$1" pin="VSS@8" pad="M7"/>+ <connect gate="G$1" pin="PF11" pad="M6"/>+ <connect gate="G$1" pin="PB0" pad="M5"/>+ <connect gate="G$1" pin="VSS@9" pad="M4"/>+ <connect gate="G$1" pin="PH3" pad="M3"/>+ <connect gate="G$1" pin="VSS@10" pad="M2"/>+ <connect gate="G$1" pin="VDD@11" pad="M1"/>+ <connect gate="G$1" pin="VDD@12" pad="L13"/>+ <connect gate="G$1" pin="VSS@11" pad="L12"/>+ <connect gate="G$1" pin="PB13" pad="L11"/>+ <connect gate="G$1" pin="PH11" pad="L10"/>+ <connect gate="G$1" pin="PB10" pad="L9"/>+ <connect gate="G$1" pin="PE12" pad="L8"/>+ <connect gate="G$1" pin="PG1" pad="L7"/>+ <connect gate="G$1" pin="PB2" pad="L6"/>+ <connect gate="G$1" pin="PB1" pad="L5"/>+ <connect gate="G$1" pin="PA5" pad="L4"/>+ <connect gate="G$1" pin="PA1_C" pad="L3"/>+ <connect gate="G$1" pin="VREF+" pad="L2"/>+ <connect gate="G$1" pin="VDDA" pad="L1"/>+ <connect gate="G$1" pin="PD12" pad="K13"/>+ <connect gate="G$1" pin="PD10" pad="K12"/>+ <connect gate="G$1" pin="PD9" pad="K11"/>+ <connect gate="G$1" pin="PH12" pad="K10"/>+ <connect gate="G$1" pin="PH10" pad="K9"/>+ <connect gate="G$1" pin="PE13" pad="K8"/>+ <connect gate="G$1" pin="PG0" pad="K7"/>+ <connect gate="G$1" pin="PC4" pad="K6"/>+ <connect gate="G$1" pin="PA6" pad="K5"/>+ <connect gate="G$1" pin="PA1" pad="K4"/>+ <connect gate="G$1" pin="PA0_C" pad="K3"/>+ <connect gate="G$1" pin="PC2_C" pad="K2"/>+ <connect gate="G$1" pin="PC3_C" pad="K1"/>+ <connect gate="G$1" pin="PD14" pad="J13"/>+ <connect gate="G$1" pin="PD15" pad="J12"/>+ <connect gate="G$1" pin="PD13" pad="J11"/>+ <connect gate="G$1" pin="PD11" pad="J10"/>+ <connect gate="G$1" pin="PE14" pad="J9"/>+ <connect gate="G$1" pin="PE9" pad="J8"/>+ <connect gate="G$1" pin="PF15" pad="J7"/>+ <connect gate="G$1" pin="PA7" pad="J6"/>+ <connect gate="G$1" pin="PA0" pad="J5"/>+ <connect gate="G$1" pin="PC3" pad="J4"/>+ <connect gate="G$1" pin="VSSA" pad="J3"/>+ <connect gate="G$1" pin="PC1" pad="J2"/>+ <connect gate="G$1" pin="PC0" pad="J1"/>+ <connect gate="G$1" pin="VDD@13" pad="H13"/>+ <connect gate="G$1" pin="VSS@12" pad="H12"/>+ <connect gate="G$1" pin="PG5" pad="H11"/>+ <connect gate="G$1" pin="PG3" pad="H10"/>+ <connect gate="G$1" pin="PG2" pad="H9"/>+ <connect gate="G$1" pin="PE8" pad="H8"/>+ <connect gate="G$1" pin="PF14" pad="H7"/>+ <connect gate="G$1" pin="PA4" pad="H6"/>+ <connect gate="G$1" pin="PC2" pad="H5"/>+ <connect gate="G$1" pin="PF8" pad="H4"/>+ <connect gate="G$1" pin="PF10" pad="H3"/>+ <connect gate="G$1" pin="PH1-OSC_OUT" pad="H2"/>+ <connect gate="G$1" pin="PH0-OSC_IN" pad="H1"/>+ <connect gate="G$1" pin="VDD33USB" pad="G13"/>+ <connect gate="G$1" pin="VDD50USB" pad="G12"/>+ <connect gate="G$1" pin="PG8" pad="G11"/>+ <connect gate="G$1" pin="PG7" pad="G10"/>+ <connect gate="G$1" pin="PG6" pad="G9"/>+ <connect gate="G$1" pin="PE7" pad="G8"/>+ </connects>+ <technologies><technology name=""/></technologies>+ </device>+ </devices>+</deviceset>+</devicesets>+</library>+</drawing>+</eagle>
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viewers/footprint.htmladded+1@@ -0,0 +1 @@+<!doctype html><title>stm32h735agi6</title>
viewers/symbol.htmladded+1@@ -0,0 +1 @@+<!doctype html><title>stm32h735agi6</title>