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STM32H735AGI6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFBGA-169. Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32H735AGI6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFBGA-169
STM32H735AGI6 from STMicroelectronics, in a UFBGA-169. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| A1 | PE4 | bidirectional | 5 V tolerant FT_h I/O (high-speed low-voltage option); alternate functions include TRACED1, SAI1_FS_A, SPI4_NSS, FMC_A20 and DCMI_D4/PSSI_D4. |
| A2 | PE2 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TRACECLK, SAI1_CK1, SPI4_SCK, FMC_A23 and ETH_MII_TXD3. |
| A3 | VDD | power_in | Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13). |
| A4 | VCAP | power_in | Connection for the external VCORE capacitor (CEXT) of the internal regulator (Section 6.3.2). |
| A5 | PB6 | bidirectional | 5 V tolerant FT_fh I/O (FM+ and high-speed low-voltage options); alternate functions include I2C1_SCL, TIM16_CH1N, CEC, USART1_TX and FDCAN2_TX. |
| A6 | VDD | power_in | Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13). |
| A7 | VDD | power_in | Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13). |
| A8 | PG10 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include FDCAN3_RX, SPI1_NSS/I2S1_WS, SAI4_SD_B, FMC_NE3 and DCMI_D2/PSSI_D2. |
| A9 | PD5 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include USART2_TX, OCTOSPIM_P1_IO5 and FMC_NWE. |
| A10 | VDD | power_in | Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13). |
| A11 | PC12 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TRACED3, FMC_D6/FMC_AD6, TIM15_CH1, UART5_TX, SDMMC1_CK and DCMI_D9/PSSI_D9. |
| A12 | PC10 | bidirectional | 5 V tolerant FT_fh I/O; alternate functions include DFSDM1_CKIN5, I2C5_SDA, SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX and SDMMC1_D2. |
| A13 | PH14 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM8_CH2N, UART4_RX, FDCAN1_RX (boot), FMC_D22 and DCMI_D4/PSSI_D4. |
| B1 | PC15-OSC32_OUT | bidirectional | 5 V tolerant FT I/O; LSE oscillator output (OSC32_OUT) with EVENTOUT as alternate function. |
| B2 | PE3 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TRACED0, TIM15_BKIN, SAI1_SD_B, USART10_TX and FMC_A19. |
| B3 | VSS | power_in | Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10). |
| B4 | VDDLDO | power_in | Supply input for the internal LDO regulator; VDDLDO must be less than or equal to VDD, range 1.62 V to 3.6 V. |
| B5 | PB8 | bidirectional | 5 V tolerant FT_fh I/O; alternate functions include TIM16_CH1, I2C1_SCL, FDCAN1_RX, SDMMC1_D4 and DCMI_D6/PSSI_D6. |
| B6 | PB4 | bidirectional | 5 V tolerant FT_h I/O; default function NJTRST debug pin; alternate functions include TIM16_BKIN, TIM3_CH1, SPI1_MISO/I2S1_SDI and UART7_TX. |
| B7 | VSS | power_in | Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10). |
| B8 | PG11 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include LPTIM1_IN2, USART10_RX, SPI1_SCK/I2S1_CK, SPDIFRX1_IN1 and ETH_MII_TX_EN. |
| B9 | PD6 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include SAI1_D1, SPI3_MOSI/I2S3_SDO, USART2_RX, SDMMC2_CK and FMC_NWAIT. |
| B10 | VSS | power_in | Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10). |
| B11 | PC11 | bidirectional | 5 V tolerant FT_fh I/O; alternate functions include DFSDM1_DATIN5, I2C5_SCL, SPI3_MISO/I2S3_SDI, USART3_RX, UART4_RX and SDMMC1_D3. |
| B12 | PA14 | bidirectional | 5 V tolerant FT I/O; default function JTCK/SWCLK debug pin, with EVENTOUT as alternate function. |
| B13 | PH13 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM8_CH1N, UART4_TX, FDCAN1_TX (boot), FMC_D21 and LCD_G2. |
| C1 | PC14-OSC32_IN | bidirectional | 5 V tolerant FT I/O; LSE oscillator input (OSC32_IN) with EVENTOUT as alternate function. |
| C2 | PE6 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TRACED3, TIM1_BKIN2, SAI1_D1, TIM15_CH2, SPI4_MOSI and FMC_A22. |
| C3 | PE5 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TRACED2, SAI1_CK2, DFSDM1_CKIN3, TIM15_CH1, SPI4_MISO and FMC_A21. |
| C4 | PDR_ON | input | Control pin that enables or disables the power-down reset (PDR); the PDR can only be switched OFF through this pin. |
| C5 | PB9 | bidirectional | 5 V tolerant FT_fh I/O; alternate functions include TIM17_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, SDMMC1_CDIR, FDCAN1_TX and DCMI_D7/PSSI_D7. |
| C6 | PB5 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM17_BKIN, TIM3_CH2, I2C1_SMBA, SPI1_MOSI/I2S1_SDO, FDCAN2_RX and UART5_RX. |
| C7 | PG14 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TRACED1, LPTIM1_ETR, USART10_RTS/USART10_DE, SPI6_MOSI/I2S6_SDO, USART6_TX and FMC_A25. |
| C8 | PG9 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include FDCAN3_TX, SPI1_MISO/I2S1_SDI, USART6_RX, SDMMC2_D0 and FMC_NE2/FMC_NCE. |
| C9 | PD4 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include USART2_RTS/USART2_DE, OCTOSPIM_P1_IO4 and FMC_NOE. |
| C10 | PD1 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include DFSDM1_DATIN6, UART4_TX, FDCAN1_TX (boot) and FMC_D3/FMC_AD3. |
| C11 | PA15 | bidirectional | 5 V tolerant FT I/O; default function JTDI debug pin; alternate functions include TIM2_CH1/TIM2_ETR, CEC, SPI1_NSS/I2S1_WS and UART7_TX. |
| C12 | VSS | power_in | Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10). |
| C13 | VDD | power_in | Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13). |
| D1 | VDD | power_in | Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13). |
| D2 | VSS | power_in | Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10). |
| D3 | PC13 | bidirectional | 5 V tolerant FT I/O; additional functions RTC_TAMP1/RTC_TS and WKUP4, with EVENTOUT as alternate function. |
| D4 | PE1 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include LPTIM1_IN2, UART8_TX, FMC_NBL1, DCMI_D3/PSSI_D3 and LCD_R6. |
| D5 | PE0 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include LPTIM1_ETR, TIM4_ETR, LPTIM2_ETR, UART8_RX, SAI4_MCLK_A and FMC_NBL0. |
| D6 | PB7 | bidirectional | 5 V tolerant FT_fa I/O (analog option supplied by VDDA); alternate functions include TIM17_CH1N, I2C1_SDA, USART1_RX and FMC_NL; additional function PVD_IN. |
| D7 | PG13 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TRACED0, LPTIM1_OUT, USART10_CTS, SPI6_SCK/I2S6_CK, ETH_MII_TXD0 and FMC_A24. |
| D8 | PD7 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include DFSDM1_DATIN4, SPI1_MOSI/I2S1_SDO, USART2_CK, SDMMC2_CMD and FMC_NE1. |
| D9 | PD3 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include DFSDM1_CKOUT, SPI2_SCK/I2S2_CK, USART2_CTS/USART2_NSS, FMC_CLK and DCMI_D5/PSSI_D5. |
| D10 | PD0 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include DFSDM1_CKIN6, UART4_RX, FDCAN1_RX (boot), UART9_CTS and FMC_D2/FMC_AD2. |
| D11 | PA13 | bidirectional | 5 V tolerant FT I/O; default function JTMS/SWDIO debug pin, with EVENTOUT as alternate function. |
| D12 | VDDLDO | power_in | Supply input for the internal LDO regulator; VDDLDO must be less than or equal to VDD, range 1.62 V to 3.6 V. |
| D13 | VCAP | power_in | Connection for the external VCORE capacitor (CEXT) of the internal regulator (Section 6.3.2). |
| E1 | VLXSMPS | power_out | Switching (LX) node of the internal SMPS step-down converter; external components are shown in Figure 17. |
| E2 | VSSSMPS | power_in | Ground pin for the internal SMPS step-down converter. |
| E3 | VBAT | power_in | Backup-domain supply for the RTC, backup registers and backup SRAM (VBAT supply, Section 6.1.6). |
| E4 | PF1 | bidirectional | 5 V tolerant FT_fh I/O; alternate functions include I2C2_SCL (boot), I2C5_SCL, OCTOSPIM_P2_IO1, FMC_A1 and TIM23_CH2. |
| E5 | PF3 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include OCTOSPIM_P2_IO3, FMC_A3 and TIM23_CH4; additional function ADC3_INP5. |
| E6 | BOOT0 | input | Dedicated BOOT0 pin; input voltage range is VSS to 9.0 V (Table 10 and Table 13). |
| E7 | PG15 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include USART6_CTS/USART6_NSS, OCTOSPIM_P2_DQS, USART10_CK, FMC_NCAS and DCMI_D13/PSSI_D13. |
| E8 | PG12 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include LPTIM1_IN1, OCTOSPIM_P2_NCS, USART10_TX, SPI6_MISO/I2S6_SDI, FMC_NE4 and TIM23_CH1. |
| E9 | PD2 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TRACED2, FMC_D7/FMC_AD7, TIM3_ETR, TIM15_BKIN, UART5_RX and SDMMC1_CMD. |
| E10 | PA10 | bidirectional | 5 V tolerant FT_u I/O (USB option, supplied by VDD33USB); alternate functions include TIM1_CH3, LPUART1_RX, USART1_RX (boot) and OTG_HS_ID. |
| E11 | PA9 | bidirectional | 5 V tolerant FT_u I/O (USB option, supplied by VDD33USB); alternate functions include TIM1_CH2, LPUART1_TX, SPI2_SCK/I2S2_CK and USART1_TX (boot); additional function OTG_HS_VBUS. |
| E12 | PA8 | bidirectional | 5 V tolerant FT_fh I/O; alternate functions include MCO1, TIM1_CH1, I2C3_SCL (boot), I2C5_SCL, USART1_CK and OTG_HS_SOF. |
| E13 | PA12 | bidirectional | 5 V tolerant FT_u I/O (USB option, supplied by VDD33USB); alternate functions include TIM1_ETR, LPUART1_RTS, SPI2_SCK/I2S2_CK and USART1_RTS/USART1_DE; additional function OTG_HS_DP (boot). |
| F1 | VDDSMPS | power_in | Supply input for the internal SMPS step-down converter; VDDSMPS equals VDD, range 1.62 V to 3.6 V. |
| F2 | VFBSMPS | input | Feedback pin of the internal SMPS step-down converter (external components per Figure 17). |
| F3 | PF0 | bidirectional | 5 V tolerant FT_fh I/O; alternate functions include I2C2_SDA (boot), I2C5_SDA, OCTOSPIM_P2_IO0, FMC_A0 and TIM23_CH1. |
| F4 | PF2 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include I2C2_SMBA, I2C5_SMBA, OCTOSPIM_P2_IO2, FMC_A2 and TIM23_CH3. |
| F5 | PF5 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include OCTOSPIM_P2_NCLK and FMC_A5; additional function ADC3_INP4. |
| F6 | PF7 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM17_CH1, FDCAN3_TX, SPI5_SCK, UART7_TX and TIM23_CH2; additional function ADC3_INP3. |
| F7 | PB3 | bidirectional | 5 V tolerant FT_h I/O; default function JTDO/TRACESWO debug pin; alternate functions include TIM2_CH2, SPI1_SCK/I2S1_CK, SDMMC2_D2 and UART7_RX. |
| F8 | PG4 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM1_BKIN2, FMC_A14/FMC_BA0 and TIM1_BKIN2_COMP12. |
| F9 | PC6 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, I2S2_MCK, USART6_TX, FMC_NWAIT and DCMI_D0/PSSI_D0. |
| F10 | PC7 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include DBTRGIO, TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, FMC_NE1 and DCMI_D1/PSSI_D1. |
| F11 | PC9 | bidirectional | 5 V tolerant FT_fh I/O; alternate functions include MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA (boot), I2C5_SDA and SDMMC1_D1. |
| F12 | PC8 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TRACED1, TIM3_CH3, TIM8_CH3, USART6_CK, FMC_NE2/FMC_NCE and SDMMC1_D0. |
| F13 | PA11 | bidirectional | 5 V tolerant FT_u I/O (USB option, supplied by VDD33USB); alternate functions include TIM1_CH4, LPUART1_CTS, SPI2_NSS/I2S2_WS, UART4_RX and FDCAN1_RX; additional function OTG_HS_DM (boot). |
| G1 | VDD | power_in | Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13). |
| G2 | VSS | power_in | Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10). |
| G3 | PF4 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include OCTOSPIM_P2_CLK and FMC_A4; additional functions ADC3_INN5 and ADC3_INP9. |
| G4 | PF6 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM16_CH1, FDCAN3_RX, SPI5_NSS, UART7_RX and TIM23_CH1; additional functions ADC3_INN4 and ADC3_INP8. |
| G5 | PF9 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM17_CH1N, SPI5_MOSI, UART7_CTS, TIM14_CH1 and TIM23_CH4; additional function ADC3_INP2. |
| G6 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor (RST pin type). |
| G7 | PF13 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include DFSDM1_DATIN6, I2C4_SMBA, FMC_A7 and TIM24_CH3; additional function ADC2_INP2. |
| G8 | PE7 | bidirectional | 3.3 V tolerant TT_ha I/O (analog option supplied by VDDA); alternate functions include TIM1_ETR, DFSDM1_DATIN2, UART7_RX, OCTOSPIM_P1_IO4 and FMC_D4/FMC_AD4. |
| G9 | PG6 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM17_BKIN, OCTOSPIM_P1_NCS, FMC_NE3, DCMI_D12/PSSI_D12 and LCD_R7. |
| G10 | PG7 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include SAI1_MCLK_A, USART6_CK, OCTOSPIM_P2_DQS, FMC_INT and DCMI_D13/PSSI_D13. |
| G11 | PG8 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM8_ETR, SPI6_NSS/I2S6_WS, USART6_RTS/USART6_DE, SPDIFRX1_IN3, ETH_PPS_OUT and FMC_SDCLK. |
| G12 | VDD50USB | power_in | USB regulator supply input; 4 V to 5.5 V when the USB regulator is ON (Table 13). |
| G13 | VDD33USB | power_in | USB domain supply; 3.0 V to 3.6 V when USB is used, 0 V to 3.6 V when USB is not used (Table 13). |
| H1 | PH0-OSC_IN | bidirectional | 5 V tolerant FT I/O; HSE oscillator input (OSC_IN) with EVENTOUT as alternate function. |
| H2 | PH1-OSC_OUT | bidirectional | 5 V tolerant FT I/O; HSE oscillator output (OSC_OUT) with EVENTOUT as alternate function. |
| H3 | PF10 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM16_BKIN, SAI1_D3, OCTOSPIM_P1_CLK and LCD_DE; additional functions ADC3_INN2 and ADC3_INP6. |
| H4 | PF8 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM16_CH1N, SPI5_MISO, SAI1_SCK_B, UART7_RTS/UART7_DE and OCTOSPIM_P1_IO0; additional functions ADC3_INN3 and ADC3_INP7. |
| H5 | PC2 | bidirectional | 5 V tolerant FT_a I/O (analog option supplied by VDDA); alternate functions include PWR_DEEPSLEEP, DFSDM1_CKIN1, SPI2_MISO/I2S2_SDI, OTG_HS_ULPI_DIR and FMC_SDNE0; additional functions ADC123_INN11 and ADC123_INP12. |
| H6 | PA4 | bidirectional | 3.3 V tolerant TT_ha I/O (analog option supplied by VDDA); alternate functions include D1PWREN, TIM5_ETR, SPI1_NSS/I2S1_WS, USART2_CK and FMC_D8/FMC_AD8; additional functions ADC12_INP18 and DAC1_OUT1. |
| H7 | PF14 | bidirectional | 5 V tolerant FT_fha I/O (analog option supplied by VDDA); alternate functions include DFSDM1_CKIN6, I2C4_SCL, FMC_A8 and TIM24_CH4; additional functions ADC2_INN2 and ADC2_INP6. |
| H8 | PE8 | bidirectional | 3.3 V tolerant TT_ha I/O (analog option supplied by VDDA); alternate functions include TIM1_CH1N, DFSDM1_CKIN2, UART7_TX, OCTOSPIM_P1_IO5 and FMC_D5/FMC_AD5; additional functions COMP2_OUT and OPAMP2_VINM. |
| H9 | PG2 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM8_BKIN, TIM8_BKIN_COMP12, FMC_A12 and TIM24_ETR. |
| H10 | PG3 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM8_BKIN2, TIM8_BKIN2_COMP12, FMC_A13 and TIM23_ETR. |
| H11 | PG5 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM1_ETR, FMC_A15/FMC_BA1 and EVENTOUT. |
| H12 | VSS | power_in | Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10). |
| H13 | VDD | power_in | Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13). |
| J1 | PC0 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include FMC_D12/FMC_AD12, DFSDM1_CKIN0, FMC_A25, OTG_HS_ULPI_STP and FMC_SDNWE; additional function ADC123_INP10. |
| J2 | PC1 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TRACED0, SAI4_D1, SAI1_D1, DFSDM1_DATIN0, SPI2_MOSI/I2S2_SDO and ETH_MDC; additional functions ADC123_INN10, ADC123_INP11, RTC_TAMP3 and WKUP6. |
| J3 | VSSA | power_in | Analog ground reference for the ADC, DAC, OPAMP, COMP and VREFBUF blocks. |
| J4 | PC3 | bidirectional | 5 V tolerant FT_a I/O (analog option supplied by VDDA); alternate functions include PWR_SLEEP, DFSDM1_DATIN1, SPI2_MOSI/I2S2_SDO, OTG_HS_ULPI_NXT and FMC_SDCKE0; additional functions ADC12_INN12 and ADC12_INP13. |
| J5 | PA0 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, SPI6_NSS/I2S6_WS, USART2_CTS/USART2_NSS and FMC_A19; additional functions ADC1_INP16 and WKUP1. |
| J6 | PA7 | bidirectional | 3.3 V tolerant TT_ha I/O (analog option supplied by VDDA); alternate functions include TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI/I2S1_SDO, ETH_MII_RX_DV and FMC_SDNWE; additional functions ADC12_INN3, ADC12_INP7 and OPAMP1_VINM. |
| J7 | PF15 | bidirectional | 5 V tolerant FT_fh I/O; alternate functions include I2C4_SDA, FMC_A9 and EVENTOUT. |
| J8 | PE9 | bidirectional | 3.3 V tolerant TT_ha I/O (analog option supplied by VDDA); alternate functions include TIM1_CH1, DFSDM1_CKOUT, UART7_RTS/UART7_DE, OCTOSPIM_P1_IO6 and FMC_D6/FMC_AD6; additional functions OPAMP2_VINP and COMP2_INP. |
| J9 | PE14 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM1_CH4, SPI4_MOSI (boot), SAI4_MCLK_B, FMC_D11/FMC_AD11 and LCD_CLK. |
| J10 | PD11 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include LPTIM2_IN2, I2C4_SMBA, USART3_CTS/USART3_NSS, OCTOSPIM_P1_IO0, SAI4_SD_A and FMC_A16/FMC_CLE. |
| J11 | PD13 | bidirectional | 5 V tolerant FT_fh I/O; alternate functions include LPTIM1_OUT, TIM4_CH2, I2C4_SDA, FDCAN3_TX, OCTOSPIM_P1_IO3 and FMC_A18. |
| J12 | PD15 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM4_CH4, UART8_RTS/UART8_DE, UART9_TX and FMC_D1/FMC_AD1. |
| J13 | PD14 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM4_CH3, UART8_CTS, UART9_RX and FMC_D0/FMC_AD0. |
| K1 | PC3_C | passive | Analog-only pin (ANA, TT_a) supplied by VDDA; additional function ADC3_INP1. |
| K2 | PC2_C | passive | Analog-only pin (ANA, TT_a) supplied by VDDA; additional functions ADC3_INN1 and ADC3_INP0. |
| K3 | PA0_C | passive | Analog-only pin (ANA, TT_a) supplied by VDDA; additional functions ADC12_INN1 and ADC12_INP0. |
| K4 | PA1 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM2_CH2, TIM5_CH2, LPTIM3_OUT, USART2_RTS/USART2_DE, UART4_RX and ETH_MII_RX_CLK; additional functions ADC1_INN16 and ADC1_INP17. |
| K5 | PA6 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO/I2S1_SDI and SPI6_MISO/I2S6_SDI; additional function ADC12_INP3. |
| K6 | PC4 | bidirectional | 3.3 V tolerant TT_ha I/O (analog option supplied by VDDA); alternate functions include PWR_DEEPSLEEP, FMC_A22, DFSDM1_CKIN2, I2S1_MCK, ETH_MII_RXD0 and FMC_SDNE0; additional functions ADC12_INP4, OPAMP1_VOUT and COMP1_INM. |
| K7 | PG0 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include OCTOSPIM_P2_IO4, UART9_RX, FMC_A10 and EVENTOUT. |
| K8 | PE13 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM1_CH3, DFSDM1_CKIN5, SPI4_MISO (boot), SAI4_FS_B, FMC_D10/FMC_AD10, COMP2_OUT and LCD_DE. |
| K9 | PH10 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM5_CH1, I2C4_SMBA, FMC_D18, DCMI_D1/PSSI_D1 and LCD_R4. |
| K10 | PH12 | bidirectional | 5 V tolerant FT_fh I/O; alternate functions include TIM5_CH3, I2C4_SDA, FMC_D20, DCMI_D3/PSSI_D3 and LCD_R6. |
| K11 | PD9 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include DFSDM1_DATIN3, USART3_RX (boot), FMC_D14/FMC_AD14 and EVENTOUT. |
| K12 | PD10 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include DFSDM1_CKOUT, USART3_CK, FMC_D15/FMC_AD15 and LCD_B3. |
| K13 | PD12 | bidirectional | 5 V tolerant FT_fh I/O; alternate functions include LPTIM1_IN1, TIM4_CH1, LPTIM2_IN1, I2C4_SCL, FDCAN3_RX, USART3_RTS/USART3_DE and FMC_A17/FMC_ALE. |
| L1 | VDDA | power_in | Analog supply: 1.62 V minimum when ADC or COMP is used, 1.8 V for DAC or VREFBUF, 2.0 V for OPAMP (Table 13). |
| L2 | VREF+ | power_in | Positive reference voltage pin for the analog converters (ADC and DAC). |
| L3 | PA1_C | passive | Analog-only pin (ANA, TT_a) supplied by VDDA; additional function ADC12_INP1. |
| L4 | PA5 | bidirectional | 3.3 V tolerant TT_ha I/O (analog option supplied by VDDA); alternate functions include D2PWREN, TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK/I2S1_CK, OTG_HS_ULPI_CK and FMC_D9/FMC_AD9; additional functions ADC12_INN18, ADC12_INP19 and DAC1_OUT2. |
| L5 | PB1 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM1_CH3N, TIM3_CH4, TIM8_CH3N, OCTOSPIM_P1_IO0, DFSDM1_DATIN1 and LCD_R6; additional functions ADC12_INP5 and COMP1_INM. |
| L6 | PB2 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include RTC_OUT, SAI4_D1, SAI1_D1, DFSDM1_CKIN1, SPI3_MOSI/I2S3_SDO and OCTOSPIM_P1_CLK; additional function COMP1_INP. |
| L7 | PG1 | bidirectional | 3.3 V tolerant TT_h I/O; alternate functions include OCTOSPIM_P2_IO5, UART9_TX and FMC_A11; additional function OPAMP2_VINM. |
| L8 | PE12 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM1_CH3N, DFSDM1_DATIN5, SPI4_SCK (boot), SAI4_SCK_B, FMC_D9/FMC_AD9, COMP1_OUT and LCD_B4. |
| L9 | PB10 | bidirectional | 5 V tolerant FT_fh I/O; alternate functions include TIM2_CH3, LPTIM2_IN1, I2C2_SCL, SPI2_SCK/I2S2_CK, USART3_TX (boot), OCTOSPIM_P1_NCS and OTG_HS_ULPI_D3. |
| L10 | PH11 | bidirectional | 5 V tolerant FT_fh I/O; alternate functions include TIM5_CH2, I2C4_SCL, FMC_D19, DCMI_D2/PSSI_D2 and LCD_R5. |
| L11 | PB13 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM1_CH1N, LPTIM2_OUT, OCTOSPIM_P1_IO2, SPI2_SCK/I2S2_CK, USART3_CTS/USART3_NSS, FDCAN2_TX and SDMMC1_D0. |
| L12 | VSS | power_in | Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10). |
| L13 | VDD | power_in | Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13). |
| M1 | VDD | power_in | Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13). |
| M2 | VSS | power_in | Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10). |
| M3 | PH3 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include OCTOSPIM_P1_IO5, SAI4_MCLK_B, ETH_MII_COL, FMC_SDNE0 and LCD_R1; additional functions ADC3_INN13 and ADC3_INP14. |
| M4 | VSS | power_in | Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10). |
| M5 | PB0 | bidirectional | 3.3 V tolerant TT_ha I/O (analog option supplied by VDDA); alternate functions include TIM1_CH2N, TIM3_CH3, TIM8_CH2N, OCTOSPIM_P1_IO1, DFSDM1_CKOUT, UART4_CTS and LCD_R3; additional functions ADC12_INN5, ADC12_INP9, OPAMP1_VINP and COMP1_INP. |
| M6 | PF11 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include SPI5_MOSI, OCTOSPIM_P1_NCLK, SAI4_SD_B, FMC_NRAS, DCMI_D12/PSSI_D12 and TIM24_CH1; additional function ADC1_INP2. |
| M7 | VSS | power_in | Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10). |
| M8 | PE10 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM1_CH2N, DFSDM1_DATIN4, UART7_CTS, OCTOSPIM_P1_IO7 and FMC_D7/FMC_AD7; additional function COMP2_INM. |
| M9 | PB11 | bidirectional | 5 V tolerant FT_f I/O (FM+ option); alternate functions include TIM2_CH4, LPTIM2_ETR, I2C2_SDA, DFSDM1_CKIN7, USART3_RX (boot), OTG_HS_ULPI_D4 and ETH_MII_TX_EN. |
| M10 | VDDLDO | power_in | Supply input for the internal LDO regulator; VDDLDO must be less than or equal to VDD, range 1.62 V to 3.6 V. |
| M11 | VSS | power_in | Ground pin; all VSS pins must be connected and ground-to-ground variation must stay within 50 mV (Table 10). |
| M12 | PD8 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include DFSDM1_CKIN3, USART3_TX (boot), SPDIFRX1_IN2 and FMC_D13/FMC_AD13. |
| M13 | PB15 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include RTC_REFIN, TIM1_CH3N, TIM12_CH2, TIM8_CH3N, USART1_RX, SPI2_MOSI/I2S2_SDO and FMC_D11/FMC_AD11. |
| N1 | PA2 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM2_CH3, TIM5_CH3, LPTIM4_OUT, TIM15_CH1, OCTOSPIM_P1_IO0, USART2_TX (boot) and ETH_MDIO; additional functions ADC12_INP14 and WKUP2. |
| N2 | PH2 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include LPTIM1_IN2, OCTOSPIM_P1_IO4, SAI4_SCK_B, ETH_MII_CRS, FMC_SDCKE0 and LCD_R0; additional function ADC3_INP13. |
| N3 | PA3 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM2_CH4, TIM5_CH4, LPTIM5_OUT, TIM15_CH2, I2S6_MCK, OCTOSPIM_P1_IO2, USART2_RX (boot) and OTG_HS_ULPI_D0; additional function ADC12_INP15. |
| N4 | VDD | power_in | Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13). |
| N5 | PC5 | bidirectional | 3.3 V tolerant TT_ha I/O (analog option supplied by VDDA); alternate functions include PWR_SLEEP, SAI4_D3, SAI1_D3, DFSDM1_DATIN2, PSSI_D15, OCTOSPIM_P1_DQS, FMC_SDCKE0 and COMP1_OUT; additional functions ADC12_INN4, ADC12_INP8 and OPAMP1_VINM. |
| N6 | PF12 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include OCTOSPIM_P2_DQS, FMC_A6 and TIM24_CH2; additional functions ADC1_INN2 and ADC1_INP6. |
| N7 | VDD | power_in | Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13). |
| N8 | PE11 | bidirectional | 5 V tolerant FT_ha I/O (analog option supplied by VDDA); alternate functions include TIM1_CH2, DFSDM1_CKIN4, SPI4_NSS (boot), SAI4_SD_B, OCTOSPIM_P1_NCS, FMC_D8/FMC_AD8 and LCD_G3; additional function COMP2_INP. |
| N9 | PE15 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM1_BKIN, USART10_CK, FMC_D12/FMC_AD12, TIM1_BKIN_COMP12 and LCD_R7. |
| N10 | VCAP | power_in | Connection for the external VCORE capacitor (CEXT) of the internal regulator (Section 6.3.2). |
| N11 | VDD | power_in | Standard operating supply pin; VDD range is 1.62 V to 3.6 V (Table 13). |
| N12 | PB12 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM1_BKIN, OCTOSPIM_P1_NCLK, I2C2_SMBA, SPI2_NSS/I2S2_WS, FDCAN2_RX, OTG_HS_ULPI_D5 and UART5_RX. |
| N13 | PB14 | bidirectional | 5 V tolerant FT_h I/O; alternate functions include TIM1_CH2N, TIM12_CH1, TIM8_CH2N, USART1_TX, SPI2_MISO/I2S2_SDI, DFSDM1_DATIN2 and FMC_D10/FMC_AD10. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFBGA-169 |
| Category | Embedded Processors & Controllers |
| Pins | 169 |
CAD (KiCad official)
- Symbol:
STM32H735AGI6 - Footprint:
Package_BGA:UFBGA-169_7x7mm_Layout13x13_P0.5mm - 3D model: UFBGA-169 (KiCad packages3D, STEP)
- 3D model files:
stm32h735agi6-etched.step/stm32h735agi6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32h735agi6.step/stm32h735agi6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (273 pp, sha256
51f26721416c64ae, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).