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STM32H733ZGT6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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STM32H733ZGT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-144(20x20)

STM32H733ZGT6 from STMicroelectronics, in a LQFP-144(20x20). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TRACECLK, SAI1_CK1, USART10_RX and SPI4_SCK.
2 PE3 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TRACED0, TIM15_BKIN, SAI1_SD_B and USART10_TX.
3 PE4 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TRACED1, SAI1_D2, DFSDM1_DATIN3 and TIM15_CH1N.
4 PE5 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TRACED2, SAI1_CK2, DFSDM1_CKIN3 and TIM15_CH1.
5 PE6 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TRACED3, TIM1_BKIN2, SAI1_D1 and TIM15_CH2.
6 VBAT power_in Backup-domain supply for the RTC, LSE and 32x32-bit backup registers; external main supply including VBAT must stay within -0.3 V to 4.0 V (Table 9).
7 PC13 bidirectional 5 V tolerant FT I/O with additional functions RTC_TAMP1/RTC_TS and WKUP4.
8 PC14-OSC32_IN bidirectional 5 V tolerant FT I/O that doubles as the 32.768 kHz LSE oscillator input OSC32_IN.
9 PC15-OSC32_OUT bidirectional 5 V tolerant FT I/O that doubles as the 32.768 kHz LSE oscillator output OSC32_OUT.
10 PF0 bidirectional 5 V tolerant FT_fh I/O (I2C FM+ and high-speed low-voltage options) with alternate functions including I2C2_SDA(boot), I2C5_SDA, OCTOSPIM_P2_IO0 and FMC_A0.
11 PF1 bidirectional 5 V tolerant FT_fh I/O (I2C FM+ and high-speed low-voltage options) with alternate functions including I2C2_SCL(boot), I2C5_SCL, OCTOSPIM_P2_IO1 and FMC_A1.
12 PF2 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including I2C2_SMBA, I2C5_SMBA, OCTOSPIM_P2_IO2 and FMC_A2.
13 PF3 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including OCTOSPIM_P2_IO3, FMC_A3 and TIM23_CH4, plus ADC3_INP5.
14 PF4 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including OCTOSPIM_P2_CLK and FMC_A4, plus ADC3_INN5 and ADC3_INP9.
15 PF5 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including OCTOSPIM_P2_NCLK and FMC_A5, plus ADC3_INP4.
16 VSS power_in Ground pin; variation between all ground pins must not exceed 50 mV (Table 9).
17 VDD power_in Main I/O and core supply pin; standard operating voltage is 1.62 V to 3.6 V (Table 12).
18 PF6 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including TIM16_CH1, FDCAN3_RX, SPI5_NSS and SAI1_SD_B, plus ADC3_INN4 and ADC3_INP8.
19 PF7 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including TIM17_CH1, FDCAN3_TX, SPI5_SCK and SAI1_MCLK_B, plus ADC3_INP3.
20 PF8 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including TIM16_CH1N, SPI5_MISO and SAI1_SCK_B, plus ADC3_INN3 and ADC3_INP7.
21 PF9 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including TIM17_CH1N, SPI5_MOSI and SAI1_FS_B, plus ADC3_INP2.
22 PF10 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including TIM16_BKIN, SAI1_D3, PSSI_D15 and OCTOSPIM_P1_CLK, plus ADC3_INN2 and ADC3_INP6.
23 PH0-OSC_IN bidirectional 5 V tolerant FT I/O that doubles as the HSE oscillator input OSC_IN for 4-50 MHz external clock or crystal.
24 PH1-OSC_OUT bidirectional 5 V tolerant FT I/O that doubles as the HSE oscillator output OSC_OUT for 4-50 MHz external clock or crystal.
25 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor (RST structure).
26 PC0 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including FMC_D12/FMC_AD12, DFSDM1_CKIN0 and OTG_HS_ULPI_STP, plus ADC123_INP10.
27 PC1 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including TRACED0, SAI4_D1, SAI1_D1 and SPI2_MOSI/I2S2_SDO, plus ADC123_INN10, ADC123_INP11, RTC_TAMP3 and WKUP6.
28 PC2_C passive Analog-type TT_a pin (3.3 V tolerant, analog option supplied by VDDA) with additional functions ADC3_INN1 and ADC3_INP0.
29 PC3_C passive Analog-type TT_a pin (3.3 V tolerant, analog option supplied by VDDA) with additional function ADC3_INP1.
30 VDD power_in Main I/O and core supply pin; standard operating voltage is 1.62 V to 3.6 V (Table 12).
31 VSSA power_in Analog ground for ADC, DAC, OPAMP and COMP; all voltages are referenced to VSS (Section 6.1).
32 VREF+ power_in Positive voltage reference pin for the ADC/DAC (pin type S in Table 7); the pin table gives no separate voltage limit for it.
33 VDDA power_in Analog supply; 1.62 V to 3.6 V when ADC or COMP is used, 1.8 V minimum for DAC and 2.0 V minimum for OPAMP (Table 12).
34 PA0 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR and USART2_CTS, plus ADC1_INP16 and WKUP1.
35 PA1 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including TIM2_CH2, TIM5_CH2, LPTIM3_OUT and ETH_MII_RX_CLK/ETH_RMII_REF_CLK, plus ADC1_INN16 and ADC1_INP17.
36 PA2 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including TIM2_CH3, TIM5_CH3, LPTIM4_OUT and USART2_TX(boot), plus ADC12_INP14 and WKUP2.
37 PA3 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including TIM2_CH4, TIM5_CH4, LPTIM5_OUT and USART2_RX(boot), plus ADC12_INP15.
38 VSS power_in Ground pin; variation between all ground pins must not exceed 50 mV (Table 9).
39 VDD power_in Main I/O and core supply pin; standard operating voltage is 1.62 V to 3.6 V (Table 12).
40 PA4 bidirectional 3.3 V tolerant TT_ha I/O (analog option supplied by VDDA) with alternate functions including D1PWREN, TIM5_ETR, SPI1_NSS(boot)/I2S1_WS and SPI3_NSS/I2S3_WS, plus ADC12_INP18 and DAC1_OUT1.
41 PA5 bidirectional 3.3 V tolerant TT_ha I/O (analog option supplied by VDDA) with alternate functions including D2PWREN, TIM2_CH1/TIM2_ETR, TIM8_CH1N and SPI1_SCK(boot)/I2S1_CK, plus ADC12_INN18, ADC12_INP19 and DAC1_OUT2.
42 PA6 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including TIM1_BKIN, TIM3_CH1, SPI1_MISO(boot)/I2S1_SDI and OCTOSPIM_P1_IO3, plus ADC12_INP3.
43 PA7 bidirectional 3.3 V tolerant TT_ha I/O (analog option supplied by VDDA) with alternate functions including TIM1_CH1N, TIM3_CH2, SPI1_MOSI(boot)/I2S1_SDO and OCTOSPIM_P1_IO2, plus ADC12_INN3, ADC12_INP7 and OPAMP1_VINM.
44 PC4 bidirectional 3.3 V tolerant TT_ha I/O (analog option supplied by VDDA) with alternate functions including PWR_DEEPSLEEP, FMC_A22, DFSDM1_CKIN2 and I2S1_MCK, plus ADC12_INP4, OPAMP1_VOUT and COMP1_INM.
45 PC5 bidirectional 3.3 V tolerant TT_ha I/O (analog option supplied by VDDA) with alternate functions including PWR_SLEEP, SAI4_D3, SAI1_D3 and DFSDM1_DATIN2, plus ADC12_INN4, ADC12_INP8 and OPAMP1_VINM.
46 PB0 bidirectional 3.3 V tolerant TT_ha I/O (analog option supplied by VDDA) with alternate functions including TIM1_CH2N, TIM3_CH3, TIM8_CH2N and OCTOSPIM_P1_IO1, plus ADC12_INN5, ADC12_INP9, OPAMP1_VINP and COMP1_INP.
47 PB1 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including TIM1_CH3N, TIM3_CH4, TIM8_CH3N and OCTOSPIM_P1_IO0, plus ADC12_INP5 and COMP1_INM.
48 PB2 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including RTC_OUT, SAI4_D1, SAI1_D1 and DFSDM1_CKIN1, plus COMP1_INP.
49 PF11 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including SPI5_MOSI, OCTOSPIM_P1_NCLK, SAI4_SD_B and FMC_NRAS, plus ADC1_INP2.
50 PF12 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including OCTOSPIM_P2_DQS, FMC_A6 and TIM24_CH2, plus ADC1_INN2 and ADC1_INP6.
51 VSS power_in Ground pin; variation between all ground pins must not exceed 50 mV (Table 9).
52 VDD power_in Main I/O and core supply pin; standard operating voltage is 1.62 V to 3.6 V (Table 12).
53 PF13 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including DFSDM1_DATIN6, I2C4_SMBA, FMC_A7 and TIM24_CH3, plus ADC2_INP2.
54 PF14 bidirectional 5 V tolerant FT_fha I/O (I2C FM+ and analog options) with alternate functions including DFSDM1_CKIN6, I2C4_SCL, FMC_A8 and TIM24_CH4, plus ADC2_INN2 and ADC2_INP6.
55 PF15 bidirectional 5 V tolerant FT_fh I/O (I2C FM+ and high-speed low-voltage options) with alternate functions including I2C4_SDA and FMC_A9.
56 PG0 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including OCTOSPIM_P2_IO4, UART9_RX and FMC_A10.
57 PG1 bidirectional 3.3 V tolerant TT_h I/O (high-speed low-voltage option) with alternate functions including OCTOSPIM_P2_IO5, UART9_TX and FMC_A11, plus OPAMP2_VINM.
58 PE7 bidirectional 3.3 V tolerant TT_ha I/O (analog option supplied by VDDA) with alternate functions including TIM1_ETR, DFSDM1_DATIN2, UART7_RX and OCTOSPIM_P1_IO4, plus OPAMP2_VOUT and COMP2_INM.
59 PE8 bidirectional 3.3 V tolerant TT_ha I/O (analog option supplied by VDDA) with alternate functions including TIM1_CH1N, DFSDM1_CKIN2, UART7_TX and FMC_D5/FMC_AD5, plus COMP2_OUT and OPAMP2_VINM.
60 PE9 bidirectional 3.3 V tolerant TT_ha I/O (analog option supplied by VDDA) with alternate functions including TIM1_CH1, DFSDM1_CKOUT, UART7_RTS/UART7_DE and FMC_D6/FMC_AD6, plus OPAMP2_VINP and COMP2_INP.
61 VSS power_in Ground pin; variation between all ground pins must not exceed 50 mV (Table 9).
62 VDD power_in Main I/O and core supply pin; standard operating voltage is 1.62 V to 3.6 V (Table 12).
63 PE10 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including TIM1_CH2N, DFSDM1_DATIN4, UART7_CTS and OCTOSPIM_P1_IO7, plus COMP2_INM.
64 PE11 bidirectional 5 V tolerant FT_ha I/O (analog option supplied by VDDA) with alternate functions including TIM1_CH2, DFSDM1_CKIN4, SPI4_NSS(boot) and SAI4_SD_B, plus COMP2_INP.
65 PE12 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TIM1_CH3N, DFSDM1_DATIN5, SPI4_SCK(boot) and FMC_D9/FMC_AD9, plus COMP1_OUT.
66 PE13 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TIM1_CH3, DFSDM1_CKIN5, SPI4_MISO(boot) and FMC_D10/FMC_AD10, plus COMP2_OUT.
67 PE14 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TIM1_CH4, SPI4_MOSI(boot), SAI4_MCLK_B and FMC_D11/FMC_AD11.
68 PE15 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TIM1_BKIN, USART10_CK, FMC_D12/FMC_AD12 and TIM1_BKIN_COMP12.
69 PB10 bidirectional 5 V tolerant FT_fh I/O (I2C FM+ and high-speed low-voltage options) with alternate functions including TIM2_CH3, LPTIM2_IN1, I2C2_SCL and SPI2_SCK/I2S2_CK.
70 PB11 bidirectional 5 V tolerant FT_f I/O (I2C FM+ option) with alternate functions including TIM2_CH4, LPTIM2_ETR, I2C2_SDA and USART3_RX(boot).
71 VCAP power_in Core regulator capacitor pin; connect a 2.2 µF external capacitor CEXT with ESR below 100 mΩ (Table 14); two VCAP pins are used on this package.
72 VDD power_in Main I/O and core supply pin; standard operating voltage is 1.62 V to 3.6 V (Table 12).
73 PB12 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TIM1_BKIN, OCTOSPIM_P1_NCLK, I2C2_SMBA and SPI2_NSS/I2S2_WS.
74 PB13 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TIM1_CH1N, LPTIM2_OUT, OCTOSPIM_P1_IO2 and SPI2_SCK/I2S2_CK.
75 PB14 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TIM1_CH2N, TIM12_CH1, TIM8_CH2N and USART1_TX.
76 PB15 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including RTC_REFIN, TIM1_CH3N, TIM12_CH2 and USART1_RX.
77 PD8 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including DFSDM1_CKIN3, USART3_TX(boot), SPDIFRX1_IN2 and FMC_D13/FMC_AD13.
78 PD9 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including DFSDM1_DATIN3, USART3_RX(boot) and FMC_D14/FMC_AD14.
79 PD10 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including DFSDM1_CKOUT, USART3_CK, FMC_D15/FMC_AD15 and LCD_B3.
80 PD11 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including LPTIM2_IN2, I2C4_SMBA, USART3_CTS/USART3_NSS and FMC_A16/FMC_CLE.
81 PD12 bidirectional 5 V tolerant FT_fh I/O (I2C FM+ and high-speed low-voltage options) with alternate functions including LPTIM1_IN1, TIM4_CH1, I2C4_SCL and FDCAN3_RX.
82 PD13 bidirectional 5 V tolerant FT_fh I/O (I2C FM+ and high-speed low-voltage options) with alternate functions including LPTIM1_OUT, TIM4_CH2, I2C4_SDA and FDCAN3_TX.
83 VSS power_in Ground pin; variation between all ground pins must not exceed 50 mV (Table 9).
84 VDD power_in Main I/O and core supply pin; standard operating voltage is 1.62 V to 3.6 V (Table 12).
85 PD14 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TIM4_CH3, UART8_CTS, UART9_RX and FMC_D0/FMC_AD0.
86 PD15 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TIM4_CH4, UART8_RTS/UART8_DE, UART9_TX and FMC_D1/FMC_AD1.
87 PG2 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TIM8_BKIN, TIM8_BKIN_COMP12, FMC_A12 and TIM24_ETR.
88 PG3 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TIM8_BKIN2, TIM8_BKIN2_COMP12, FMC_A13 and TIM23_ETR.
89 PG4 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TIM1_BKIN2, TIM1_BKIN2_COMP12 and FMC_A14/FMC_BA0.
90 PG5 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TIM1_ETR and FMC_A15/FMC_BA1.
91 PG6 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TIM17_BKIN, OCTOSPIM_P1_NCS, FMC_NE3 and LCD_R7.
92 PG7 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including SAI1_MCLK_A, USART6_CK, OCTOSPIM_P2_DQS and FMC_INT.
93 PG8 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TIM8_ETR, SPI6_NSS/I2S6_WS, USART6_RTS/USART6_DE and ETH_PPS_OUT.
94 VSS power_in Ground pin; variation between all ground pins must not exceed 50 mV (Table 9).
95 VDD33USB power_in USB domain supply; 3.0 V to 3.6 V when USB is used, and 0 V to 3.6 V when USB is not used (Table 12).
96 PC6 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, I2S2_MCK and USART6_TX.
97 PC7 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including DBTRGIO, TIM3_CH2, TIM8_CH2, I2S3_MCK and USART6_RX.
98 PC8 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TRACED1, TIM3_CH3, TIM8_CH3 and USART6_CK.
99 PC9 bidirectional 5 V tolerant FT_fh I/O (I2C FM+ and high-speed low-voltage options) with alternate functions including MCO2, TIM3_CH4, TIM8_CH4 and I2C3_SDA(boot).
100 PA8 bidirectional 5 V tolerant FT_fh I/O (I2C FM+ and high-speed low-voltage options) with alternate functions including MCO1, TIM1_CH1, TIM8_BKIN2, I2C3_SCL(boot) and USART1_CK.
101 PA9 bidirectional 5 V tolerant FT_u I/O (USB option supplied by VDD33USB) with alternate functions including TIM1_CH2, LPUART1_TX, I2C3_SMBA and USART1_TX(boot), plus OTG_HS_VBUS.
102 PA10 bidirectional 5 V tolerant FT_u I/O (USB option supplied by VDD33USB) with alternate functions including TIM1_CH3, LPUART1_RX, USART1_RX(boot) and OTG_HS_ID.
103 PA11 bidirectional 5 V tolerant FT_u I/O (USB option supplied by VDD33USB) with alternate functions including TIM1_CH4, LPUART1_CTS, SPI2_NSS/I2S2_WS and UART4_RX, plus OTG_HS_DM (boot).
104 PA12 bidirectional 5 V tolerant FT_u I/O (USB option supplied by VDD33USB) with alternate functions including TIM1_ETR, LPUART1_RTS/LPUART1_DE, SPI2_SCK/I2S2_CK and UART4_TX, plus OTG_HS_DP (boot).
105 PA13 bidirectional 5 V tolerant FT I/O whose alternate function is the JTMS/SWDIO debug interface.
106 VCAP power_in Core regulator capacitor pin; connect a 2.2 µF external capacitor CEXT with ESR below 100 mΩ (Table 14); two VCAP pins are used on this package.
107 VSS power_in Ground pin; variation between all ground pins must not exceed 50 mV (Table 9).
108 VDD power_in Main I/O and core supply pin; standard operating voltage is 1.62 V to 3.6 V (Table 12).
109 PA14 bidirectional 5 V tolerant FT I/O whose alternate function is the JTCK/SWCLK debug interface.
110 PA15 bidirectional 5 V tolerant FT I/O with alternate functions including JTDI, TIM2_CH1/TIM2_ETR, CEC, SPI1_NSS/I2S1_WS and SPI3_NSS/I2S3_WS.
111 PC10 bidirectional 5 V tolerant FT_fh I/O (I2C FM+ and high-speed low-voltage options) with alternate functions including DFSDM1_CKIN5, I2C5_SDA, SPI3_SCK(boot)/I2S3_CK and USART3_TX.
112 PC11 bidirectional 5 V tolerant FT_fh I/O (I2C FM+ and high-speed low-voltage options) with alternate functions including DFSDM1_DATIN5, I2C5_SCL, SPI3_MISO(boot)/I2S3_SDI and USART3_RX.
113 PC12 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TRACED3, FMC_D6/FMC_AD6, TIM15_CH1 and I2C5_SMBA.
114 PD0 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including DFSDM1_CKIN6, UART4_RX, FDCAN1_RX(boot) and FMC_D2/FMC_AD2.
115 PD1 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including DFSDM1_DATIN6, UART4_TX, FDCAN1_TX(boot) and FMC_D3/FMC_AD3.
116 PD2 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TRACED2, FMC_D7/FMC_AD7, TIM3_ETR, TIM15_BKIN and UART5_RX.
117 PD3 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including DFSDM1_CKOUT, SPI2_SCK/I2S2_CK, USART2_CTS/USART2_NSS and FMC_CLK.
118 PD4 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including USART2_RTS/USART2_DE, OCTOSPIM_P1_IO4 and FMC_NOE.
119 PD5 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including USART2_TX, OCTOSPIM_P1_IO5 and FMC_NWE.
120 VSS power_in Ground pin; variation between all ground pins must not exceed 50 mV (Table 9).
121 VDD power_in Main I/O and core supply pin; standard operating voltage is 1.62 V to 3.6 V (Table 12).
122 PD6 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including SAI4_D1, SAI1_D1, SPI3_MOSI/I2S3_SDO, USART2_RX and FMC_NWAIT.
123 PD7 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including DFSDM1_DATIN4, SPI1_MOSI/I2S1_SDO, USART2_CK, SDMMC2_CMD and FMC_NE1.
124 PG9 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including FDCAN3_TX, SPI1_MISO/I2S1_SDI, USART6_RX and FMC_NE2/FMC_NCE.
125 PG10 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including FDCAN3_RX, OCTOSPIM_P2_IO6, SPI1_NSS/I2S1_WS and FMC_NE3.
126 PG11 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including LPTIM1_IN2, USART10_RX, SPI1_SCK/I2S1_CK and ETH_MII_TX_EN/ETH_RMII_TX_EN.
127 PG12 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including LPTIM1_IN1, OCTOSPIM_P2_NCS, USART10_TX, SPI6_MISO/I2S6_SDI and FMC_NE4.
128 PG13 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TRACED0, LPTIM1_OUT, USART10_CTS/USART10_NSS and FMC_A24.
129 PG14 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TRACED1, LPTIM1_ETR, USART10_RTS/USART10_DE and FMC_A25.
130 VSS power_in Ground pin; variation between all ground pins must not exceed 50 mV (Table 9).
131 VDD power_in Main I/O and core supply pin; standard operating voltage is 1.62 V to 3.6 V (Table 12).
132 PG15 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including USART6_CTS/USART6_NSS, OCTOSPIM_P2_DQS, USART10_CK and FMC_NCAS.
133 PB3 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including JTDO/TRACESWO, TIM2_CH2, SPI1_SCK/I2S1_CK and SPI3_SCK/I2S3_CK.
134 PB4 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including NJTRST, TIM16_BKIN, TIM3_CH1 and SPI1_MISO/I2S1_SDI.
135 PB5 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including TIM17_BKIN, TIM3_CH2, LCD_B5, I2C1_SMBA and FDCAN2_RX.
136 PB6 bidirectional 5 V tolerant FT_fh I/O (I2C FM+ and high-speed low-voltage options) with alternate functions including TIM16_CH1N, TIM4_CH1, I2C1_SCL(boot), CEC and USART1_TX.
137 PB7 bidirectional 5 V tolerant FT_fa I/O (analog option supplied by VDDA) with alternate functions including TIM17_CH1N, TIM4_CH2, I2C1_SDA and USART1_RX, plus PVD_IN.
138 BOOT0 input Dedicated BOOT0 pin with input range 0 V to 9 V (Table 12); it also carries the VPP function.
139 PB8 bidirectional 5 V tolerant FT_fh I/O (I2C FM+ and high-speed low-voltage options) with alternate functions including TIM16_CH1, TIM4_CH3, I2C1_SCL, FDCAN1_RX and SDMMC1_D4.
140 PB9 bidirectional 5 V tolerant FT_fh I/O (I2C FM+ and high-speed low-voltage options) with alternate functions including TIM17_CH1, TIM4_CH4, I2C1_SDA(boot), SPI2_NSS/I2S2_WS and FDCAN1_TX.
141 PE0 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including LPTIM1_ETR, TIM4_ETR, LPTIM2_ETR, UART8_RX and FMC_NBL0.
142 PE1 bidirectional 5 V tolerant FT_h I/O (high-speed low-voltage option) with alternate functions including LPTIM1_IN2, UART8_TX and FMC_NBL1.
143 PDR_ON power_in Pin that controls the power-down reset: PDR can only be switched OFF through this pin, which is not available in all packages (Table 12, note 1).
144 VDD power_in Main I/O and core supply pin; standard operating voltage is 1.62 V to 3.6 V (Table 12).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-144(20x20)
Category Embedded Processors & Controllers
Pins 144

CAD (KiCad official)

  • Symbol: STM32H733ZGT6
  • Footprint: Package_QFP:LQFP-144_20x20mm_P0.5mm
  • 3D model: LQFP-144(20x20) (KiCad packages3D, STEP)
  • 3D model files: stm32h733zgt6-etched.step / stm32h733zgt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32h733zgt6.step / stm32h733zgt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (227 pp, sha256 d66f7f0712ed11b4, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF