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STM32H725VET6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32H725VET6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)
STM32H725VET6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | 5 V-tolerant (FT_h) I/O; alternate functions include TRACECLK, SAI1_CK1, USART10_RX, SPI4_SCK and FMC_A23. |
| 2 | PE4 | bidirectional | 5 V-tolerant (FT_h) I/O; alternate functions include TRACED1, SAI1_D2, SPI4_NSS, FMC_A20 and DCMI_D4/PSSI_D4. |
| 3 | PE5 | bidirectional | 5 V-tolerant (FT_h) I/O; alternate functions include TRACED2, SAI1_CK2, SPI4_MISO, FMC_A21 and DCMI_D6/PSSI_D6. |
| 4 | VDD | power_in | Standard digital supply; VDD operating range is 1.62 V to 3.6 V (Table 13). |
| 5 | VBAT | power_in | Backup-domain supply for the RTC and the 32x32-bit backup registers. |
| 6 | PC13 | bidirectional | 5 V-tolerant (FT) I/O; additional functions RTC_TAMP1/RTC_TS and WKUP4. |
| 7 | PC14-OSC32_IN | bidirectional | 5 V-tolerant (FT) I/O; OSC32_IN input for the 32.768 kHz LSE crystal. |
| 8 | PC15-OSC32_OUT | bidirectional | 5 V-tolerant (FT) I/O; OSC32_OUT output for the 32.768 kHz LSE crystal. |
| 9 | VSSSMPS | power_in | Ground of the internal SMPS step-down converter. |
| 10 | VLXSMPS | power_out | Switching node of the internal SMPS step-down converter. |
| 11 | VDDSMPS | power_in | Supply of the internal SMPS step-down converter; VDDSMPS = VDD, 1.62 V to 3.6 V (Table 13). |
| 12 | VFBSMPS | power_in | Feedback input of the internal SMPS step-down converter. |
| 13 | PH0-OSC_IN | bidirectional | 5 V-tolerant (FT) I/O; OSC_IN input for the 4-50 MHz HSE oscillator. |
| 14 | PH1-OSC_OUT | bidirectional | 5 V-tolerant (FT) I/O; OSC_OUT output for the 4-50 MHz HSE oscillator. |
| 15 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor. |
| 16 | PC0 | bidirectional | 5 V-tolerant (FT_ha) I/O with analog option supplied by VDDA; ADC123_INP10 input; alternate functions include FMC_D12/FMC_AD12 and OTG_HS_ULPI_STP. |
| 17 | PC1 | bidirectional | 5 V-tolerant (FT_ha) I/O with analog option; ADC123_INN10/ADC123_INP11, RTC_TAMP3 and WKUP6; alternate functions include SPI2_MOSI/I2S2_SDO and ETH_MDC. |
| 18 | PC2_C | passive | 3.3 V-tolerant analog-capable pin (TT_a, analog option supplied by VDDA); ADC3_INN1 and ADC3_INP0 inputs. |
| 19 | PC3_C | passive | 3.3 V-tolerant analog-capable pin (TT_a, analog option supplied by VDDA); ADC3_INP1 input. |
| 20 | VDD | power_in | Standard digital supply; 1.62 V to 3.6 V (Table 13). |
| 21 | VSS | power_in | Ground. |
| 22 | VSSA | power_in | Analog ground. |
| 23 | VREF+ | power_in | Positive reference voltage pin for the analog peripherals. |
| 24 | VDDA | power_in | Analog supply; 1.62 V to 3.6 V when the ADC or COMP is used (Table 13). |
| 25 | PA0 | bidirectional | 5 V-tolerant (FT_ha) I/O with analog option; ADC1_INP16 and WKUP1; alternate functions include TIM2_CH1/TIM2_ETR, USART2_CTS and SDMMC2_CMD. |
| 26 | PA1 | bidirectional | 5 V-tolerant (FT_ha) I/O with analog option; ADC1_INN16/ADC1_INP17; alternate functions include TIM2_CH2, USART2_RTS/USART2_DE and ETH_MII_RX_CLK. |
| 27 | PA2 | bidirectional | 5 V-tolerant (FT_ha) I/O with analog option; ADC12_INP14 and WKUP2; alternate functions include TIM2_CH3, USART2_TX(boot) and ETH_MDIO. |
| 28 | PA3 | bidirectional | 5 V-tolerant (FT_ha) I/O with analog option; ADC12_INP15; alternate functions include TIM2_CH4, USART2_RX(boot) and OTG_HS_ULPI_D0. |
| 29 | VSS | power_in | Ground. |
| 30 | VDD | power_in | Standard digital supply; 1.62 V to 3.6 V (Table 13). |
| 31 | PA4 | bidirectional | 3.3 V-tolerant (TT_ha) I/O with analog option; ADC12_INP18 and DAC1_OUT1; alternate functions include SPI1_NSS(boot), USART2_CK and FMC_D8/FMC_AD8. |
| 32 | PA5 | bidirectional | 3.3 V-tolerant (TT_ha) I/O with analog option; ADC12_INN18/ADC12_INP19 and DAC1_OUT2; alternate functions include SPI1_SCK(boot), TIM2_CH1/TIM2_ETR and OTG_HS_ULPI_CK. |
| 33 | PA6 | bidirectional | 5 V-tolerant (FT_ha) I/O with analog option; ADC12_INP3; alternate functions include TIM1_BKIN, TIM3_CH1, SPI1_MISO(boot) and DCMI_PIXCLK/PSSI_PDCK. |
| 34 | PA7 | bidirectional | 3.3 V-tolerant (TT_ha) I/O with analog option; ADC12_INN3, ADC12_INP7 and OPAMP1_VINM; alternate functions include TIM1_CH1N, SPI1_MOSI(boot) and ETH_MII_RX_DV. |
| 35 | PC4 | bidirectional | 3.3 V-tolerant (TT_ha) I/O with analog option; ADC12_INP4, OPAMP1_VOUT and COMP1_INM; alternate functions include FMC_A22, I2S1_MCK and ETH_MII_RXD0. |
| 36 | PC5 | bidirectional | 3.3 V-tolerant (TT_ha) I/O with analog option; ADC12_INN4, ADC12_INP8 and OPAMP1_VINM; alternate functions include SAI1_D3, COMP1_OUT and ETH_MII_RXD1. |
| 37 | PB0 | bidirectional | 3.3 V-tolerant (TT_ha) I/O with analog option; ADC12_INN5, ADC12_INP9, OPAMP1_VINP and COMP1_INP; alternate functions include TIM1_CH2N, OCTOSPIM_P1_IO1 and ETH_MII_RXD2. |
| 38 | PB1 | bidirectional | 5 V-tolerant (FT_ha) I/O with analog option; ADC12_INP5 and COMP1_INM; alternate functions include TIM1_CH3N, OCTOSPIM_P1_IO0 and ETH_MII_RXD3. |
| 39 | PB2 | bidirectional | 5 V-tolerant (FT_ha) I/O with analog option; COMP1_INP; alternate functions include RTC_OUT, SAI1_D1 and ETH_TX_ER. |
| 40 | PE7 | bidirectional | 3.3 V-tolerant (TT_ha) I/O with analog option; OPAMP2_VOUT and COMP2_INM; alternate functions include TIM1_ETR, DFSDM1_DATIN2 and FMC_D4/FMC_AD4. |
| 41 | PE8 | bidirectional | 3.3 V-tolerant (TT_ha) I/O with analog option; OPAMP2_VINM; alternate functions include TIM1_CH1N, COMP2_OUT and FMC_D5/FMC_AD5. |
| 42 | PB10 | bidirectional | 5 V-tolerant (FT_fh) I/O with FM+ and high-speed low-voltage options; alternate functions include TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK and OTG_HS_ULPI_D3. |
| 43 | PB11 | bidirectional | 5 V-tolerant (FT_f) I/O with FM+ option; alternate functions include TIM2_CH4, I2C2_SDA and ETH_MII_TX_EN/ETH_RMII_TX_EN. |
| 44 | VCAP | power_in | Connection for the external capacitor of the core-supply regulator (see Table 15, VCAP operating conditions). |
| 45 | VSS | power_in | Ground. |
| 46 | VDDLDO | power_in | Supply voltage for the internal LDO regulator; VDDLDO ≤ VDD, 1.62 V to 3.6 V (Table 13). |
| 47 | VDD | power_in | Standard digital supply; 1.62 V to 3.6 V (Table 13). |
| 48 | PB12 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include TIM1_BKIN, SPI2_NSS/I2S2_WS, USART3_CK and FDCAN2_RX. |
| 49 | PB13 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include TIM1_CH1N, SPI2_SCK/I2S2_CK, USART3_CTS/USART3_NSS and FDCAN2_TX. |
| 50 | PB14 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include TIM1_CH2N, USART1_TX, SPI2_MISO/I2S2_SDI and SDMMC2_D0. |
| 51 | PB15 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; RTC_REFIN; alternate functions include TIM1_CH3N, USART1_RX, SPI2_MOSI/I2S2_SDO and SDMMC2_D1. |
| 52 | PD8 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include DFSDM1_CKIN3, USART3_TX(boot) and FMC_D13/FMC_AD13. |
| 53 | PD9 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include DFSDM1_DATIN3, USART3_RX(boot) and FMC_D14/FMC_AD14. |
| 54 | PD10 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include DFSDM1_CKOUT, USART3_CK, FMC_D15/FMC_AD15 and LCD_B3. |
| 55 | PD11 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include LPTIM2_IN2, I2C4_SMBA, USART3_CTS/USART3_NSS and FMC_A16/FMC_CLE. |
| 56 | PD12 | bidirectional | 5 V-tolerant (FT_fh) I/O with FM+ and high-speed low-voltage options; alternate functions include LPTIM1_IN1, TIM4_CH1, I2C4_SCL and FMC_A17/FMC_ALE. |
| 57 | PD13 | bidirectional | 5 V-tolerant (FT_fh) I/O with FM+ and high-speed low-voltage options; alternate functions include LPTIM1_OUT, TIM4_CH2, I2C4_SDA and FMC_A18. |
| 58 | VSS | power_in | Ground. |
| 59 | VDD | power_in | Standard digital supply; 1.62 V to 3.6 V (Table 13). |
| 60 | PD14 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include TIM4_CH3, UART8_CTS, UART9_RX and FMC_D0/FMC_AD0. |
| 61 | PD15 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include TIM4_CH4, UART8_RTS/UART8_DE, UART9_TX and FMC_D1/FMC_AD1. |
| 62 | PC6 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include TIM3_CH1, TIM8_CH1, I2S2_MCK, USART6_TX and DCMI_D0/PSSI_D0. |
| 63 | PC7 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX and FMC_NE1. |
| 64 | PC8 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include TRACED1, TIM3_CH3, TIM8_CH3, USART6_CK and FMC_NE2/FMC_NCE. |
| 65 | PC9 | bidirectional | 5 V-tolerant (FT_fh) I/O with FM+ and high-speed low-voltage options; alternate functions include MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA(boot) and I2C5_SDA. |
| 66 | PA8 | bidirectional | 5 V-tolerant (FT_fh) I/O with FM+ and high-speed low-voltage options; alternate functions include MCO1, TIM1_CH1, TIM8_BKIN2, I2C3_SCL(boot), USART1_CK and OTG_HS_SOF. |
| 67 | PA9 | bidirectional | 5 V-tolerant (FT_u) I/O with USB option (supplied by VDD33USB); alternate functions include TIM1_CH2, LPUART1_TX, SPI2_SCK/I2S2_CK and USART1_TX(boot); additional function OTG_HS_VBUS. |
| 68 | PA10 | bidirectional | 5 V-tolerant (FT_u) I/O with USB option (supplied by VDD33USB); alternate functions include TIM1_CH3, LPUART1_RX, USART1_RX(boot) and MDIOS_MDIO; additional function OTG_HS_ID. |
| 69 | PA11 | bidirectional | 5 V-tolerant (FT_u) I/O with USB option (supplied by VDD33USB); alternate functions include TIM1_CH4, LPUART1_CTS, SPI2_NSS/I2S2_WS, UART4_RX and FDCAN1_RX; additional function OTG_HS_DM(boot). |
| 70 | PA12 | bidirectional | 5 V-tolerant (FT_u) I/O with USB option (supplied by VDD33USB); alternate functions include TIM1_ETR, LPUART1_RTS/LPUART1_DE, UART4_TX and FDCAN1_TX; additional function OTG_HS_DP(boot). |
| 71 | PA13(JTMS/SWDIO) | bidirectional | 5 V-tolerant (FT) I/O; JTMS/SWDIO serial-wire debug data pin. |
| 72 | VCAP | power_in | Connection for the external capacitor of the core-supply regulator (see Table 15, VCAP operating conditions). |
| 73 | VSS | power_in | Ground. |
| 74 | VDDLDO | power_in | Supply voltage for the internal LDO regulator; VDDLDO ≤ VDD, 1.62 V to 3.6 V (Table 13). |
| 75 | VDD | power_in | Standard digital supply; 1.62 V to 3.6 V (Table 13). |
| 76 | VDD33USB | power_in | Supply of the USB domain; 3.0 V to 3.6 V when USB is used, 0 to 3.6 V when USB is not used (Table 13). |
| 77 | PA14(JTCK/SWCLK) | bidirectional | 5 V-tolerant (FT) I/O; JTCK/SWCLK serial-wire debug clock pin. |
| 78 | PA15(JTDI) | bidirectional | 5 V-tolerant (FT) I/O; JTDI debug data input; alternate functions include TIM2_CH1/TIM2_ETR, SPI1_NSS/I2S1_WS and UART4_RTS/UART4_DE. |
| 79 | PC10 | bidirectional | 5 V-tolerant (FT_fh) I/O with FM+ and high-speed low-voltage options; alternate functions include DFSDM1_CKIN5, I2C5_SDA, SPI3_SCK/I2S3_CK, USART3_TX and UART4_TX. |
| 80 | PC11 | bidirectional | 5 V-tolerant (FT_fh) I/O with FM+ and high-speed low-voltage options; alternate functions include DFSDM1_DATIN5, I2C5_SCL, SPI3_MISO(boot)/I2S3_SDI, USART3_RX and UART4_RX. |
| 81 | PC12 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include TRACED3, FMC_D6/FMC_AD6, TIM15_CH1, UART5_TX and SDMMC1_CK. |
| 82 | PD0 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include DFSDM1_CKIN6, UART4_RX, FDCAN1_RX(boot) and FMC_D2/FMC_AD2. |
| 83 | PD1 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include DFSDM1_DATIN6, UART4_TX, FDCAN1_TX(boot) and FMC_D3/FMC_AD3. |
| 84 | PD2 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include TRACED2, FMC_D7/FMC_AD7, TIM3_ETR, TIM15_BKIN, UART5_RX and SDMMC1_CMD. |
| 85 | PD3 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include DFSDM1_CKOUT, SPI2_SCK/I2S2_CK, USART2_CTS/USART2_NSS and FMC_CLK. |
| 86 | PD4 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include USART2_RTS/USART2_DE, OCTOSPIM_P1_IO4 and FMC_NOE. |
| 87 | PD5 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include USART2_TX, OCTOSPIM_P1_IO5 and FMC_NWE. |
| 88 | VDD | power_in | Standard digital supply; 1.62 V to 3.6 V (Table 13). |
| 89 | PB3(JTDO/TRACESWO) | bidirectional | 5 V-tolerant (FT_h) I/O; JTDO/TRACESWO trace/debug output; alternate functions include TIM2_CH2, SPI1_SCK/I2S1_CK and SPI3_SCK/I2S3_CK. |
| 90 | PB4(NJTRST) | bidirectional | 5 V-tolerant (FT_h) I/O; NJTRST JTAG reset pin; alternate functions include TIM16_BKIN, TIM3_CH1, SPI1_MISO/I2S1_SDI and SPI3_MISO/I2S3_SDI. |
| 91 | PB5 | bidirectional | 5 V-tolerant (FT_h) I/O with high-speed low-voltage option; alternate functions include TIM17_BKIN, TIM3_CH2, I2C1_SMBA, SPI1_MOSI/I2S1_SDO and FDCAN2_RX. |
| 92 | PB6 | bidirectional | 5 V-tolerant (FT_fh) I/O with FM+ and high-speed low-voltage options; alternate functions include TIM16_CH1N, TIM4_CH1, I2C1_SCL(boot), CEC and USART1_TX. |
| 93 | PB7 | bidirectional | 5 V-tolerant (FT_fa) I/O with FM+ and analog options; additional function PVD_IN; alternate functions include TIM17_CH1N, TIM4_CH2, I2C1_SDA and USART1_RX. |
| 94 | BOOT0 | input | Dedicated BOOT0 pin; input voltage range 0 V to 9 V (Table 13); additional function VPP. |
| 95 | PB8 | bidirectional | 5 V-tolerant (FT_fh) I/O with FM+ and high-speed low-voltage options; alternate functions include TIM16_CH1, TIM4_CH3, I2C1_SCL, FDCAN1_RX and SDMMC1_D4. |
| 96 | PB9 | bidirectional | 5 V-tolerant (FT_fh) I/O with FM+ and high-speed low-voltage options; alternate functions include TIM17_CH1, TIM4_CH4, I2C1_SDA(boot), SPI2_NSS/I2S2_WS and FDCAN1_TX. |
| 97 | VCAP | power_in | Connection for the external capacitor of the core-supply regulator (see Table 15, VCAP operating conditions). |
| 98 | VSS | power_in | Ground. |
| 99 | VDDLDO | power_in | Supply voltage for the internal LDO regulator; VDDLDO ≤ VDD, 1.62 V to 3.6 V (Table 13). |
| 100 | VDD | power_in | Standard digital supply; 1.62 V to 3.6 V (Table 13). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-100(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |
CAD (KiCad official)
- Symbol:
STM32H725VET6 - Footprint:
Package_QFP:LQFP-100_14x14mm_P0.5mm - 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files:
stm32h725vet6-etched.step/stm32h725vet6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32h725vet6.step/stm32h725vet6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (273 pp, sha256
e2d4e6686c530a98, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).