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STM32H725IGK6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFBGA-201. Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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STM32H725IGK6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFBGA-201

STM32H725IGK6 from STMicroelectronics, in a UFBGA-201. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
A1 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
A2 PB8 bidirectional 5 V-tolerant I/O with FM+ option and high-speed low-voltage option (FT_fh); alternate functions include TIM16_CH1, I2C1_SCL, SDMMC1_CKIN, FDCAN1_RX, SDMMC2_D4 and DCMI_D6/PSSI_D6.
A3 VDDLDO power_in Supply for the internal LDO regulator; VDDLDO must not exceed VDD, with a range of 1.62 V to 3.6 V.
A4 VCAP power_in Connection for the external VCORE decoupling capacitor (CEXT) of the internal regulator.
A5 PB6 bidirectional 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM16_CH1N, TIM4_CH1, I2C1_SCL (boot), USART1_TX, FDCAN2_TX and FMC_SDNE1.
A6 PB3 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); default function JTDO/TRACESWO, with alternate functions TIM2_CH2, SPI1_SCK/I2S1_CK, SDMMC2_D2 and UART7_RX.
A7 PG11 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM1_IN2, USART10_RX, SPI1_SCK/I2S1_CK, SPDIFRX1_IN1, SDMMC2_D2 and DCMI_D3/PSSI_D3.
A8 PG9 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include FDCAN3_TX, SPI1_MISO/I2S1_SDI, USART6_RX, SDMMC2_D0, FMC_NE2/FMC_NCE and DCMI_VSYNC/PSSI_RDY.
A9 PD3 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_CKOUT, SPI2_SCK/I2S2_CK, USART2_CTS/USART2_NSS, FMC_CLK and DCMI_D5/PSSI_D5.
A10 PD1 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_DATIN6, UART4_TX, FDCAN1_TX (boot) and FMC_D3/FMC_AD3.
A11 PA15 bidirectional 5 V-tolerant I/O (FT); default function JTDI, with alternate functions including TIM2_CH1/TIM2_ETR, CEC, SPI1_NSS/I2S1_WS, UART4_RTS/UART4_DE and LCD_R3.
A12 PA14 bidirectional 5 V-tolerant I/O (FT); default function JTCK/SWCLK debug pin.
A13 VDDLDO power_in Supply for the internal LDO regulator; VDDLDO must not exceed VDD, with a range of 1.62 V to 3.6 V.
A14 VCAP power_in Connection for the external VCORE decoupling capacitor (CEXT) of the internal regulator.
A15 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
B1 PE4 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED1, SAI1_D2, DFSDM1_DATIN3, SPI4_NSS, FMC_A20 and DCMI_D4/PSSI_D4.
B2 PE3 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED0, TIM15_BKIN, SAI1_SD_B, USART10_TX and FMC_A19.
B3 PB9 bidirectional 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM17_CH1, I2C1_SDA (boot), SPI2_NSS/I2S2_WS, UART4_TX, FDCAN1_TX and DCMI_D7/PSSI_D7.
B4 PE0 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM1_ETR, TIM4_ETR, UART8_RX, SAI4_MCLK_A, FMC_NBL0 and DCMI_D2/PSSI_D2.
B5 PB7 bidirectional 5 V-tolerant I/O with FM+ and analog options (FT_fa); alternate functions include TIM17_CH1N, TIM4_CH2, I2C1_SDA, USART1_RX, FMC_NL; additional function PVD_IN.
B6 PB4 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); default function NJTRST, with alternate functions TIM16_BKIN, TIM3_CH1, SPI1_MISO/I2S1_SDI, SPI2_NSS/I2S2_WS and UART7_TX.
B7 PG13 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED0, LPTIM1_OUT, USART10_CTS/USART10_NSS, SPI6_SCK/I2S6_CK, USART6_CTS, ETH_MII_TXD0 and FMC_A24.
B8 PD7 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_DATIN4, SPI1_MOSI/I2S1_SDO, USART2_CK, OCTOSPIM_P1_IO7, SDMMC2_CMD and FMC_NE1.
B9 PD5 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include USART2_TX, OCTOSPIM_P1_IO5 and FMC_NWE.
B10 PD2 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED2, FMC_D7/FMC_AD7, TIM3_ETR, TIM15_BKIN, UART5_RX, SDMMC1_CMD and DCMI_D11/PSSI_D11.
B11 PC12 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED3, FMC_D6/FMC_AD6, TIM15_CH1, SPI6_SCK/I2S6_CK, USART3_CK, UART5_TX, SDMMC1_CK and DCMI_D9/PSSI_D9.
B12 PH14 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_CH2N, UART4_RX, FDCAN1_RX (boot), FMC_D22, DCMI_D4/PSSI_D4 and LCD_G3.
B13 PA13 bidirectional 5 V-tolerant I/O (FT); default function JTMS/SWDIO debug pin.
B14 PA8 bidirectional 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include MCO1, TIM1_CH1, TIM8_BKIN2, I2C3_SCL (boot), USART1_CK, OTG_HS_SOF and UART7_RX.
B15 PA12 bidirectional USB-option 5 V-tolerant I/O (FT_u, supplied by VDD33USB); alternate functions include TIM1_ETR, LPUART1_RTS/LPUART1_DE, SPI2_SCK/I2S2_CK, UART4_TX, USART1_RTS/USART1_DE, SAI4_FS_B and FDCAN1_TX; additional function OTG_HS_DP (boot).
C1 PC13 bidirectional 5 V-tolerant I/O (FT) with additional functions RTC_TAMP1/RTC_TS and WKUP4 and EVENTOUT.
C2 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
C3 PE2 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACECLK, SAI1_CK1, USART10_RX, SPI4_SCK, OCTOSPIM_P1_IO2 and FMC_A23.
C4 PE1 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM1_IN2, UART8_TX, FMC_NBL1, DCMI_D3/PSSI_D3 and LCD_R6.
C5 BOOT0 input Dedicated BOOT0 pin used to select the boot mode; its input voltage range is 0 to 9 V (Table 13), with a maximum of 9.0 V (Table 10).
C6 PB5 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM17_BKIN, TIM3_CH2, LCD_B5, I2C1_SMBA, SPI1_MOSI/I2S1_SDO, FDCAN2_RX, FMC_SDCKE1 and UART5_RX.
C7 PG14 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED1, LPTIM1_ETR, USART10_RTS/USART10_DE, SPI6_MOSI/I2S6_SDO, USART6_TX, FMC_A25 and TIM23_CH3.
C8 PG10 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include FDCAN3_RX, OCTOSPIM_P2_IO6, SPI1_NSS/I2S1_WS, LCD_G3, SAI4_SD_B, SDMMC2_D1, FMC_NE3 and DCMI_D2/PSSI_D2.
C9 PD4 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include USART2_RTS/USART2_DE, OCTOSPIM_P1_IO4 and FMC_NOE.
C10 PD0 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_CKIN6, UART4_RX, FDCAN1_RX (boot), UART9_CTS, FMC_D2/FMC_AD2 and LCD_B1.
C11 PC11 bidirectional 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include DFSDM1_DATIN5, I2C5_SCL, SPI3_MISO (boot)/I2S3_SDI, USART3_RX, UART4_RX, OCTOSPIM_P1_NCS, SDMMC1_D3 and DCMI_D4/PSSI_D4.
C12 PC10 bidirectional 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include DFSDM1_CKIN5, I2C5_SDA, SPI3_SCK (boot)/I2S3_CK, USART3_TX, UART4_TX, OCTOSPIM_P1_IO1, SDMMC1_D2 and DCMI_D8/PSSI_D8.
C13 PH13 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_CH1N, UART4_TX, FDCAN1_TX (boot), FMC_D21 and LCD_G2.
C14 PA10 bidirectional USB-option 5 V-tolerant I/O (FT_u, supplied by VDD33USB); alternate functions include TIM1_CH3, LPUART1_RX, USART1_RX (boot), OTG_HS_ID, MDIOS_MDIO, LCD_B4 and DCMI_D1/PSSI_D1.
C15 PA11 bidirectional USB-option 5 V-tolerant I/O (FT_u, supplied by VDD33USB); alternate functions include TIM1_CH4, LPUART1_CTS, SPI2_NSS/I2S2_WS, UART4_RX, USART1_CTS/USART1_NSS and FDCAN1_RX; additional function OTG_HS_DM (boot).
D1 PC15-OSC32_OUT bidirectional 5 V-tolerant I/O (FT) whose additional function OSC32_OUT is the output of the 32.768 kHz LSE oscillator.
D2 PC14-OSC32_IN bidirectional 5 V-tolerant I/O (FT) whose additional function OSC32_IN is the input of the 32.768 kHz LSE oscillator.
D3 PE5 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED2, SAI1_CK2, DFSDM1_CKIN3, TIM15_CH1, SPI4_MISO, FMC_A21 and DCMI_D6/PSSI_D6.
D4 PDR_ON power_in Controls the power-down reset (PDR): the PDR can only be switched OFF through this pin, which is not available in all packages; listed as a supply (S) in Table 8.
D5 VDD power_in Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV.
D6 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
D7 PG15 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include USART6_CTS/USART6_NSS, OCTOSPIM_P2_DQS, USART10_CK, FMC_NCAS and DCMI_D13/PSSI_D13.
D8 PG12 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM1_IN1, OCTOSPIM_P2_NCS, USART10_TX, SPI6_MISO/I2S6_SDI, SDMMC2_D3, FMC_NE4 and TIM23_CH1.
D9 PD6 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include SAI4_D1, SAI1_D1, DFSDM1_CKIN4, SPI3_MOSI/I2S3_SDO, USART2_RX, OCTOSPIM_P1_IO6, SDMMC2_CK, FMC_NWAIT and DCMI_D10/PSSI_D10.
D10 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
D11 VDD power_in Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV.
D12 PH15 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_CH3N, FMC_D23, DCMI_D11/PSSI_D11 and LCD_G4.
D13 PA9 bidirectional USB-option 5 V-tolerant I/O (FT_u, supplied by VDD33USB); alternate functions include TIM1_CH2, LPUART1_TX, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX (boot), ETH_TX_ER and DCMI_D0/PSSI_D0; additional function OTG_HS_VBUS.
D14 PC8 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED1, TIM3_CH3, TIM8_CH3, USART6_CK, UART5_RTS/UART5_DE, FMC_NE2/FMC_NCE, FMC_INT, SWPMI_RX and SDMMC1_D0.
D15 PC7 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DBTRGIO, TIM3_CH2, TIM8_CH2, DFSDM1_DATIN3, I2S3_MCK, USART6_RX, FMC_NE1 and SWPMI_TX.
E1 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
E2 VBAT power_in Backup-domain supply for the RTC, 32 x 32-bit backup registers and backup SRAM; absolute maximum rating −0.3 V to 4.0 V (Table 10).
E3 PE6 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED3, TIM1_BKIN2, SAI1_D1, TIM15_CH2, SPI4_MOSI, FMC_A22 and DCMI_D7/PSSI_D7.
E4 VDD power_in Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV.
E12 VDD power_in Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV.
E13 PC9 bidirectional 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA (boot), I2C5_SDA, UART5_CTS, OCTOSPIM_P1_IO0, SWPMI_SUSPEND and SDMMC1_D1.
E14 PC6 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, I2S2_MCK, USART6_TX, SDMMC1_D0DIR, FMC_NWAIT, SDMMC2_D6 and DCMI_D0/PSSI_D0.
E15 VDD50USB power_in USB regulator supply input; 4 V to 5.5 V when the USB regulator is ON (Table 13).
F1 VLXSMPS power_in Switching node (LX) of the internal SMPS step-down converter; listed as a supply (S) in Table 8.
F2 VSSSMPS power_in Ground for the internal SMPS step-down converter.
F3 PF1 bidirectional 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include I2C2_SCL (boot), I2C5_SCL, OCTOSPIM_P2_IO1, FMC_A1 and TIM23_CH2.
F4 PF0 bidirectional 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include I2C2_SDA (boot), I2C5_SDA, OCTOSPIM_P2_IO0, FMC_A0 and TIM23_CH1.
F6 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
F7 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
F8 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
F9 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
F10 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
F12 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
F13 VDD33USB power_in USB domain supply; 3.0 V to 3.6 V when USB is used, and 0 to 3.6 V when USB is not used (Table 13).
F14 PG6 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM17_BKIN, OCTOSPIM_P1_NCS, FMC_NE3, DCMI_D12/PSSI_D12 and LCD_R7.
F15 PG5 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_ETR and FMC_A15/FMC_BA1.
G1 VDDSMPS power_in Supply for the internal SMPS step-down converter; VDDSMPS = VDD, with a range of 1.62 V to 3.6 V (Table 13).
G2 VFBSMPS power_in Feedback pin of the internal SMPS step-down converter; listed as a supply (S) in Table 8.
G3 PF2 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include I2C2_SMBA, I2C5_SMBA, OCTOSPIM_P2_IO2, FMC_A2 and TIM23_CH3.
G4 VDD power_in Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV.
G6 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
G7 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
G8 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
G9 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
G10 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
G12 PG8 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_ETR, SPI6_NSS/I2S6_WS, USART6_RTS/USART6_DE, SPDIFRX1_IN3, ETH_PPS_OUT, FMC_SDCLK and LCD_G7.
G13 PG7 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include SAI1_MCLK_A, USART6_CK, OCTOSPIM_P2_DQS, FMC_INT, DCMI_D13/PSSI_D13 and LCD_CLK.
G14 PG4 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_BKIN2, TIM1_BKIN2_COMP12 and FMC_A14/FMC_BA0.
G15 PG2 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_BKIN, TIM8_BKIN_COMP12, FMC_A12 and TIM24_ETR.
H1 PF6 bidirectional 5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM16_CH1, FDCAN3_RX, SPI5_NSS, SAI1_SD_B, UART7_RX and TIM23_CH1; analog inputs ADC3_INN4 and ADC3_INP8.
H2 PF4 bidirectional 5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P2_CLK and FMC_A4; analog inputs ADC3_INN5 and ADC3_INP9.
H3 PF5 bidirectional 5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P2_NCLK and FMC_A5; analog input ADC3_INP4.
H4 PF3 bidirectional 5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P2_IO3, FMC_A3 and TIM23_CH4; analog input ADC3_INP5.
H6 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
H7 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
H8 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
H9 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
H10 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
H12 VDD power_in Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV.
H13 PG3 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_BKIN2, TIM8_BKIN2_COMP12, FMC_A13 and TIM23_ETR.
H14 PD14 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM4_CH3, UART8_CTS, UART9_RX and FMC_D0/FMC_AD0.
H15 PD13 bidirectional 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include LPTIM1_OUT, TIM4_CH2, I2C4_SDA, FDCAN3_TX, OCTOSPIM_P1_IO3, FMC_A18 and DCMI_D13/PSSI_D13.
J1 PH0-OSC_IN bidirectional 5 V-tolerant I/O (FT) whose additional function OSC_IN is the input of the 4-50 MHz HSE oscillator.
J2 PF8 bidirectional 5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM16_CH1N, SPI5_MISO, SAI1_SCK_B, UART7_RTS/UART7_DE and TIM23_CH3; analog inputs ADC3_INN3 and ADC3_INP7.
J3 PF7 bidirectional 5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM17_CH1, FDCAN3_TX, SPI5_SCK, UART7_TX and TIM23_CH2; analog input ADC3_INP3.
J4 PF9 bidirectional 5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM17_CH1N, SPI5_MOSI, SAI1_FS_B, UART7_CTS and TIM23_CH4; analog input ADC3_INP2.
J6 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
J7 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
J8 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
J9 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
J10 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
J12 PD15 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM4_CH4, UART8_RTS/UART8_DE, UART9_TX and FMC_D1/FMC_AD1.
J13 PD11 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM2_IN2, I2C4_SMBA, USART3_CTS/USART3_NSS, OCTOSPIM_P1_IO0, SAI4_SD_A and FMC_A16/FMC_CLE.
J14 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
J15 PD12 bidirectional 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include LPTIM1_IN1, TIM4_CH1, LPTIM2_IN1, I2C4_SCL, FDCAN3_RX, USART3_RTS/USART3_DE, FMC_A17/FMC_ALE and DCMI_D12/PSSI_D12.
K1 PH1-OSC_OUT bidirectional 5 V-tolerant I/O (FT) whose additional function OSC_OUT is the output of the 4-50 MHz HSE oscillator.
K2 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
K3 PF10 bidirectional 5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM16_BKIN, SAI1_D3, PSSI_D15, OCTOSPIM_P1_CLK, DCMI_D11/PSSI_D11 and LCD_DE; analog inputs ADC3_INN2 and ADC3_INP6.
K4 VDD power_in Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV.
K6 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
K7 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
K8 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
K9 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
K10 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
K12 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
K13 PD9 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_DATIN3, USART3_RX (boot) and FMC_D14/FMC_AD14.
K14 PB15 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include RTC_REFIN, TIM1_CH3N, TIM12_CH2, TIM8_CH3N, USART1_RX, SPI2_MOSI/I2S2_SDO, SDMMC2_D1 and FMC_D11/FMC_AD11.
K15 PB14 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH2N, TIM12_CH1, USART1_TX, SPI2_MISO/I2S2_SDI, USART3_RTS/USART3_DE, SDMMC2_D0 and FMC_D10/FMC_AD10.
L1 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor (RST I/O structure).
L2 PC0 bidirectional 5 V-tolerant high-speed low-voltage I/O with analog option (FT_ha); alternate functions include FMC_D12/FMC_AD12, DFSDM1_CKIN0, OTG_HS_ULPI_STP, FMC_SDNWE and LCD_R5; analog input ADC123_INP10.
L3 PC1 bidirectional 5 V-tolerant high-speed low-voltage I/O with analog option (FT_ha); alternate functions include TRACED0, SAI1_D1, SPI2_MOSI/I2S2_SDO, ETH_MDC, MDIOS_MDC and LCD_G5; analog inputs ADC123_INN10 and ADC123_INP11, plus RTC_TAMP3 and WKUP6.
L4 VREF- power_in Negative reference voltage pin, connected to VSSA in the power supply scheme (Figure 14).
L12 VDD power_in Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV.
L13 PD10 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_CKOUT, USART3_CK, FMC_D15/FMC_AD15 and LCD_B3.
L14 PD8 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_CKIN3, USART3_TX (boot), SPDIFRX1_IN2 and FMC_D13/FMC_AD13.
L15 PB13 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH1N, LPTIM2_OUT, OCTOSPIM_P1_IO2, SPI2_SCK/I2S2_CK, USART3_CTS/USART3_NSS, FDCAN2_TX, SDMMC1_D0 and UART5_TX.
M1 PC2 bidirectional 5 V-tolerant I/O with analog option (FT_a); alternate functions include PWR_DEEPSLEEP, DFSDM1_CKIN1, OCTOSPIM_P1_IO5, SPI2_MISO/I2S2_SDI, OTG_HS_ULPI_DIR and FMC_SDNE0; analog inputs ADC123_INN11 and ADC123_INP12.
M2 PC3 bidirectional 5 V-tolerant I/O with analog option (FT_a); alternate functions include PWR_SLEEP, DFSDM1_DATIN1, OCTOSPIM_P1_IO6, SPI2_MOSI/I2S2_SDO, OTG_HS_ULPI_NXT and FMC_SDCKE0; analog inputs ADC12_INN12 and ADC12_INP13.
M3 VREF+ power_in Positive reference voltage pin; may be connected to VDDA or kept separate, as shown in the decoupling examples (Figures 48 and 49).
M4 VDDA power_in Analog supply: 1.62 V to 3.6 V when the ADC or COMP is used, 1.8 V minimum when the DAC or VREFBUF is used, and 2.0 V minimum when the OPAMP is used (Table 13).
M5 VDD power_in Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV.
M6 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
M7 PC5 bidirectional 5 V-tolerant I/O with analog option (FT_ha, TT_ha class); alternate functions include PWR_SLEEP, SAI4_D3, SAI1_D3, DFSDM1_DATIN2, PSSI_D15, SPDIFRX1_IN4, ETH_MII_RXD1 and COMP1_OUT; analog inputs ADC12_INN4, ADC12_INP8 and OPAMP1_VINM.
M8 PB1 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_ha); alternate functions include TIM1_CH3N, TIM3_CH4, TIM8_CH3N, OCTOSPIM_P1_IO0, DFSDM1_DATIN1, OTG_HS_ULPI_D2 and LCD_G0; analog input ADC12_INP5 and COMP1_INM.
M9 VDD power_in Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV.
M10 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
M11 PH7 bidirectional 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include I2C3_SCL, SPI5_MISO, ETH_MII_RXD3, FMC_SDCKE1 and DCMI_D9/PSSI_D9.
M12 PE14 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH4, SPI4_MOSI (boot), SAI4_MCLK_B, FMC_D11/FMC_AD11 and LCD_CLK.
M13 PH11 bidirectional 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM5_CH2, I2C4_SCL, FMC_D19, DCMI_D2/PSSI_D2 and LCD_R5.
M14 PH9 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM12_CH2, I2C3_SMBA, FMC_D17, DCMI_D0/PSSI_D0 and LCD_R3.
M15 PB12 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_BKIN, OCTOSPIM_P1_NCLK, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, FDCAN2_RX and ETH_MII_TXD0/ETH_RMII_TXD0.
N1 PC2_C input Analog-only input (ANA; TT_a option, supplied by VDDA) with ADC3_INN1 and ADC3_INP0 inputs.
N2 PC3_C input Analog-only input (ANA; TT_a option, supplied by VDDA) with ADC3_INP1 input.
N3 VSSA power_in Analog ground for the ADC, DAC, OPAMP, COMP and VREFBUF blocks.
N4 PH2 bidirectional 5 V-tolerant I/O with analog option (FT_ha); alternate functions include LPTIM1_IN2, OCTOSPIM_P1_IO4, SAI4_SCK_B, ETH_MII_CRS, FMC_SDCKE0 and LCD_R0; analog input ADC3_INP13.
N5 PA3 bidirectional 5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM2_CH4, TIM5_CH4, LPTIM5_OUT, TIM15_CH2, I2S6_MCK, OCTOSPIM_P1_IO2, USART2_RX (boot), OTG_HS_ULPI_D0 and ETH_MII_COL; analog input ADC12_INP15.
N6 PA7 bidirectional 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI (boot)/I2S1_SDO, TIM14_CH1, ETH_MII_RX_DV and FMC_SDNWE; analog inputs ADC12_INN3, ADC12_INP7 and OPAMP1_VINM.
N7 PF11 bidirectional 5 V-tolerant I/O with analog option (FT_ha); alternate functions include SPI5_MOSI, OCTOSPIM_P1_NCLK, SAI4_SD_B, FMC_NRAS, DCMI_D12/PSSI_D12 and TIM24_CH1; analog input ADC1_INP2.
N8 PE8 bidirectional 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH1N, DFSDM1_CKIN2, UART7_TX, OCTOSPIM_P1_IO5, FMC_D5/FMC_AD5 and COMP2_OUT; analog input OPAMP2_VINM.
N9 PG1 bidirectional 3.3 V-tolerant high-speed low-voltage I/O (TT_h); alternate functions include OCTOSPIM_P2_IO5, UART9_TX and FMC_A11; additional function OPAMP2_VINM.
N10 PF15 bidirectional 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include I2C4_SDA and FMC_A9.
N11 PF13 bidirectional 5 V-tolerant I/O with analog option (FT_ha); alternate functions include DFSDM1_DATIN6, I2C4_SMBA, FMC_A7 and TIM24_CH3; analog input ADC2_INP2.
N12 PB10 bidirectional 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM2_CH3, LPTIM2_IN1, I2C2_SCL, SPI2_SCK/I2S2_CK, DFSDM1_DATIN7, USART3_TX (boot), OCTOSPIM_P1_NCS and OTG_HS_ULPI_D3.
N13 PH8 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM5_ETR, I2C3_SDA, FMC_D16, DCMI_HSYNC/PSSI_DE and LCD_R2.
N14 PH10 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM5_CH1, I2C4_SMBA, FMC_D18, DCMI_D1/PSSI_D1 and LCD_R4.
N15 PH12 bidirectional 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM5_CH3, I2C4_SDA, FMC_D20, DCMI_D3/PSSI_D3 and LCD_R6.
P1 PA0 bidirectional 5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX and ETH_MII_CRS; analog input ADC1_INP16 and wake-up WKUP1.
P2 PA1 bidirectional 5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM2_CH2, TIM5_CH2, LPTIM3_OUT, USART2_RTS/USART2_DE, UART4_RX and ETH_MII_RX_CLK/ETH_RMII_REF_CLK; analog inputs ADC1_INN16 and ADC1_INP17.
P3 PA1_C input Analog-only input (ANA; TT_a option, supplied by VDDA) with ADC12_INP1 input.
P4 PH4 bidirectional 5 V-tolerant I/O with FM+ and analog options (FT_fa); alternate functions include I2C2_SCL, LCD_G5, OTG_HS_ULPI_NXT, PSSI_D14 and LCD_G4; analog inputs ADC3_INN14 and ADC3_INP15.
P5 PA4 bidirectional 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include D1PWREN, TIM5_ETR, SPI1_NSS (boot)/I2S1_WS, SPI3_NSS/I2S3_WS, USART2_CK and FMC_D8/FMC_AD8; analog input ADC12_INP18 and DAC1_OUT1.
P6 PA5 bidirectional 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include D2PWREN, TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK (boot)/I2S1_CK, OTG_HS_ULPI_CK and FMC_D9/FMC_AD9; analog inputs ADC12_INN18, ADC12_INP19 and DAC1_OUT2.
P7 PB2 bidirectional 5 V-tolerant high-speed low-voltage I/O with analog option (FT_ha); alternate functions include RTC_OUT, SAI4_D1, SAI1_D1, DFSDM1_CKIN1, SPI3_MOSI/I2S3_SDO, OCTOSPIM_P1_CLK and ETH_TX_ER; additional function COMP1_INP.
P8 PG0 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include OCTOSPIM_P2_IO4, UART9_RX and FMC_A10.
P9 PE7 bidirectional 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_ETR, DFSDM1_DATIN2, UART7_RX, OCTOSPIM_P1_IO4 and FMC_D4/FMC_AD4; additional functions OPAMP2_VOUT and COMP2_INM.
P10 PB11 bidirectional 5 V-tolerant I/O with FM+ option (FT_f); alternate functions include TIM2_CH4, LPTIM2_ETR, I2C2_SDA, DFSDM1_CKIN7, USART3_RX (boot), OTG_HS_ULPI_D4 and ETH_MII_TX_EN/ETH_RMII_TX_EN.
P11 PF12 bidirectional 5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P2_DQS, FMC_A6 and TIM24_CH2; analog inputs ADC1_INN2 and ADC1_INP6.
P12 PE12 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH3N, DFSDM1_DATIN5, SPI4_SCK (boot), SAI4_SCK_B, FMC_D9/FMC_AD9, COMP1_OUT and LCD_B4.
P13 PE13 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH3, DFSDM1_CKIN5, SPI4_MISO (boot), SAI4_FS_B, FMC_D10/FMC_AD10, COMP2_OUT and LCD_DE.
P14 PE15 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_BKIN, USART10_CK, FMC_D12/FMC_AD12, TIM1_BKIN_COMP12 and LCD_R7.
P15 PH6 bidirectional 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM12_CH1, I2C2_SMBA, SPI5_SCK, ETH_MII_RXD2, FMC_SDNE1 and DCMI_D8/PSSI_D8.
R1 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.
R2 PA2 bidirectional 5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM2_CH3, TIM5_CH3, LPTIM4_OUT, TIM15_CH1, OCTOSPIM_P1_IO0, USART2_TX (boot), ETH_MDIO and LCD_R1; analog input ADC12_INP14 and wake-up WKUP2.
R3 PA0_C input Analog-only input (ANA; TT_a option, supplied by VDDA) with ADC12_INN1 and ADC12_INP0 inputs.
R4 PH3 bidirectional 5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P1_IO5, SAI4_MCLK_B, ETH_MII_COL, FMC_SDNE0 and LCD_R1; analog inputs ADC3_INN13 and ADC3_INP14.
R5 PH5 bidirectional 5 V-tolerant I/O with FM+ and analog options (FT_fha); alternate functions include I2C2_SDA, SPI5_NSS, FMC_SDNWE and EVENTOUT; analog inputs ADC3_INN15 and ADC3_INP16.
R6 PC4 bidirectional 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include PWR_DEEPSLEEP, FMC_A22, DFSDM1_CKIN2, I2S1_MCK, SPDIFRX1_IN3, ETH_MII_RXD0 and LCD_R7; analog input ADC12_INP4, OPAMP1_VOUT and COMP1_INM.
R7 PA6 bidirectional 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO (boot)/I2S1_SDI, SPI6_MISO/I2S6_SDI and TIM13_CH1; analog input ADC12_INP3.
R8 PB0 bidirectional 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH2N, TIM3_CH3, TIM8_CH2N, OCTOSPIM_P1_IO1, UART4_CTS, OTG_HS_ULPI_D1 and ETH_MII_RXD2; analog inputs ADC12_INN5, ADC12_INP9, OPAMP1_VINP and COMP1_INP.
R9 PE10 bidirectional 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH2N, DFSDM1_DATIN4, UART7_CTS, OCTOSPIM_P1_IO7 and FMC_D7/FMC_AD7; additional function COMP2_INM.
R10 PF14 bidirectional 5 V-tolerant I/O with FM+ and analog options (FT_fha); alternate functions include DFSDM1_CKIN6, I2C4_SCL, FMC_A8 and TIM24_CH4; analog inputs ADC2_INN2 and ADC2_INP6.
R11 PE9 bidirectional 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH1, DFSDM1_CKOUT, UART7_RTS/UART7_DE, OCTOSPIM_P1_IO6 and FMC_D6/FMC_AD6; additional functions OPAMP2_VINP and COMP2_INP.
R12 PE11 bidirectional 5 V-tolerant high-speed low-voltage I/O with analog option (FT_ha); alternate functions include TIM1_CH2, DFSDM1_CKIN4, SPI4_NSS (boot), SAI4_SD_B, OCTOSPIM_P1_NCS, FMC_D8/FMC_AD8 and LCD_G3; additional function COMP2_INP.
R13 VCAP power_in Connection for the external VCORE decoupling capacitor (CEXT) of the internal regulator.
R14 VDDLDO power_in Supply for the internal LDO regulator; VDDLDO must not exceed VDD, with a range of 1.62 V to 3.6 V.
R15 VSS power_in Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package UFBGA-201
Category Embedded Processors & Controllers
Pins 201

CAD (KiCad official)

  • Symbol: STM32H725IGK6
  • Footprint: Package_BGA:UFBGA-201_10x10mm_Layout15x15_P0.65mm
  • 3D model: UFBGA-201 (KiCad packages3D, STEP)
  • 3D model files: stm32h725igk6-etched.step / stm32h725igk6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32h725igk6.step / stm32h725igk6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (273 pp, sha256 e2d4e6686c530a98, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF