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@@ -0,0 +1,237 @@+# STM32H725IGK6++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · UFBGA-201++STM32H725IGK6 from STMicroelectronics, in a UFBGA-201. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| A1 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| A2 | PB8 | bidirectional | 5 V-tolerant I/O with FM+ option and high-speed low-voltage option (FT_fh); alternate functions include TIM16_CH1, I2C1_SCL, SDMMC1_CKIN, FDCAN1_RX, SDMMC2_D4 and DCMI_D6/PSSI_D6. |+| A3 | VDDLDO | power_in | Supply for the internal LDO regulator; VDDLDO must not exceed VDD, with a range of 1.62 V to 3.6 V. |+| A4 | VCAP | power_in | Connection for the external VCORE decoupling capacitor (CEXT) of the internal regulator. |+| A5 | PB6 | bidirectional | 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM16_CH1N, TIM4_CH1, I2C1_SCL (boot), USART1_TX, FDCAN2_TX and FMC_SDNE1. |+| A6 | PB3 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); default function JTDO/TRACESWO, with alternate functions TIM2_CH2, SPI1_SCK/I2S1_CK, SDMMC2_D2 and UART7_RX. |+| A7 | PG11 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM1_IN2, USART10_RX, SPI1_SCK/I2S1_CK, SPDIFRX1_IN1, SDMMC2_D2 and DCMI_D3/PSSI_D3. |+| A8 | PG9 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include FDCAN3_TX, SPI1_MISO/I2S1_SDI, USART6_RX, SDMMC2_D0, FMC_NE2/FMC_NCE and DCMI_VSYNC/PSSI_RDY. |+| A9 | PD3 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_CKOUT, SPI2_SCK/I2S2_CK, USART2_CTS/USART2_NSS, FMC_CLK and DCMI_D5/PSSI_D5. |+| A10 | PD1 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_DATIN6, UART4_TX, FDCAN1_TX (boot) and FMC_D3/FMC_AD3. |+| A11 | PA15 | bidirectional | 5 V-tolerant I/O (FT); default function JTDI, with alternate functions including TIM2_CH1/TIM2_ETR, CEC, SPI1_NSS/I2S1_WS, UART4_RTS/UART4_DE and LCD_R3. |+| A12 | PA14 | bidirectional | 5 V-tolerant I/O (FT); default function JTCK/SWCLK debug pin. |+| A13 | VDDLDO | power_in | Supply for the internal LDO regulator; VDDLDO must not exceed VDD, with a range of 1.62 V to 3.6 V. |+| A14 | VCAP | power_in | Connection for the external VCORE decoupling capacitor (CEXT) of the internal regulator. |+| A15 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| B1 | PE4 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED1, SAI1_D2, DFSDM1_DATIN3, SPI4_NSS, FMC_A20 and DCMI_D4/PSSI_D4. |+| B2 | PE3 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED0, TIM15_BKIN, SAI1_SD_B, USART10_TX and FMC_A19. |+| B3 | PB9 | bidirectional | 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM17_CH1, I2C1_SDA (boot), SPI2_NSS/I2S2_WS, UART4_TX, FDCAN1_TX and DCMI_D7/PSSI_D7. |+| B4 | PE0 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM1_ETR, TIM4_ETR, UART8_RX, SAI4_MCLK_A, FMC_NBL0 and DCMI_D2/PSSI_D2. |+| B5 | PB7 | bidirectional | 5 V-tolerant I/O with FM+ and analog options (FT_fa); alternate functions include TIM17_CH1N, TIM4_CH2, I2C1_SDA, USART1_RX, FMC_NL; additional function PVD_IN. |+| B6 | PB4 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); default function NJTRST, with alternate functions TIM16_BKIN, TIM3_CH1, SPI1_MISO/I2S1_SDI, SPI2_NSS/I2S2_WS and UART7_TX. |+| B7 | PG13 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED0, LPTIM1_OUT, USART10_CTS/USART10_NSS, SPI6_SCK/I2S6_CK, USART6_CTS, ETH_MII_TXD0 and FMC_A24. |+| B8 | PD7 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_DATIN4, SPI1_MOSI/I2S1_SDO, USART2_CK, OCTOSPIM_P1_IO7, SDMMC2_CMD and FMC_NE1. |+| B9 | PD5 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include USART2_TX, OCTOSPIM_P1_IO5 and FMC_NWE. |+| B10 | PD2 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED2, FMC_D7/FMC_AD7, TIM3_ETR, TIM15_BKIN, UART5_RX, SDMMC1_CMD and DCMI_D11/PSSI_D11. |+| B11 | PC12 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED3, FMC_D6/FMC_AD6, TIM15_CH1, SPI6_SCK/I2S6_CK, USART3_CK, UART5_TX, SDMMC1_CK and DCMI_D9/PSSI_D9. |+| B12 | PH14 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_CH2N, UART4_RX, FDCAN1_RX (boot), FMC_D22, DCMI_D4/PSSI_D4 and LCD_G3. |+| B13 | PA13 | bidirectional | 5 V-tolerant I/O (FT); default function JTMS/SWDIO debug pin. |+| B14 | PA8 | bidirectional | 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include MCO1, TIM1_CH1, TIM8_BKIN2, I2C3_SCL (boot), USART1_CK, OTG_HS_SOF and UART7_RX. |+| B15 | PA12 | bidirectional | USB-option 5 V-tolerant I/O (FT_u, supplied by VDD33USB); alternate functions include TIM1_ETR, LPUART1_RTS/LPUART1_DE, SPI2_SCK/I2S2_CK, UART4_TX, USART1_RTS/USART1_DE, SAI4_FS_B and FDCAN1_TX; additional function OTG_HS_DP (boot). |+| C1 | PC13 | bidirectional | 5 V-tolerant I/O (FT) with additional functions RTC_TAMP1/RTC_TS and WKUP4 and EVENTOUT. |+| C2 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| C3 | PE2 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACECLK, SAI1_CK1, USART10_RX, SPI4_SCK, OCTOSPIM_P1_IO2 and FMC_A23. |+| C4 | PE1 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM1_IN2, UART8_TX, FMC_NBL1, DCMI_D3/PSSI_D3 and LCD_R6. |+| C5 | BOOT0 | input | Dedicated BOOT0 pin used to select the boot mode; its input voltage range is 0 to 9 V (Table 13), with a maximum of 9.0 V (Table 10). |+| C6 | PB5 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM17_BKIN, TIM3_CH2, LCD_B5, I2C1_SMBA, SPI1_MOSI/I2S1_SDO, FDCAN2_RX, FMC_SDCKE1 and UART5_RX. |+| C7 | PG14 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED1, LPTIM1_ETR, USART10_RTS/USART10_DE, SPI6_MOSI/I2S6_SDO, USART6_TX, FMC_A25 and TIM23_CH3. |+| C8 | PG10 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include FDCAN3_RX, OCTOSPIM_P2_IO6, SPI1_NSS/I2S1_WS, LCD_G3, SAI4_SD_B, SDMMC2_D1, FMC_NE3 and DCMI_D2/PSSI_D2. |+| C9 | PD4 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include USART2_RTS/USART2_DE, OCTOSPIM_P1_IO4 and FMC_NOE. |+| C10 | PD0 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_CKIN6, UART4_RX, FDCAN1_RX (boot), UART9_CTS, FMC_D2/FMC_AD2 and LCD_B1. |+| C11 | PC11 | bidirectional | 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include DFSDM1_DATIN5, I2C5_SCL, SPI3_MISO (boot)/I2S3_SDI, USART3_RX, UART4_RX, OCTOSPIM_P1_NCS, SDMMC1_D3 and DCMI_D4/PSSI_D4. |+| C12 | PC10 | bidirectional | 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include DFSDM1_CKIN5, I2C5_SDA, SPI3_SCK (boot)/I2S3_CK, USART3_TX, UART4_TX, OCTOSPIM_P1_IO1, SDMMC1_D2 and DCMI_D8/PSSI_D8. |+| C13 | PH13 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_CH1N, UART4_TX, FDCAN1_TX (boot), FMC_D21 and LCD_G2. |+| C14 | PA10 | bidirectional | USB-option 5 V-tolerant I/O (FT_u, supplied by VDD33USB); alternate functions include TIM1_CH3, LPUART1_RX, USART1_RX (boot), OTG_HS_ID, MDIOS_MDIO, LCD_B4 and DCMI_D1/PSSI_D1. |+| C15 | PA11 | bidirectional | USB-option 5 V-tolerant I/O (FT_u, supplied by VDD33USB); alternate functions include TIM1_CH4, LPUART1_CTS, SPI2_NSS/I2S2_WS, UART4_RX, USART1_CTS/USART1_NSS and FDCAN1_RX; additional function OTG_HS_DM (boot). |+| D1 | PC15-OSC32_OUT | bidirectional | 5 V-tolerant I/O (FT) whose additional function OSC32_OUT is the output of the 32.768 kHz LSE oscillator. |+| D2 | PC14-OSC32_IN | bidirectional | 5 V-tolerant I/O (FT) whose additional function OSC32_IN is the input of the 32.768 kHz LSE oscillator. |+| D3 | PE5 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED2, SAI1_CK2, DFSDM1_CKIN3, TIM15_CH1, SPI4_MISO, FMC_A21 and DCMI_D6/PSSI_D6. |+| D4 | PDR_ON | power_in | Controls the power-down reset (PDR): the PDR can only be switched OFF through this pin, which is not available in all packages; listed as a supply (S) in Table 8. |+| D5 | VDD | power_in | Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV. |+| D6 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| D7 | PG15 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include USART6_CTS/USART6_NSS, OCTOSPIM_P2_DQS, USART10_CK, FMC_NCAS and DCMI_D13/PSSI_D13. |+| D8 | PG12 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM1_IN1, OCTOSPIM_P2_NCS, USART10_TX, SPI6_MISO/I2S6_SDI, SDMMC2_D3, FMC_NE4 and TIM23_CH1. |+| D9 | PD6 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include SAI4_D1, SAI1_D1, DFSDM1_CKIN4, SPI3_MOSI/I2S3_SDO, USART2_RX, OCTOSPIM_P1_IO6, SDMMC2_CK, FMC_NWAIT and DCMI_D10/PSSI_D10. |+| D10 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| D11 | VDD | power_in | Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV. |+| D12 | PH15 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_CH3N, FMC_D23, DCMI_D11/PSSI_D11 and LCD_G4. |+| D13 | PA9 | bidirectional | USB-option 5 V-tolerant I/O (FT_u, supplied by VDD33USB); alternate functions include TIM1_CH2, LPUART1_TX, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX (boot), ETH_TX_ER and DCMI_D0/PSSI_D0; additional function OTG_HS_VBUS. |+| D14 | PC8 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED1, TIM3_CH3, TIM8_CH3, USART6_CK, UART5_RTS/UART5_DE, FMC_NE2/FMC_NCE, FMC_INT, SWPMI_RX and SDMMC1_D0. |+| D15 | PC7 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DBTRGIO, TIM3_CH2, TIM8_CH2, DFSDM1_DATIN3, I2S3_MCK, USART6_RX, FMC_NE1 and SWPMI_TX. |+| E1 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| E2 | VBAT | power_in | Backup-domain supply for the RTC, 32 x 32-bit backup registers and backup SRAM; absolute maximum rating −0.3 V to 4.0 V (Table 10). |+| E3 | PE6 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED3, TIM1_BKIN2, SAI1_D1, TIM15_CH2, SPI4_MOSI, FMC_A22 and DCMI_D7/PSSI_D7. |+| E4 | VDD | power_in | Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV. |+| E12 | VDD | power_in | Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV. |+| E13 | PC9 | bidirectional | 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA (boot), I2C5_SDA, UART5_CTS, OCTOSPIM_P1_IO0, SWPMI_SUSPEND and SDMMC1_D1. |+| E14 | PC6 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, I2S2_MCK, USART6_TX, SDMMC1_D0DIR, FMC_NWAIT, SDMMC2_D6 and DCMI_D0/PSSI_D0. |+| E15 | VDD50USB | power_in | USB regulator supply input; 4 V to 5.5 V when the USB regulator is ON (Table 13). |+| F1 | VLXSMPS | power_in | Switching node (LX) of the internal SMPS step-down converter; listed as a supply (S) in Table 8. |+| F2 | VSSSMPS | power_in | Ground for the internal SMPS step-down converter. |+| F3 | PF1 | bidirectional | 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include I2C2_SCL (boot), I2C5_SCL, OCTOSPIM_P2_IO1, FMC_A1 and TIM23_CH2. |+| F4 | PF0 | bidirectional | 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include I2C2_SDA (boot), I2C5_SDA, OCTOSPIM_P2_IO0, FMC_A0 and TIM23_CH1. |+| F6 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| F7 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| F8 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| F9 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| F10 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| F12 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| F13 | VDD33USB | power_in | USB domain supply; 3.0 V to 3.6 V when USB is used, and 0 to 3.6 V when USB is not used (Table 13). |+| F14 | PG6 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM17_BKIN, OCTOSPIM_P1_NCS, FMC_NE3, DCMI_D12/PSSI_D12 and LCD_R7. |+| F15 | PG5 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_ETR and FMC_A15/FMC_BA1. |+| G1 | VDDSMPS | power_in | Supply for the internal SMPS step-down converter; VDDSMPS = VDD, with a range of 1.62 V to 3.6 V (Table 13). |+| G2 | VFBSMPS | power_in | Feedback pin of the internal SMPS step-down converter; listed as a supply (S) in Table 8. |+| G3 | PF2 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include I2C2_SMBA, I2C5_SMBA, OCTOSPIM_P2_IO2, FMC_A2 and TIM23_CH3. |+| G4 | VDD | power_in | Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV. |+| G6 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| G7 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| G8 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| G9 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| G10 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| G12 | PG8 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_ETR, SPI6_NSS/I2S6_WS, USART6_RTS/USART6_DE, SPDIFRX1_IN3, ETH_PPS_OUT, FMC_SDCLK and LCD_G7. |+| G13 | PG7 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include SAI1_MCLK_A, USART6_CK, OCTOSPIM_P2_DQS, FMC_INT, DCMI_D13/PSSI_D13 and LCD_CLK. |+| G14 | PG4 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_BKIN2, TIM1_BKIN2_COMP12 and FMC_A14/FMC_BA0. |+| G15 | PG2 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_BKIN, TIM8_BKIN_COMP12, FMC_A12 and TIM24_ETR. |+| H1 | PF6 | bidirectional | 5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM16_CH1, FDCAN3_RX, SPI5_NSS, SAI1_SD_B, UART7_RX and TIM23_CH1; analog inputs ADC3_INN4 and ADC3_INP8. |+| H2 | PF4 | bidirectional | 5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P2_CLK and FMC_A4; analog inputs ADC3_INN5 and ADC3_INP9. |+| H3 | PF5 | bidirectional | 5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P2_NCLK and FMC_A5; analog input ADC3_INP4. |+| H4 | PF3 | bidirectional | 5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P2_IO3, FMC_A3 and TIM23_CH4; analog input ADC3_INP5. |+| H6 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| H7 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| H8 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| H9 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| H10 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| H12 | VDD | power_in | Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV. |+| H13 | PG3 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_BKIN2, TIM8_BKIN2_COMP12, FMC_A13 and TIM23_ETR. |+| H14 | PD14 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM4_CH3, UART8_CTS, UART9_RX and FMC_D0/FMC_AD0. |+| H15 | PD13 | bidirectional | 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include LPTIM1_OUT, TIM4_CH2, I2C4_SDA, FDCAN3_TX, OCTOSPIM_P1_IO3, FMC_A18 and DCMI_D13/PSSI_D13. |+| J1 | PH0-OSC_IN | bidirectional | 5 V-tolerant I/O (FT) whose additional function OSC_IN is the input of the 4-50 MHz HSE oscillator. |+| J2 | PF8 | bidirectional | 5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM16_CH1N, SPI5_MISO, SAI1_SCK_B, UART7_RTS/UART7_DE and TIM23_CH3; analog inputs ADC3_INN3 and ADC3_INP7. |+| J3 | PF7 | bidirectional | 5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM17_CH1, FDCAN3_TX, SPI5_SCK, UART7_TX and TIM23_CH2; analog input ADC3_INP3. |+| J4 | PF9 | bidirectional | 5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM17_CH1N, SPI5_MOSI, SAI1_FS_B, UART7_CTS and TIM23_CH4; analog input ADC3_INP2. |+| J6 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| J7 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| J8 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| J9 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| J10 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| J12 | PD15 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM4_CH4, UART8_RTS/UART8_DE, UART9_TX and FMC_D1/FMC_AD1. |+| J13 | PD11 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM2_IN2, I2C4_SMBA, USART3_CTS/USART3_NSS, OCTOSPIM_P1_IO0, SAI4_SD_A and FMC_A16/FMC_CLE. |+| J14 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| J15 | PD12 | bidirectional | 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include LPTIM1_IN1, TIM4_CH1, LPTIM2_IN1, I2C4_SCL, FDCAN3_RX, USART3_RTS/USART3_DE, FMC_A17/FMC_ALE and DCMI_D12/PSSI_D12. |+| K1 | PH1-OSC_OUT | bidirectional | 5 V-tolerant I/O (FT) whose additional function OSC_OUT is the output of the 4-50 MHz HSE oscillator. |+| K2 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| K3 | PF10 | bidirectional | 5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM16_BKIN, SAI1_D3, PSSI_D15, OCTOSPIM_P1_CLK, DCMI_D11/PSSI_D11 and LCD_DE; analog inputs ADC3_INN2 and ADC3_INP6. |+| K4 | VDD | power_in | Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV. |+| K6 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| K7 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| K8 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| K9 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| K10 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| K12 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| K13 | PD9 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_DATIN3, USART3_RX (boot) and FMC_D14/FMC_AD14. |+| K14 | PB15 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include RTC_REFIN, TIM1_CH3N, TIM12_CH2, TIM8_CH3N, USART1_RX, SPI2_MOSI/I2S2_SDO, SDMMC2_D1 and FMC_D11/FMC_AD11. |+| K15 | PB14 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH2N, TIM12_CH1, USART1_TX, SPI2_MISO/I2S2_SDI, USART3_RTS/USART3_DE, SDMMC2_D0 and FMC_D10/FMC_AD10. |+| L1 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor (RST I/O structure). |+| L2 | PC0 | bidirectional | 5 V-tolerant high-speed low-voltage I/O with analog option (FT_ha); alternate functions include FMC_D12/FMC_AD12, DFSDM1_CKIN0, OTG_HS_ULPI_STP, FMC_SDNWE and LCD_R5; analog input ADC123_INP10. |+| L3 | PC1 | bidirectional | 5 V-tolerant high-speed low-voltage I/O with analog option (FT_ha); alternate functions include TRACED0, SAI1_D1, SPI2_MOSI/I2S2_SDO, ETH_MDC, MDIOS_MDC and LCD_G5; analog inputs ADC123_INN10 and ADC123_INP11, plus RTC_TAMP3 and WKUP6. |+| L4 | VREF- | power_in | Negative reference voltage pin, connected to VSSA in the power supply scheme (Figure 14). |+| L12 | VDD | power_in | Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV. |+| L13 | PD10 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_CKOUT, USART3_CK, FMC_D15/FMC_AD15 and LCD_B3. |+| L14 | PD8 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_CKIN3, USART3_TX (boot), SPDIFRX1_IN2 and FMC_D13/FMC_AD13. |+| L15 | PB13 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH1N, LPTIM2_OUT, OCTOSPIM_P1_IO2, SPI2_SCK/I2S2_CK, USART3_CTS/USART3_NSS, FDCAN2_TX, SDMMC1_D0 and UART5_TX. |+| M1 | PC2 | bidirectional | 5 V-tolerant I/O with analog option (FT_a); alternate functions include PWR_DEEPSLEEP, DFSDM1_CKIN1, OCTOSPIM_P1_IO5, SPI2_MISO/I2S2_SDI, OTG_HS_ULPI_DIR and FMC_SDNE0; analog inputs ADC123_INN11 and ADC123_INP12. |+| M2 | PC3 | bidirectional | 5 V-tolerant I/O with analog option (FT_a); alternate functions include PWR_SLEEP, DFSDM1_DATIN1, OCTOSPIM_P1_IO6, SPI2_MOSI/I2S2_SDO, OTG_HS_ULPI_NXT and FMC_SDCKE0; analog inputs ADC12_INN12 and ADC12_INP13. |+| M3 | VREF+ | power_in | Positive reference voltage pin; may be connected to VDDA or kept separate, as shown in the decoupling examples (Figures 48 and 49). |+| M4 | VDDA | power_in | Analog supply: 1.62 V to 3.6 V when the ADC or COMP is used, 1.8 V minimum when the DAC or VREFBUF is used, and 2.0 V minimum when the OPAMP is used (Table 13). |+| M5 | VDD | power_in | Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV. |+| M6 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| M7 | PC5 | bidirectional | 5 V-tolerant I/O with analog option (FT_ha, TT_ha class); alternate functions include PWR_SLEEP, SAI4_D3, SAI1_D3, DFSDM1_DATIN2, PSSI_D15, SPDIFRX1_IN4, ETH_MII_RXD1 and COMP1_OUT; analog inputs ADC12_INN4, ADC12_INP8 and OPAMP1_VINM. |+| M8 | PB1 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_ha); alternate functions include TIM1_CH3N, TIM3_CH4, TIM8_CH3N, OCTOSPIM_P1_IO0, DFSDM1_DATIN1, OTG_HS_ULPI_D2 and LCD_G0; analog input ADC12_INP5 and COMP1_INM. |+| M9 | VDD | power_in | Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV. |+| M10 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| M11 | PH7 | bidirectional | 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include I2C3_SCL, SPI5_MISO, ETH_MII_RXD3, FMC_SDCKE1 and DCMI_D9/PSSI_D9. |+| M12 | PE14 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH4, SPI4_MOSI (boot), SAI4_MCLK_B, FMC_D11/FMC_AD11 and LCD_CLK. |+| M13 | PH11 | bidirectional | 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM5_CH2, I2C4_SCL, FMC_D19, DCMI_D2/PSSI_D2 and LCD_R5. |+| M14 | PH9 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM12_CH2, I2C3_SMBA, FMC_D17, DCMI_D0/PSSI_D0 and LCD_R3. |+| M15 | PB12 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_BKIN, OCTOSPIM_P1_NCLK, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, FDCAN2_RX and ETH_MII_TXD0/ETH_RMII_TXD0. |+| N1 | PC2_C | input | Analog-only input (ANA; TT_a option, supplied by VDDA) with ADC3_INN1 and ADC3_INP0 inputs. |+| N2 | PC3_C | input | Analog-only input (ANA; TT_a option, supplied by VDDA) with ADC3_INP1 input. |+| N3 | VSSA | power_in | Analog ground for the ADC, DAC, OPAMP, COMP and VREFBUF blocks. |+| N4 | PH2 | bidirectional | 5 V-tolerant I/O with analog option (FT_ha); alternate functions include LPTIM1_IN2, OCTOSPIM_P1_IO4, SAI4_SCK_B, ETH_MII_CRS, FMC_SDCKE0 and LCD_R0; analog input ADC3_INP13. |+| N5 | PA3 | bidirectional | 5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM2_CH4, TIM5_CH4, LPTIM5_OUT, TIM15_CH2, I2S6_MCK, OCTOSPIM_P1_IO2, USART2_RX (boot), OTG_HS_ULPI_D0 and ETH_MII_COL; analog input ADC12_INP15. |+| N6 | PA7 | bidirectional | 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI (boot)/I2S1_SDO, TIM14_CH1, ETH_MII_RX_DV and FMC_SDNWE; analog inputs ADC12_INN3, ADC12_INP7 and OPAMP1_VINM. |+| N7 | PF11 | bidirectional | 5 V-tolerant I/O with analog option (FT_ha); alternate functions include SPI5_MOSI, OCTOSPIM_P1_NCLK, SAI4_SD_B, FMC_NRAS, DCMI_D12/PSSI_D12 and TIM24_CH1; analog input ADC1_INP2. |+| N8 | PE8 | bidirectional | 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH1N, DFSDM1_CKIN2, UART7_TX, OCTOSPIM_P1_IO5, FMC_D5/FMC_AD5 and COMP2_OUT; analog input OPAMP2_VINM. |+| N9 | PG1 | bidirectional | 3.3 V-tolerant high-speed low-voltage I/O (TT_h); alternate functions include OCTOSPIM_P2_IO5, UART9_TX and FMC_A11; additional function OPAMP2_VINM. |+| N10 | PF15 | bidirectional | 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include I2C4_SDA and FMC_A9. |+| N11 | PF13 | bidirectional | 5 V-tolerant I/O with analog option (FT_ha); alternate functions include DFSDM1_DATIN6, I2C4_SMBA, FMC_A7 and TIM24_CH3; analog input ADC2_INP2. |+| N12 | PB10 | bidirectional | 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM2_CH3, LPTIM2_IN1, I2C2_SCL, SPI2_SCK/I2S2_CK, DFSDM1_DATIN7, USART3_TX (boot), OCTOSPIM_P1_NCS and OTG_HS_ULPI_D3. |+| N13 | PH8 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM5_ETR, I2C3_SDA, FMC_D16, DCMI_HSYNC/PSSI_DE and LCD_R2. |+| N14 | PH10 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM5_CH1, I2C4_SMBA, FMC_D18, DCMI_D1/PSSI_D1 and LCD_R4. |+| N15 | PH12 | bidirectional | 5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM5_CH3, I2C4_SDA, FMC_D20, DCMI_D3/PSSI_D3 and LCD_R6. |+| P1 | PA0 | bidirectional | 5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX and ETH_MII_CRS; analog input ADC1_INP16 and wake-up WKUP1. |+| P2 | PA1 | bidirectional | 5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM2_CH2, TIM5_CH2, LPTIM3_OUT, USART2_RTS/USART2_DE, UART4_RX and ETH_MII_RX_CLK/ETH_RMII_REF_CLK; analog inputs ADC1_INN16 and ADC1_INP17. |+| P3 | PA1_C | input | Analog-only input (ANA; TT_a option, supplied by VDDA) with ADC12_INP1 input. |+| P4 | PH4 | bidirectional | 5 V-tolerant I/O with FM+ and analog options (FT_fa); alternate functions include I2C2_SCL, LCD_G5, OTG_HS_ULPI_NXT, PSSI_D14 and LCD_G4; analog inputs ADC3_INN14 and ADC3_INP15. |+| P5 | PA4 | bidirectional | 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include D1PWREN, TIM5_ETR, SPI1_NSS (boot)/I2S1_WS, SPI3_NSS/I2S3_WS, USART2_CK and FMC_D8/FMC_AD8; analog input ADC12_INP18 and DAC1_OUT1. |+| P6 | PA5 | bidirectional | 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include D2PWREN, TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK (boot)/I2S1_CK, OTG_HS_ULPI_CK and FMC_D9/FMC_AD9; analog inputs ADC12_INN18, ADC12_INP19 and DAC1_OUT2. |+| P7 | PB2 | bidirectional | 5 V-tolerant high-speed low-voltage I/O with analog option (FT_ha); alternate functions include RTC_OUT, SAI4_D1, SAI1_D1, DFSDM1_CKIN1, SPI3_MOSI/I2S3_SDO, OCTOSPIM_P1_CLK and ETH_TX_ER; additional function COMP1_INP. |+| P8 | PG0 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include OCTOSPIM_P2_IO4, UART9_RX and FMC_A10. |+| P9 | PE7 | bidirectional | 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_ETR, DFSDM1_DATIN2, UART7_RX, OCTOSPIM_P1_IO4 and FMC_D4/FMC_AD4; additional functions OPAMP2_VOUT and COMP2_INM. |+| P10 | PB11 | bidirectional | 5 V-tolerant I/O with FM+ option (FT_f); alternate functions include TIM2_CH4, LPTIM2_ETR, I2C2_SDA, DFSDM1_CKIN7, USART3_RX (boot), OTG_HS_ULPI_D4 and ETH_MII_TX_EN/ETH_RMII_TX_EN. |+| P11 | PF12 | bidirectional | 5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P2_DQS, FMC_A6 and TIM24_CH2; analog inputs ADC1_INN2 and ADC1_INP6. |+| P12 | PE12 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH3N, DFSDM1_DATIN5, SPI4_SCK (boot), SAI4_SCK_B, FMC_D9/FMC_AD9, COMP1_OUT and LCD_B4. |+| P13 | PE13 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH3, DFSDM1_CKIN5, SPI4_MISO (boot), SAI4_FS_B, FMC_D10/FMC_AD10, COMP2_OUT and LCD_DE. |+| P14 | PE15 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_BKIN, USART10_CK, FMC_D12/FMC_AD12, TIM1_BKIN_COMP12 and LCD_R7. |+| P15 | PH6 | bidirectional | 5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM12_CH1, I2C2_SMBA, SPI5_SCK, ETH_MII_RXD2, FMC_SDNE1 and DCMI_D8/PSSI_D8. |+| R1 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |+| R2 | PA2 | bidirectional | 5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM2_CH3, TIM5_CH3, LPTIM4_OUT, TIM15_CH1, OCTOSPIM_P1_IO0, USART2_TX (boot), ETH_MDIO and LCD_R1; analog input ADC12_INP14 and wake-up WKUP2. |+| R3 | PA0_C | input | Analog-only input (ANA; TT_a option, supplied by VDDA) with ADC12_INN1 and ADC12_INP0 inputs. |+| R4 | PH3 | bidirectional | 5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P1_IO5, SAI4_MCLK_B, ETH_MII_COL, FMC_SDNE0 and LCD_R1; analog inputs ADC3_INN13 and ADC3_INP14. |+| R5 | PH5 | bidirectional | 5 V-tolerant I/O with FM+ and analog options (FT_fha); alternate functions include I2C2_SDA, SPI5_NSS, FMC_SDNWE and EVENTOUT; analog inputs ADC3_INN15 and ADC3_INP16. |+| R6 | PC4 | bidirectional | 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include PWR_DEEPSLEEP, FMC_A22, DFSDM1_CKIN2, I2S1_MCK, SPDIFRX1_IN3, ETH_MII_RXD0 and LCD_R7; analog input ADC12_INP4, OPAMP1_VOUT and COMP1_INM. |+| R7 | PA6 | bidirectional | 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO (boot)/I2S1_SDI, SPI6_MISO/I2S6_SDI and TIM13_CH1; analog input ADC12_INP3. |+| R8 | PB0 | bidirectional | 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH2N, TIM3_CH3, TIM8_CH2N, OCTOSPIM_P1_IO1, UART4_CTS, OTG_HS_ULPI_D1 and ETH_MII_RXD2; analog inputs ADC12_INN5, ADC12_INP9, OPAMP1_VINP and COMP1_INP. |+| R9 | PE10 | bidirectional | 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH2N, DFSDM1_DATIN4, UART7_CTS, OCTOSPIM_P1_IO7 and FMC_D7/FMC_AD7; additional function COMP2_INM. |+| R10 | PF14 | bidirectional | 5 V-tolerant I/O with FM+ and analog options (FT_fha); alternate functions include DFSDM1_CKIN6, I2C4_SCL, FMC_A8 and TIM24_CH4; analog inputs ADC2_INN2 and ADC2_INP6. |+| R11 | PE9 | bidirectional | 3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH1, DFSDM1_CKOUT, UART7_RTS/UART7_DE, OCTOSPIM_P1_IO6 and FMC_D6/FMC_AD6; additional functions OPAMP2_VINP and COMP2_INP. |+| R12 | PE11 | bidirectional | 5 V-tolerant high-speed low-voltage I/O with analog option (FT_ha); alternate functions include TIM1_CH2, DFSDM1_CKIN4, SPI4_NSS (boot), SAI4_SD_B, OCTOSPIM_P1_NCS, FMC_D8/FMC_AD8 and LCD_G3; additional function COMP2_INP. |+| R13 | VCAP | power_in | Connection for the external VCORE decoupling capacitor (CEXT) of the internal regulator. |+| R14 | VDDLDO | power_in | Supply for the internal LDO regulator; VDDLDO must not exceed VDD, with a range of 1.62 V to 3.6 V. |+| R15 | VSS | power_in | Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | UFBGA-201 |+| Category | Embedded Processors & Controllers |+| Pins | 201 |++## CAD (KiCad official)++- Symbol: `STM32H725IGK6`+- Footprint: `Package_BGA:UFBGA-201_10x10mm_Layout15x15_P0.65mm`+- 3D model: UFBGA-201 (KiCad packages3D, STEP)+- 3D model files: `stm32h725igk6-etched.step` / `stm32h725igk6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32h725igk6.step` / `stm32h725igk6.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886234986909696) (273 pp, sha256 `e2d4e6686c530a98`, retrieved 2026-10-11, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32h725igk6-datasheet.pdf)
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@@ -0,0 +1,1351 @@+{+  "slug": "stm32h725igk6",+  "version": "0.1.0",+  "type": "component",+  "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFBGA-201. Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "embedded processors & controllers",+    "stm32h725igk6",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "stm32h725igk6.kicad_sym",+    "stm32h725igk6.kicad_mod",+    "stm32h725igk6.glb",+    "stm32h725igk6.step",+    "stm32h725igk6.lbr",+    "docs/hero.png",+    "docs/stm32h725igk6-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "stm32h725igk6-hero.glb",+    "stm32h725igk6-hero.overlay.json"+  ],+  "component": {+    "mpn": "STM32H725IGK6",+    "manufacturer": "STMicroelectronics",+    "package": "UFBGA-201",+    "pin_count": 201,+    "category": "Embedded Processors & Controllers",+    "subcategory": "Microcontrollers (MCU/MPU/SOC)",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886234986909696",+    "parts": {+      "symbol": "stm32h725igk6.kicad_sym",+      "footprint": "stm32h725igk6.kicad_mod",+      "model_3d": "stm32h725igk6-hero.glb",+      "model_3d_plain": "stm32h725igk6.glb",+      "model_3d_step": "stm32h725igk6-etched.step",+      "model_3d_step_plain": "stm32h725igk6.step",+      "lbr": "stm32h725igk6.lbr"+    },+    "distributor_links": {+      "lcsc": "C730151",+      "digikey": "497-STM32H725IGK6-ND",+      "mouser": "511-STM32H725IGK6"+    },+    "distributor_check": {+      "checked_at": "2026-10-11T21:02:46Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "497-STM32H725IGK6-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "511-STM32H725IGK6",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "A1",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "A2",+        "name": "PB8",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ option and high-speed low-voltage option (FT_fh); alternate functions include TIM16_CH1, I2C1_SCL, SDMMC1_CKIN, FDCAN1_RX, SDMMC2_D4 and DCMI_D6/PSSI_D6."+      },+      {+        "number": "A3",+        "name": "VDDLDO",+        "type": "power_in",+        "description": "Supply for the internal LDO regulator; VDDLDO must not exceed VDD, with a range of 1.62 V to 3.6 V."+      },+      {+        "number": "A4",+        "name": "VCAP",+        "type": "power_in",+        "description": "Connection for the external VCORE decoupling capacitor (CEXT) of the internal regulator."+      },+      {+        "number": "A5",+        "name": "PB6",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM16_CH1N, TIM4_CH1, I2C1_SCL (boot), USART1_TX, FDCAN2_TX and FMC_SDNE1."+      },+      {+        "number": "A6",+        "name": "PB3",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); default function JTDO/TRACESWO, with alternate functions TIM2_CH2, SPI1_SCK/I2S1_CK, SDMMC2_D2 and UART7_RX."+      },+      {+        "number": "A7",+        "name": "PG11",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM1_IN2, USART10_RX, SPI1_SCK/I2S1_CK, SPDIFRX1_IN1, SDMMC2_D2 and DCMI_D3/PSSI_D3."+      },+      {+        "number": "A8",+        "name": "PG9",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include FDCAN3_TX, SPI1_MISO/I2S1_SDI, USART6_RX, SDMMC2_D0, FMC_NE2/FMC_NCE and DCMI_VSYNC/PSSI_RDY."+      },+      {+        "number": "A9",+        "name": "PD3",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_CKOUT, SPI2_SCK/I2S2_CK, USART2_CTS/USART2_NSS, FMC_CLK and DCMI_D5/PSSI_D5."+      },+      {+        "number": "A10",+        "name": "PD1",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_DATIN6, UART4_TX, FDCAN1_TX (boot) and FMC_D3/FMC_AD3."+      },+      {+        "number": "A11",+        "name": "PA15",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O (FT); default function JTDI, with alternate functions including TIM2_CH1/TIM2_ETR, CEC, SPI1_NSS/I2S1_WS, UART4_RTS/UART4_DE and LCD_R3."+      },+      {+        "number": "A12",+        "name": "PA14",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O (FT); default function JTCK/SWCLK debug pin."+      },+      {+        "number": "A13",+        "name": "VDDLDO",+        "type": "power_in",+        "description": "Supply for the internal LDO regulator; VDDLDO must not exceed VDD, with a range of 1.62 V to 3.6 V."+      },+      {+        "number": "A14",+        "name": "VCAP",+        "type": "power_in",+        "description": "Connection for the external VCORE decoupling capacitor (CEXT) of the internal regulator."+      },+      {+        "number": "A15",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "B1",+        "name": "PE4",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED1, SAI1_D2, DFSDM1_DATIN3, SPI4_NSS, FMC_A20 and DCMI_D4/PSSI_D4."+      },+      {+        "number": "B2",+        "name": "PE3",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED0, TIM15_BKIN, SAI1_SD_B, USART10_TX and FMC_A19."+      },+      {+        "number": "B3",+        "name": "PB9",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM17_CH1, I2C1_SDA (boot), SPI2_NSS/I2S2_WS, UART4_TX, FDCAN1_TX and DCMI_D7/PSSI_D7."+      },+      {+        "number": "B4",+        "name": "PE0",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM1_ETR, TIM4_ETR, UART8_RX, SAI4_MCLK_A, FMC_NBL0 and DCMI_D2/PSSI_D2."+      },+      {+        "number": "B5",+        "name": "PB7",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and analog options (FT_fa); alternate functions include TIM17_CH1N, TIM4_CH2, I2C1_SDA, USART1_RX, FMC_NL; additional function PVD_IN."+      },+      {+        "number": "B6",+        "name": "PB4",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); default function NJTRST, with alternate functions TIM16_BKIN, TIM3_CH1, SPI1_MISO/I2S1_SDI, SPI2_NSS/I2S2_WS and UART7_TX."+      },+      {+        "number": "B7",+        "name": "PG13",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED0, LPTIM1_OUT, USART10_CTS/USART10_NSS, SPI6_SCK/I2S6_CK, USART6_CTS, ETH_MII_TXD0 and FMC_A24."+      },+      {+        "number": "B8",+        "name": "PD7",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_DATIN4, SPI1_MOSI/I2S1_SDO, USART2_CK, OCTOSPIM_P1_IO7, SDMMC2_CMD and FMC_NE1."+      },+      {+        "number": "B9",+        "name": "PD5",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include USART2_TX, OCTOSPIM_P1_IO5 and FMC_NWE."+      },+      {+        "number": "B10",+        "name": "PD2",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED2, FMC_D7/FMC_AD7, TIM3_ETR, TIM15_BKIN, UART5_RX, SDMMC1_CMD and DCMI_D11/PSSI_D11."+      },+      {+        "number": "B11",+        "name": "PC12",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED3, FMC_D6/FMC_AD6, TIM15_CH1, SPI6_SCK/I2S6_CK, USART3_CK, UART5_TX, SDMMC1_CK and DCMI_D9/PSSI_D9."+      },+      {+        "number": "B12",+        "name": "PH14",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_CH2N, UART4_RX, FDCAN1_RX (boot), FMC_D22, DCMI_D4/PSSI_D4 and LCD_G3."+      },+      {+        "number": "B13",+        "name": "PA13",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O (FT); default function JTMS/SWDIO debug pin."+      },+      {+        "number": "B14",+        "name": "PA8",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include MCO1, TIM1_CH1, TIM8_BKIN2, I2C3_SCL (boot), USART1_CK, OTG_HS_SOF and UART7_RX."+      },+      {+        "number": "B15",+        "name": "PA12",+        "type": "bidirectional",+        "description": "USB-option 5 V-tolerant I/O (FT_u, supplied by VDD33USB); alternate functions include TIM1_ETR, LPUART1_RTS/LPUART1_DE, SPI2_SCK/I2S2_CK, UART4_TX, USART1_RTS/USART1_DE, SAI4_FS_B and FDCAN1_TX; additional function OTG_HS_DP (boot)."+      },+      {+        "number": "C1",+        "name": "PC13",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O (FT) with additional functions RTC_TAMP1/RTC_TS and WKUP4 and EVENTOUT."+      },+      {+        "number": "C2",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "C3",+        "name": "PE2",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACECLK, SAI1_CK1, USART10_RX, SPI4_SCK, OCTOSPIM_P1_IO2 and FMC_A23."+      },+      {+        "number": "C4",+        "name": "PE1",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM1_IN2, UART8_TX, FMC_NBL1, DCMI_D3/PSSI_D3 and LCD_R6."+      },+      {+        "number": "C5",+        "name": "BOOT0",+        "type": "input",+        "description": "Dedicated BOOT0 pin used to select the boot mode; its input voltage range is 0 to 9 V (Table 13), with a maximum of 9.0 V (Table 10)."+      },+      {+        "number": "C6",+        "name": "PB5",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM17_BKIN, TIM3_CH2, LCD_B5, I2C1_SMBA, SPI1_MOSI/I2S1_SDO, FDCAN2_RX, FMC_SDCKE1 and UART5_RX."+      },+      {+        "number": "C7",+        "name": "PG14",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED1, LPTIM1_ETR, USART10_RTS/USART10_DE, SPI6_MOSI/I2S6_SDO, USART6_TX, FMC_A25 and TIM23_CH3."+      },+      {+        "number": "C8",+        "name": "PG10",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include FDCAN3_RX, OCTOSPIM_P2_IO6, SPI1_NSS/I2S1_WS, LCD_G3, SAI4_SD_B, SDMMC2_D1, FMC_NE3 and DCMI_D2/PSSI_D2."+      },+      {+        "number": "C9",+        "name": "PD4",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include USART2_RTS/USART2_DE, OCTOSPIM_P1_IO4 and FMC_NOE."+      },+      {+        "number": "C10",+        "name": "PD0",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_CKIN6, UART4_RX, FDCAN1_RX (boot), UART9_CTS, FMC_D2/FMC_AD2 and LCD_B1."+      },+      {+        "number": "C11",+        "name": "PC11",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include DFSDM1_DATIN5, I2C5_SCL, SPI3_MISO (boot)/I2S3_SDI, USART3_RX, UART4_RX, OCTOSPIM_P1_NCS, SDMMC1_D3 and DCMI_D4/PSSI_D4."+      },+      {+        "number": "C12",+        "name": "PC10",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include DFSDM1_CKIN5, I2C5_SDA, SPI3_SCK (boot)/I2S3_CK, USART3_TX, UART4_TX, OCTOSPIM_P1_IO1, SDMMC1_D2 and DCMI_D8/PSSI_D8."+      },+      {+        "number": "C13",+        "name": "PH13",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_CH1N, UART4_TX, FDCAN1_TX (boot), FMC_D21 and LCD_G2."+      },+      {+        "number": "C14",+        "name": "PA10",+        "type": "bidirectional",+        "description": "USB-option 5 V-tolerant I/O (FT_u, supplied by VDD33USB); alternate functions include TIM1_CH3, LPUART1_RX, USART1_RX (boot), OTG_HS_ID, MDIOS_MDIO, LCD_B4 and DCMI_D1/PSSI_D1."+      },+      {+        "number": "C15",+        "name": "PA11",+        "type": "bidirectional",+        "description": "USB-option 5 V-tolerant I/O (FT_u, supplied by VDD33USB); alternate functions include TIM1_CH4, LPUART1_CTS, SPI2_NSS/I2S2_WS, UART4_RX, USART1_CTS/USART1_NSS and FDCAN1_RX; additional function OTG_HS_DM (boot)."+      },+      {+        "number": "D1",+        "name": "PC15-OSC32_OUT",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O (FT) whose additional function OSC32_OUT is the output of the 32.768 kHz LSE oscillator."+      },+      {+        "number": "D2",+        "name": "PC14-OSC32_IN",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O (FT) whose additional function OSC32_IN is the input of the 32.768 kHz LSE oscillator."+      },+      {+        "number": "D3",+        "name": "PE5",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED2, SAI1_CK2, DFSDM1_CKIN3, TIM15_CH1, SPI4_MISO, FMC_A21 and DCMI_D6/PSSI_D6."+      },+      {+        "number": "D4",+        "name": "PDR_ON",+        "type": "power_in",+        "description": "Controls the power-down reset (PDR): the PDR can only be switched OFF through this pin, which is not available in all packages; listed as a supply (S) in Table 8."+      },+      {+        "number": "D5",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "D6",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "D7",+        "name": "PG15",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include USART6_CTS/USART6_NSS, OCTOSPIM_P2_DQS, USART10_CK, FMC_NCAS and DCMI_D13/PSSI_D13."+      },+      {+        "number": "D8",+        "name": "PG12",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM1_IN1, OCTOSPIM_P2_NCS, USART10_TX, SPI6_MISO/I2S6_SDI, SDMMC2_D3, FMC_NE4 and TIM23_CH1."+      },+      {+        "number": "D9",+        "name": "PD6",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include SAI4_D1, SAI1_D1, DFSDM1_CKIN4, SPI3_MOSI/I2S3_SDO, USART2_RX, OCTOSPIM_P1_IO6, SDMMC2_CK, FMC_NWAIT and DCMI_D10/PSSI_D10."+      },+      {+        "number": "D10",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "D11",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "D12",+        "name": "PH15",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_CH3N, FMC_D23, DCMI_D11/PSSI_D11 and LCD_G4."+      },+      {+        "number": "D13",+        "name": "PA9",+        "type": "bidirectional",+        "description": "USB-option 5 V-tolerant I/O (FT_u, supplied by VDD33USB); alternate functions include TIM1_CH2, LPUART1_TX, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX (boot), ETH_TX_ER and DCMI_D0/PSSI_D0; additional function OTG_HS_VBUS."+      },+      {+        "number": "D14",+        "name": "PC8",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED1, TIM3_CH3, TIM8_CH3, USART6_CK, UART5_RTS/UART5_DE, FMC_NE2/FMC_NCE, FMC_INT, SWPMI_RX and SDMMC1_D0."+      },+      {+        "number": "D15",+        "name": "PC7",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DBTRGIO, TIM3_CH2, TIM8_CH2, DFSDM1_DATIN3, I2S3_MCK, USART6_RX, FMC_NE1 and SWPMI_TX."+      },+      {+        "number": "E1",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "E2",+        "name": "VBAT",+        "type": "power_in",+        "description": "Backup-domain supply for the RTC, 32 x 32-bit backup registers and backup SRAM; absolute maximum rating −0.3 V to 4.0 V (Table 10)."+      },+      {+        "number": "E3",+        "name": "PE6",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED3, TIM1_BKIN2, SAI1_D1, TIM15_CH2, SPI4_MOSI, FMC_A22 and DCMI_D7/PSSI_D7."+      },+      {+        "number": "E4",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "E12",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "E13",+        "name": "PC9",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA (boot), I2C5_SDA, UART5_CTS, OCTOSPIM_P1_IO0, SWPMI_SUSPEND and SDMMC1_D1."+      },+      {+        "number": "E14",+        "name": "PC6",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, I2S2_MCK, USART6_TX, SDMMC1_D0DIR, FMC_NWAIT, SDMMC2_D6 and DCMI_D0/PSSI_D0."+      },+      {+        "number": "E15",+        "name": "VDD50USB",+        "type": "power_in",+        "description": "USB regulator supply input; 4 V to 5.5 V when the USB regulator is ON (Table 13)."+      },+      {+        "number": "F1",+        "name": "VLXSMPS",+        "type": "power_in",+        "description": "Switching node (LX) of the internal SMPS step-down converter; listed as a supply (S) in Table 8."+      },+      {+        "number": "F2",+        "name": "VSSSMPS",+        "type": "power_in",+        "description": "Ground for the internal SMPS step-down converter."+      },+      {+        "number": "F3",+        "name": "PF1",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include I2C2_SCL (boot), I2C5_SCL, OCTOSPIM_P2_IO1, FMC_A1 and TIM23_CH2."+      },+      {+        "number": "F4",+        "name": "PF0",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include I2C2_SDA (boot), I2C5_SDA, OCTOSPIM_P2_IO0, FMC_A0 and TIM23_CH1."+      },+      {+        "number": "F6",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "F7",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "F8",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "F9",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "F10",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "F12",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "F13",+        "name": "VDD33USB",+        "type": "power_in",+        "description": "USB domain supply; 3.0 V to 3.6 V when USB is used, and 0 to 3.6 V when USB is not used (Table 13)."+      },+      {+        "number": "F14",+        "name": "PG6",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM17_BKIN, OCTOSPIM_P1_NCS, FMC_NE3, DCMI_D12/PSSI_D12 and LCD_R7."+      },+      {+        "number": "F15",+        "name": "PG5",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_ETR and FMC_A15/FMC_BA1."+      },+      {+        "number": "G1",+        "name": "VDDSMPS",+        "type": "power_in",+        "description": "Supply for the internal SMPS step-down converter; VDDSMPS = VDD, with a range of 1.62 V to 3.6 V (Table 13)."+      },+      {+        "number": "G2",+        "name": "VFBSMPS",+        "type": "power_in",+        "description": "Feedback pin of the internal SMPS step-down converter; listed as a supply (S) in Table 8."+      },+      {+        "number": "G3",+        "name": "PF2",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include I2C2_SMBA, I2C5_SMBA, OCTOSPIM_P2_IO2, FMC_A2 and TIM23_CH3."+      },+      {+        "number": "G4",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "G6",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "G7",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "G8",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "G9",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "G10",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "G12",+        "name": "PG8",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_ETR, SPI6_NSS/I2S6_WS, USART6_RTS/USART6_DE, SPDIFRX1_IN3, ETH_PPS_OUT, FMC_SDCLK and LCD_G7."+      },+      {+        "number": "G13",+        "name": "PG7",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include SAI1_MCLK_A, USART6_CK, OCTOSPIM_P2_DQS, FMC_INT, DCMI_D13/PSSI_D13 and LCD_CLK."+      },+      {+        "number": "G14",+        "name": "PG4",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_BKIN2, TIM1_BKIN2_COMP12 and FMC_A14/FMC_BA0."+      },+      {+        "number": "G15",+        "name": "PG2",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_BKIN, TIM8_BKIN_COMP12, FMC_A12 and TIM24_ETR."+      },+      {+        "number": "H1",+        "name": "PF6",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM16_CH1, FDCAN3_RX, SPI5_NSS, SAI1_SD_B, UART7_RX and TIM23_CH1; analog inputs ADC3_INN4 and ADC3_INP8."+      },+      {+        "number": "H2",+        "name": "PF4",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P2_CLK and FMC_A4; analog inputs ADC3_INN5 and ADC3_INP9."+      },+      {+        "number": "H3",+        "name": "PF5",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P2_NCLK and FMC_A5; analog input ADC3_INP4."+      },+      {+        "number": "H4",+        "name": "PF3",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P2_IO3, FMC_A3 and TIM23_CH4; analog input ADC3_INP5."+      },+      {+        "number": "H6",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "H7",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "H8",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "H9",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "H10",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "H12",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "H13",+        "name": "PG3",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_BKIN2, TIM8_BKIN2_COMP12, FMC_A13 and TIM23_ETR."+      },+      {+        "number": "H14",+        "name": "PD14",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM4_CH3, UART8_CTS, UART9_RX and FMC_D0/FMC_AD0."+      },+      {+        "number": "H15",+        "name": "PD13",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include LPTIM1_OUT, TIM4_CH2, I2C4_SDA, FDCAN3_TX, OCTOSPIM_P1_IO3, FMC_A18 and DCMI_D13/PSSI_D13."+      },+      {+        "number": "J1",+        "name": "PH0-OSC_IN",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O (FT) whose additional function OSC_IN is the input of the 4-50 MHz HSE oscillator."+      },+      {+        "number": "J2",+        "name": "PF8",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM16_CH1N, SPI5_MISO, SAI1_SCK_B, UART7_RTS/UART7_DE and TIM23_CH3; analog inputs ADC3_INN3 and ADC3_INP7."+      },+      {+        "number": "J3",+        "name": "PF7",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM17_CH1, FDCAN3_TX, SPI5_SCK, UART7_TX and TIM23_CH2; analog input ADC3_INP3."+      },+      {+        "number": "J4",+        "name": "PF9",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM17_CH1N, SPI5_MOSI, SAI1_FS_B, UART7_CTS and TIM23_CH4; analog input ADC3_INP2."+      },+      {+        "number": "J6",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "J7",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "J8",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "J9",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "J10",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "J12",+        "name": "PD15",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM4_CH4, UART8_RTS/UART8_DE, UART9_TX and FMC_D1/FMC_AD1."+      },+      {+        "number": "J13",+        "name": "PD11",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM2_IN2, I2C4_SMBA, USART3_CTS/USART3_NSS, OCTOSPIM_P1_IO0, SAI4_SD_A and FMC_A16/FMC_CLE."+      },+      {+        "number": "J14",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "J15",+        "name": "PD12",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include LPTIM1_IN1, TIM4_CH1, LPTIM2_IN1, I2C4_SCL, FDCAN3_RX, USART3_RTS/USART3_DE, FMC_A17/FMC_ALE and DCMI_D12/PSSI_D12."+      },+      {+        "number": "K1",+        "name": "PH1-OSC_OUT",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O (FT) whose additional function OSC_OUT is the output of the 4-50 MHz HSE oscillator."+      },+      {+        "number": "K2",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "K3",+        "name": "PF10",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM16_BKIN, SAI1_D3, PSSI_D15, OCTOSPIM_P1_CLK, DCMI_D11/PSSI_D11 and LCD_DE; analog inputs ADC3_INN2 and ADC3_INP6."+      },+      {+        "number": "K4",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "K6",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "K7",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "K8",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "K9",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "K10",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "K12",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "K13",+        "name": "PD9",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_DATIN3, USART3_RX (boot) and FMC_D14/FMC_AD14."+      },+      {+        "number": "K14",+        "name": "PB15",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include RTC_REFIN, TIM1_CH3N, TIM12_CH2, TIM8_CH3N, USART1_RX, SPI2_MOSI/I2S2_SDO, SDMMC2_D1 and FMC_D11/FMC_AD11."+      },+      {+        "number": "K15",+        "name": "PB14",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH2N, TIM12_CH1, USART1_TX, SPI2_MISO/I2S2_SDI, USART3_RTS/USART3_DE, SDMMC2_D0 and FMC_D10/FMC_AD10."+      },+      {+        "number": "L1",+        "name": "NRST",+        "type": "bidirectional",+        "description": "Bidirectional reset pin with embedded weak pull-up resistor (RST I/O structure)."+      },+      {+        "number": "L2",+        "name": "PC0",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O with analog option (FT_ha); alternate functions include FMC_D12/FMC_AD12, DFSDM1_CKIN0, OTG_HS_ULPI_STP, FMC_SDNWE and LCD_R5; analog input ADC123_INP10."+      },+      {+        "number": "L3",+        "name": "PC1",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O with analog option (FT_ha); alternate functions include TRACED0, SAI1_D1, SPI2_MOSI/I2S2_SDO, ETH_MDC, MDIOS_MDC and LCD_G5; analog inputs ADC123_INN10 and ADC123_INP11, plus RTC_TAMP3 and WKUP6."+      },+      {+        "number": "L4",+        "name": "VREF-",+        "type": "power_in",+        "description": "Negative reference voltage pin, connected to VSSA in the power supply scheme (Figure 14)."+      },+      {+        "number": "L12",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "L13",+        "name": "PD10",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_CKOUT, USART3_CK, FMC_D15/FMC_AD15 and LCD_B3."+      },+      {+        "number": "L14",+        "name": "PD8",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_CKIN3, USART3_TX (boot), SPDIFRX1_IN2 and FMC_D13/FMC_AD13."+      },+      {+        "number": "L15",+        "name": "PB13",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH1N, LPTIM2_OUT, OCTOSPIM_P1_IO2, SPI2_SCK/I2S2_CK, USART3_CTS/USART3_NSS, FDCAN2_TX, SDMMC1_D0 and UART5_TX."+      },+      {+        "number": "M1",+        "name": "PC2",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_a); alternate functions include PWR_DEEPSLEEP, DFSDM1_CKIN1, OCTOSPIM_P1_IO5, SPI2_MISO/I2S2_SDI, OTG_HS_ULPI_DIR and FMC_SDNE0; analog inputs ADC123_INN11 and ADC123_INP12."+      },+      {+        "number": "M2",+        "name": "PC3",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_a); alternate functions include PWR_SLEEP, DFSDM1_DATIN1, OCTOSPIM_P1_IO6, SPI2_MOSI/I2S2_SDO, OTG_HS_ULPI_NXT and FMC_SDCKE0; analog inputs ADC12_INN12 and ADC12_INP13."+      },+      {+        "number": "M3",+        "name": "VREF+",+        "type": "power_in",+        "description": "Positive reference voltage pin; may be connected to VDDA or kept separate, as shown in the decoupling examples (Figures 48 and 49)."+      },+      {+        "number": "M4",+        "name": "VDDA",+        "type": "power_in",+        "description": "Analog supply: 1.62 V to 3.6 V when the ADC or COMP is used, 1.8 V minimum when the DAC or VREFBUF is used, and 2.0 V minimum when the OPAMP is used (Table 13)."+      },+      {+        "number": "M5",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "M6",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "M7",+        "name": "PC5",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha, TT_ha class); alternate functions include PWR_SLEEP, SAI4_D3, SAI1_D3, DFSDM1_DATIN2, PSSI_D15, SPDIFRX1_IN4, ETH_MII_RXD1 and COMP1_OUT; analog inputs ADC12_INN4, ADC12_INP8 and OPAMP1_VINM."+      },+      {+        "number": "M8",+        "name": "PB1",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_ha); alternate functions include TIM1_CH3N, TIM3_CH4, TIM8_CH3N, OCTOSPIM_P1_IO0, DFSDM1_DATIN1, OTG_HS_ULPI_D2 and LCD_G0; analog input ADC12_INP5 and COMP1_INM."+      },+      {+        "number": "M9",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "M10",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "M11",+        "name": "PH7",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include I2C3_SCL, SPI5_MISO, ETH_MII_RXD3, FMC_SDCKE1 and DCMI_D9/PSSI_D9."+      },+      {+        "number": "M12",+        "name": "PE14",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH4, SPI4_MOSI (boot), SAI4_MCLK_B, FMC_D11/FMC_AD11 and LCD_CLK."+      },+      {+        "number": "M13",+        "name": "PH11",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM5_CH2, I2C4_SCL, FMC_D19, DCMI_D2/PSSI_D2 and LCD_R5."+      },+      {+        "number": "M14",+        "name": "PH9",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM12_CH2, I2C3_SMBA, FMC_D17, DCMI_D0/PSSI_D0 and LCD_R3."+      },+      {+        "number": "M15",+        "name": "PB12",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_BKIN, OCTOSPIM_P1_NCLK, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, FDCAN2_RX and ETH_MII_TXD0/ETH_RMII_TXD0."+      },+      {+        "number": "N1",+        "name": "PC2_C",+        "type": "input",+        "description": "Analog-only input (ANA; TT_a option, supplied by VDDA) with ADC3_INN1 and ADC3_INP0 inputs."+      },+      {+        "number": "N2",+        "name": "PC3_C",+        "type": "input",+        "description": "Analog-only input (ANA; TT_a option, supplied by VDDA) with ADC3_INP1 input."+      },+      {+        "number": "N3",+        "name": "VSSA",+        "type": "power_in",+        "description": "Analog ground for the ADC, DAC, OPAMP, COMP and VREFBUF blocks."+      },+      {+        "number": "N4",+        "name": "PH2",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include LPTIM1_IN2, OCTOSPIM_P1_IO4, SAI4_SCK_B, ETH_MII_CRS, FMC_SDCKE0 and LCD_R0; analog input ADC3_INP13."+      },+      {+        "number": "N5",+        "name": "PA3",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM2_CH4, TIM5_CH4, LPTIM5_OUT, TIM15_CH2, I2S6_MCK, OCTOSPIM_P1_IO2, USART2_RX (boot), OTG_HS_ULPI_D0 and ETH_MII_COL; analog input ADC12_INP15."+      },+      {+        "number": "N6",+        "name": "PA7",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI (boot)/I2S1_SDO, TIM14_CH1, ETH_MII_RX_DV and FMC_SDNWE; analog inputs ADC12_INN3, ADC12_INP7 and OPAMP1_VINM."+      },+      {+        "number": "N7",+        "name": "PF11",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include SPI5_MOSI, OCTOSPIM_P1_NCLK, SAI4_SD_B, FMC_NRAS, DCMI_D12/PSSI_D12 and TIM24_CH1; analog input ADC1_INP2."+      },+      {+        "number": "N8",+        "name": "PE8",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH1N, DFSDM1_CKIN2, UART7_TX, OCTOSPIM_P1_IO5, FMC_D5/FMC_AD5 and COMP2_OUT; analog input OPAMP2_VINM."+      },+      {+        "number": "N9",+        "name": "PG1",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O (TT_h); alternate functions include OCTOSPIM_P2_IO5, UART9_TX and FMC_A11; additional function OPAMP2_VINM."+      },+      {+        "number": "N10",+        "name": "PF15",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include I2C4_SDA and FMC_A9."+      },+      {+        "number": "N11",+        "name": "PF13",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include DFSDM1_DATIN6, I2C4_SMBA, FMC_A7 and TIM24_CH3; analog input ADC2_INP2."+      },+      {+        "number": "N12",+        "name": "PB10",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM2_CH3, LPTIM2_IN1, I2C2_SCL, SPI2_SCK/I2S2_CK, DFSDM1_DATIN7, USART3_TX (boot), OCTOSPIM_P1_NCS and OTG_HS_ULPI_D3."+      },+      {+        "number": "N13",+        "name": "PH8",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM5_ETR, I2C3_SDA, FMC_D16, DCMI_HSYNC/PSSI_DE and LCD_R2."+      },+      {+        "number": "N14",+        "name": "PH10",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM5_CH1, I2C4_SMBA, FMC_D18, DCMI_D1/PSSI_D1 and LCD_R4."+      },+      {+        "number": "N15",+        "name": "PH12",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM5_CH3, I2C4_SDA, FMC_D20, DCMI_D3/PSSI_D3 and LCD_R6."+      },+      {+        "number": "P1",+        "name": "PA0",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX and ETH_MII_CRS; analog input ADC1_INP16 and wake-up WKUP1."+      },+      {+        "number": "P2",+        "name": "PA1",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM2_CH2, TIM5_CH2, LPTIM3_OUT, USART2_RTS/USART2_DE, UART4_RX and ETH_MII_RX_CLK/ETH_RMII_REF_CLK; analog inputs ADC1_INN16 and ADC1_INP17."+      },+      {+        "number": "P3",+        "name": "PA1_C",+        "type": "input",+        "description": "Analog-only input (ANA; TT_a option, supplied by VDDA) with ADC12_INP1 input."+      },+      {+        "number": "P4",+        "name": "PH4",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and analog options (FT_fa); alternate functions include I2C2_SCL, LCD_G5, OTG_HS_ULPI_NXT, PSSI_D14 and LCD_G4; analog inputs ADC3_INN14 and ADC3_INP15."+      },+      {+        "number": "P5",+        "name": "PA4",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include D1PWREN, TIM5_ETR, SPI1_NSS (boot)/I2S1_WS, SPI3_NSS/I2S3_WS, USART2_CK and FMC_D8/FMC_AD8; analog input ADC12_INP18 and DAC1_OUT1."+      },+      {+        "number": "P6",+        "name": "PA5",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include D2PWREN, TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK (boot)/I2S1_CK, OTG_HS_ULPI_CK and FMC_D9/FMC_AD9; analog inputs ADC12_INN18, ADC12_INP19 and DAC1_OUT2."+      },+      {+        "number": "P7",+        "name": "PB2",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O with analog option (FT_ha); alternate functions include RTC_OUT, SAI4_D1, SAI1_D1, DFSDM1_CKIN1, SPI3_MOSI/I2S3_SDO, OCTOSPIM_P1_CLK and ETH_TX_ER; additional function COMP1_INP."+      },+      {+        "number": "P8",+        "name": "PG0",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include OCTOSPIM_P2_IO4, UART9_RX and FMC_A10."+      },+      {+        "number": "P9",+        "name": "PE7",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_ETR, DFSDM1_DATIN2, UART7_RX, OCTOSPIM_P1_IO4 and FMC_D4/FMC_AD4; additional functions OPAMP2_VOUT and COMP2_INM."+      },+      {+        "number": "P10",+        "name": "PB11",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ option (FT_f); alternate functions include TIM2_CH4, LPTIM2_ETR, I2C2_SDA, DFSDM1_CKIN7, USART3_RX (boot), OTG_HS_ULPI_D4 and ETH_MII_TX_EN/ETH_RMII_TX_EN."+      },+      {+        "number": "P11",+        "name": "PF12",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P2_DQS, FMC_A6 and TIM24_CH2; analog inputs ADC1_INN2 and ADC1_INP6."+      },+      {+        "number": "P12",+        "name": "PE12",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH3N, DFSDM1_DATIN5, SPI4_SCK (boot), SAI4_SCK_B, FMC_D9/FMC_AD9, COMP1_OUT and LCD_B4."+      },+      {+        "number": "P13",+        "name": "PE13",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH3, DFSDM1_CKIN5, SPI4_MISO (boot), SAI4_FS_B, FMC_D10/FMC_AD10, COMP2_OUT and LCD_DE."+      },+      {+        "number": "P14",+        "name": "PE15",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_BKIN, USART10_CK, FMC_D12/FMC_AD12, TIM1_BKIN_COMP12 and LCD_R7."+      },+      {+        "number": "P15",+        "name": "PH6",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM12_CH1, I2C2_SMBA, SPI5_SCK, ETH_MII_RXD2, FMC_SDNE1 and DCMI_D8/PSSI_D8."+      },+      {+        "number": "R1",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "R2",+        "name": "PA2",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM2_CH3, TIM5_CH3, LPTIM4_OUT, TIM15_CH1, OCTOSPIM_P1_IO0, USART2_TX (boot), ETH_MDIO and LCD_R1; analog input ADC12_INP14 and wake-up WKUP2."+      },+      {+        "number": "R3",+        "name": "PA0_C",+        "type": "input",+        "description": "Analog-only input (ANA; TT_a option, supplied by VDDA) with ADC12_INN1 and ADC12_INP0 inputs."+      },+      {+        "number": "R4",+        "name": "PH3",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P1_IO5, SAI4_MCLK_B, ETH_MII_COL, FMC_SDNE0 and LCD_R1; analog inputs ADC3_INN13 and ADC3_INP14."+      },+      {+        "number": "R5",+        "name": "PH5",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and analog options (FT_fha); alternate functions include I2C2_SDA, SPI5_NSS, FMC_SDNWE and EVENTOUT; analog inputs ADC3_INN15 and ADC3_INP16."+      },+      {+        "number": "R6",+        "name": "PC4",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include PWR_DEEPSLEEP, FMC_A22, DFSDM1_CKIN2, I2S1_MCK, SPDIFRX1_IN3, ETH_MII_RXD0 and LCD_R7; analog input ADC12_INP4, OPAMP1_VOUT and COMP1_INM."+      },+      {+        "number": "R7",+        "name": "PA6",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO (boot)/I2S1_SDI, SPI6_MISO/I2S6_SDI and TIM13_CH1; analog input ADC12_INP3."+      },+      {+        "number": "R8",+        "name": "PB0",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH2N, TIM3_CH3, TIM8_CH2N, OCTOSPIM_P1_IO1, UART4_CTS, OTG_HS_ULPI_D1 and ETH_MII_RXD2; analog inputs ADC12_INN5, ADC12_INP9, OPAMP1_VINP and COMP1_INP."+      },+      {+        "number": "R9",+        "name": "PE10",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH2N, DFSDM1_DATIN4, UART7_CTS, OCTOSPIM_P1_IO7 and FMC_D7/FMC_AD7; additional function COMP2_INM."+      },+      {+        "number": "R10",+        "name": "PF14",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and analog options (FT_fha); alternate functions include DFSDM1_CKIN6, I2C4_SCL, FMC_A8 and TIM24_CH4; analog inputs ADC2_INN2 and ADC2_INP6."+      },+      {+        "number": "R11",+        "name": "PE9",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH1, DFSDM1_CKOUT, UART7_RTS/UART7_DE, OCTOSPIM_P1_IO6 and FMC_D6/FMC_AD6; additional functions OPAMP2_VINP and COMP2_INP."+      },+      {+        "number": "R12",+        "name": "PE11",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O with analog option (FT_ha); alternate functions include TIM1_CH2, DFSDM1_CKIN4, SPI4_NSS (boot), SAI4_SD_B, OCTOSPIM_P1_NCS, FMC_D8/FMC_AD8 and LCD_G3; additional function COMP2_INP."+      },+      {+        "number": "R13",+        "name": "VCAP",+        "type": "power_in",+        "description": "Connection for the external VCORE decoupling capacitor (CEXT) of the internal regulator."+      },+      {+        "number": "R14",+        "name": "VDDLDO",+        "type": "power_in",+        "description": "Supply for the internal LDO regulator; VDDLDO must not exceed VDD, with a range of 1.62 V to 3.6 V."+      },+      {+        "number": "R15",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: Package selection: UFBGA176+25 (201 balls) is the only UFBGA variant with 201 balls and matches the ; Ballout figure text (Figure 11, p. 62) is garbled in the extracted text. Ball positions were taken f; Pins listed in Table 8 only for other packages (PJ8-PJ11, PK0-PK2, PI-series absent) show '-' in the"+        ],+        "pages_sent": 107,+        "cost_usd": 1.0216,+        "at": "2026-10-11T21:02:31"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886234986909696",+        "pages": 273,+        "sha256": "e2d4e6686c530a98",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 201,+        "described": 201,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "stm32h725igk6.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          10.0,+          10.0,+          0.758+        ],+        "zmin_mm": -0.008,+        "centre_offset_mm": 0.0,+        "footprint_binding": "identity",+        "sha256": "288ab6cc561097620c594322e6b0261cbf9a43d367b9019bebb555d8102764b4",+        "checked": "2026-10-11",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "stm32h725igk6-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          10.0,+          10.0,+          0.758+        ],+        "zmin_mm": -0.008,+        "centre_offset_mm": 0.0,+        "footprint_binding": "identity",+        "sha256": "72b33263dec3e40f7f77d59f84492b303f4b322411e97e4f2e90dfdfc48fe585",+        "checked": "2026-10-11",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  }+}
page.jsonadded+1357
@@ -0,0 +1,1357 @@+{+  "slug": "stm32h725igk6",+  "version": "0.1.0",+  "type": "component",+  "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFBGA-201. Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "embedded processors & controllers",+    "stm32h725igk6",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "stm32h725igk6.kicad_sym",+    "stm32h725igk6.kicad_mod",+    "stm32h725igk6.glb",+    "stm32h725igk6.step",+    "stm32h725igk6.lbr",+    "docs/hero.png",+    "docs/stm32h725igk6-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "stm32h725igk6-hero.glb",+    "stm32h725igk6-hero.overlay.json"+  ],+  "component": {+    "mpn": "STM32H725IGK6",+    "manufacturer": "STMicroelectronics",+    "package": "UFBGA-201",+    "pin_count": 201,+    "category": "Embedded Processors & Controllers",+    "subcategory": "Microcontrollers (MCU/MPU/SOC)",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886234986909696",+    "parts": {+      "symbol": "stm32h725igk6.kicad_sym",+      "footprint": "stm32h725igk6.kicad_mod",+      "model_3d": "stm32h725igk6-hero.glb",+      "model_3d_plain": "stm32h725igk6.glb",+      "model_3d_step": "stm32h725igk6-etched.step",+      "model_3d_step_plain": "stm32h725igk6.step",+      "lbr": "stm32h725igk6.lbr"+    },+    "distributor_links": {+      "lcsc": "C730151",+      "digikey": "497-STM32H725IGK6-ND",+      "mouser": "511-STM32H725IGK6"+    },+    "distributor_check": {+      "checked_at": "2026-10-11T21:02:46Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "497-STM32H725IGK6-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "511-STM32H725IGK6",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "A1",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "A2",+        "name": "PB8",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ option and high-speed low-voltage option (FT_fh); alternate functions include TIM16_CH1, I2C1_SCL, SDMMC1_CKIN, FDCAN1_RX, SDMMC2_D4 and DCMI_D6/PSSI_D6."+      },+      {+        "number": "A3",+        "name": "VDDLDO",+        "type": "power_in",+        "description": "Supply for the internal LDO regulator; VDDLDO must not exceed VDD, with a range of 1.62 V to 3.6 V."+      },+      {+        "number": "A4",+        "name": "VCAP",+        "type": "power_in",+        "description": "Connection for the external VCORE decoupling capacitor (CEXT) of the internal regulator."+      },+      {+        "number": "A5",+        "name": "PB6",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM16_CH1N, TIM4_CH1, I2C1_SCL (boot), USART1_TX, FDCAN2_TX and FMC_SDNE1."+      },+      {+        "number": "A6",+        "name": "PB3",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); default function JTDO/TRACESWO, with alternate functions TIM2_CH2, SPI1_SCK/I2S1_CK, SDMMC2_D2 and UART7_RX."+      },+      {+        "number": "A7",+        "name": "PG11",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM1_IN2, USART10_RX, SPI1_SCK/I2S1_CK, SPDIFRX1_IN1, SDMMC2_D2 and DCMI_D3/PSSI_D3."+      },+      {+        "number": "A8",+        "name": "PG9",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include FDCAN3_TX, SPI1_MISO/I2S1_SDI, USART6_RX, SDMMC2_D0, FMC_NE2/FMC_NCE and DCMI_VSYNC/PSSI_RDY."+      },+      {+        "number": "A9",+        "name": "PD3",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_CKOUT, SPI2_SCK/I2S2_CK, USART2_CTS/USART2_NSS, FMC_CLK and DCMI_D5/PSSI_D5."+      },+      {+        "number": "A10",+        "name": "PD1",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_DATIN6, UART4_TX, FDCAN1_TX (boot) and FMC_D3/FMC_AD3."+      },+      {+        "number": "A11",+        "name": "PA15",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O (FT); default function JTDI, with alternate functions including TIM2_CH1/TIM2_ETR, CEC, SPI1_NSS/I2S1_WS, UART4_RTS/UART4_DE and LCD_R3."+      },+      {+        "number": "A12",+        "name": "PA14",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O (FT); default function JTCK/SWCLK debug pin."+      },+      {+        "number": "A13",+        "name": "VDDLDO",+        "type": "power_in",+        "description": "Supply for the internal LDO regulator; VDDLDO must not exceed VDD, with a range of 1.62 V to 3.6 V."+      },+      {+        "number": "A14",+        "name": "VCAP",+        "type": "power_in",+        "description": "Connection for the external VCORE decoupling capacitor (CEXT) of the internal regulator."+      },+      {+        "number": "A15",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "B1",+        "name": "PE4",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED1, SAI1_D2, DFSDM1_DATIN3, SPI4_NSS, FMC_A20 and DCMI_D4/PSSI_D4."+      },+      {+        "number": "B2",+        "name": "PE3",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED0, TIM15_BKIN, SAI1_SD_B, USART10_TX and FMC_A19."+      },+      {+        "number": "B3",+        "name": "PB9",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM17_CH1, I2C1_SDA (boot), SPI2_NSS/I2S2_WS, UART4_TX, FDCAN1_TX and DCMI_D7/PSSI_D7."+      },+      {+        "number": "B4",+        "name": "PE0",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM1_ETR, TIM4_ETR, UART8_RX, SAI4_MCLK_A, FMC_NBL0 and DCMI_D2/PSSI_D2."+      },+      {+        "number": "B5",+        "name": "PB7",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and analog options (FT_fa); alternate functions include TIM17_CH1N, TIM4_CH2, I2C1_SDA, USART1_RX, FMC_NL; additional function PVD_IN."+      },+      {+        "number": "B6",+        "name": "PB4",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); default function NJTRST, with alternate functions TIM16_BKIN, TIM3_CH1, SPI1_MISO/I2S1_SDI, SPI2_NSS/I2S2_WS and UART7_TX."+      },+      {+        "number": "B7",+        "name": "PG13",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED0, LPTIM1_OUT, USART10_CTS/USART10_NSS, SPI6_SCK/I2S6_CK, USART6_CTS, ETH_MII_TXD0 and FMC_A24."+      },+      {+        "number": "B8",+        "name": "PD7",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_DATIN4, SPI1_MOSI/I2S1_SDO, USART2_CK, OCTOSPIM_P1_IO7, SDMMC2_CMD and FMC_NE1."+      },+      {+        "number": "B9",+        "name": "PD5",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include USART2_TX, OCTOSPIM_P1_IO5 and FMC_NWE."+      },+      {+        "number": "B10",+        "name": "PD2",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED2, FMC_D7/FMC_AD7, TIM3_ETR, TIM15_BKIN, UART5_RX, SDMMC1_CMD and DCMI_D11/PSSI_D11."+      },+      {+        "number": "B11",+        "name": "PC12",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED3, FMC_D6/FMC_AD6, TIM15_CH1, SPI6_SCK/I2S6_CK, USART3_CK, UART5_TX, SDMMC1_CK and DCMI_D9/PSSI_D9."+      },+      {+        "number": "B12",+        "name": "PH14",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_CH2N, UART4_RX, FDCAN1_RX (boot), FMC_D22, DCMI_D4/PSSI_D4 and LCD_G3."+      },+      {+        "number": "B13",+        "name": "PA13",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O (FT); default function JTMS/SWDIO debug pin."+      },+      {+        "number": "B14",+        "name": "PA8",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include MCO1, TIM1_CH1, TIM8_BKIN2, I2C3_SCL (boot), USART1_CK, OTG_HS_SOF and UART7_RX."+      },+      {+        "number": "B15",+        "name": "PA12",+        "type": "bidirectional",+        "description": "USB-option 5 V-tolerant I/O (FT_u, supplied by VDD33USB); alternate functions include TIM1_ETR, LPUART1_RTS/LPUART1_DE, SPI2_SCK/I2S2_CK, UART4_TX, USART1_RTS/USART1_DE, SAI4_FS_B and FDCAN1_TX; additional function OTG_HS_DP (boot)."+      },+      {+        "number": "C1",+        "name": "PC13",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O (FT) with additional functions RTC_TAMP1/RTC_TS and WKUP4 and EVENTOUT."+      },+      {+        "number": "C2",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "C3",+        "name": "PE2",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACECLK, SAI1_CK1, USART10_RX, SPI4_SCK, OCTOSPIM_P1_IO2 and FMC_A23."+      },+      {+        "number": "C4",+        "name": "PE1",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM1_IN2, UART8_TX, FMC_NBL1, DCMI_D3/PSSI_D3 and LCD_R6."+      },+      {+        "number": "C5",+        "name": "BOOT0",+        "type": "input",+        "description": "Dedicated BOOT0 pin used to select the boot mode; its input voltage range is 0 to 9 V (Table 13), with a maximum of 9.0 V (Table 10)."+      },+      {+        "number": "C6",+        "name": "PB5",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM17_BKIN, TIM3_CH2, LCD_B5, I2C1_SMBA, SPI1_MOSI/I2S1_SDO, FDCAN2_RX, FMC_SDCKE1 and UART5_RX."+      },+      {+        "number": "C7",+        "name": "PG14",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED1, LPTIM1_ETR, USART10_RTS/USART10_DE, SPI6_MOSI/I2S6_SDO, USART6_TX, FMC_A25 and TIM23_CH3."+      },+      {+        "number": "C8",+        "name": "PG10",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include FDCAN3_RX, OCTOSPIM_P2_IO6, SPI1_NSS/I2S1_WS, LCD_G3, SAI4_SD_B, SDMMC2_D1, FMC_NE3 and DCMI_D2/PSSI_D2."+      },+      {+        "number": "C9",+        "name": "PD4",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include USART2_RTS/USART2_DE, OCTOSPIM_P1_IO4 and FMC_NOE."+      },+      {+        "number": "C10",+        "name": "PD0",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_CKIN6, UART4_RX, FDCAN1_RX (boot), UART9_CTS, FMC_D2/FMC_AD2 and LCD_B1."+      },+      {+        "number": "C11",+        "name": "PC11",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include DFSDM1_DATIN5, I2C5_SCL, SPI3_MISO (boot)/I2S3_SDI, USART3_RX, UART4_RX, OCTOSPIM_P1_NCS, SDMMC1_D3 and DCMI_D4/PSSI_D4."+      },+      {+        "number": "C12",+        "name": "PC10",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include DFSDM1_CKIN5, I2C5_SDA, SPI3_SCK (boot)/I2S3_CK, USART3_TX, UART4_TX, OCTOSPIM_P1_IO1, SDMMC1_D2 and DCMI_D8/PSSI_D8."+      },+      {+        "number": "C13",+        "name": "PH13",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_CH1N, UART4_TX, FDCAN1_TX (boot), FMC_D21 and LCD_G2."+      },+      {+        "number": "C14",+        "name": "PA10",+        "type": "bidirectional",+        "description": "USB-option 5 V-tolerant I/O (FT_u, supplied by VDD33USB); alternate functions include TIM1_CH3, LPUART1_RX, USART1_RX (boot), OTG_HS_ID, MDIOS_MDIO, LCD_B4 and DCMI_D1/PSSI_D1."+      },+      {+        "number": "C15",+        "name": "PA11",+        "type": "bidirectional",+        "description": "USB-option 5 V-tolerant I/O (FT_u, supplied by VDD33USB); alternate functions include TIM1_CH4, LPUART1_CTS, SPI2_NSS/I2S2_WS, UART4_RX, USART1_CTS/USART1_NSS and FDCAN1_RX; additional function OTG_HS_DM (boot)."+      },+      {+        "number": "D1",+        "name": "PC15-OSC32_OUT",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O (FT) whose additional function OSC32_OUT is the output of the 32.768 kHz LSE oscillator."+      },+      {+        "number": "D2",+        "name": "PC14-OSC32_IN",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O (FT) whose additional function OSC32_IN is the input of the 32.768 kHz LSE oscillator."+      },+      {+        "number": "D3",+        "name": "PE5",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED2, SAI1_CK2, DFSDM1_CKIN3, TIM15_CH1, SPI4_MISO, FMC_A21 and DCMI_D6/PSSI_D6."+      },+      {+        "number": "D4",+        "name": "PDR_ON",+        "type": "power_in",+        "description": "Controls the power-down reset (PDR): the PDR can only be switched OFF through this pin, which is not available in all packages; listed as a supply (S) in Table 8."+      },+      {+        "number": "D5",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "D6",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "D7",+        "name": "PG15",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include USART6_CTS/USART6_NSS, OCTOSPIM_P2_DQS, USART10_CK, FMC_NCAS and DCMI_D13/PSSI_D13."+      },+      {+        "number": "D8",+        "name": "PG12",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM1_IN1, OCTOSPIM_P2_NCS, USART10_TX, SPI6_MISO/I2S6_SDI, SDMMC2_D3, FMC_NE4 and TIM23_CH1."+      },+      {+        "number": "D9",+        "name": "PD6",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include SAI4_D1, SAI1_D1, DFSDM1_CKIN4, SPI3_MOSI/I2S3_SDO, USART2_RX, OCTOSPIM_P1_IO6, SDMMC2_CK, FMC_NWAIT and DCMI_D10/PSSI_D10."+      },+      {+        "number": "D10",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "D11",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "D12",+        "name": "PH15",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_CH3N, FMC_D23, DCMI_D11/PSSI_D11 and LCD_G4."+      },+      {+        "number": "D13",+        "name": "PA9",+        "type": "bidirectional",+        "description": "USB-option 5 V-tolerant I/O (FT_u, supplied by VDD33USB); alternate functions include TIM1_CH2, LPUART1_TX, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX (boot), ETH_TX_ER and DCMI_D0/PSSI_D0; additional function OTG_HS_VBUS."+      },+      {+        "number": "D14",+        "name": "PC8",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED1, TIM3_CH3, TIM8_CH3, USART6_CK, UART5_RTS/UART5_DE, FMC_NE2/FMC_NCE, FMC_INT, SWPMI_RX and SDMMC1_D0."+      },+      {+        "number": "D15",+        "name": "PC7",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DBTRGIO, TIM3_CH2, TIM8_CH2, DFSDM1_DATIN3, I2S3_MCK, USART6_RX, FMC_NE1 and SWPMI_TX."+      },+      {+        "number": "E1",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "E2",+        "name": "VBAT",+        "type": "power_in",+        "description": "Backup-domain supply for the RTC, 32 x 32-bit backup registers and backup SRAM; absolute maximum rating −0.3 V to 4.0 V (Table 10)."+      },+      {+        "number": "E3",+        "name": "PE6",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TRACED3, TIM1_BKIN2, SAI1_D1, TIM15_CH2, SPI4_MOSI, FMC_A22 and DCMI_D7/PSSI_D7."+      },+      {+        "number": "E4",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "E12",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "E13",+        "name": "PC9",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA (boot), I2C5_SDA, UART5_CTS, OCTOSPIM_P1_IO0, SWPMI_SUSPEND and SDMMC1_D1."+      },+      {+        "number": "E14",+        "name": "PC6",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM3_CH1, TIM8_CH1, DFSDM1_CKIN3, I2S2_MCK, USART6_TX, SDMMC1_D0DIR, FMC_NWAIT, SDMMC2_D6 and DCMI_D0/PSSI_D0."+      },+      {+        "number": "E15",+        "name": "VDD50USB",+        "type": "power_in",+        "description": "USB regulator supply input; 4 V to 5.5 V when the USB regulator is ON (Table 13)."+      },+      {+        "number": "F1",+        "name": "VLXSMPS",+        "type": "power_in",+        "description": "Switching node (LX) of the internal SMPS step-down converter; listed as a supply (S) in Table 8."+      },+      {+        "number": "F2",+        "name": "VSSSMPS",+        "type": "power_in",+        "description": "Ground for the internal SMPS step-down converter."+      },+      {+        "number": "F3",+        "name": "PF1",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include I2C2_SCL (boot), I2C5_SCL, OCTOSPIM_P2_IO1, FMC_A1 and TIM23_CH2."+      },+      {+        "number": "F4",+        "name": "PF0",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include I2C2_SDA (boot), I2C5_SDA, OCTOSPIM_P2_IO0, FMC_A0 and TIM23_CH1."+      },+      {+        "number": "F6",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "F7",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "F8",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "F9",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "F10",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "F12",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "F13",+        "name": "VDD33USB",+        "type": "power_in",+        "description": "USB domain supply; 3.0 V to 3.6 V when USB is used, and 0 to 3.6 V when USB is not used (Table 13)."+      },+      {+        "number": "F14",+        "name": "PG6",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM17_BKIN, OCTOSPIM_P1_NCS, FMC_NE3, DCMI_D12/PSSI_D12 and LCD_R7."+      },+      {+        "number": "F15",+        "name": "PG5",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_ETR and FMC_A15/FMC_BA1."+      },+      {+        "number": "G1",+        "name": "VDDSMPS",+        "type": "power_in",+        "description": "Supply for the internal SMPS step-down converter; VDDSMPS = VDD, with a range of 1.62 V to 3.6 V (Table 13)."+      },+      {+        "number": "G2",+        "name": "VFBSMPS",+        "type": "power_in",+        "description": "Feedback pin of the internal SMPS step-down converter; listed as a supply (S) in Table 8."+      },+      {+        "number": "G3",+        "name": "PF2",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include I2C2_SMBA, I2C5_SMBA, OCTOSPIM_P2_IO2, FMC_A2 and TIM23_CH3."+      },+      {+        "number": "G4",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "G6",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "G7",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "G8",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "G9",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "G10",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "G12",+        "name": "PG8",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_ETR, SPI6_NSS/I2S6_WS, USART6_RTS/USART6_DE, SPDIFRX1_IN3, ETH_PPS_OUT, FMC_SDCLK and LCD_G7."+      },+      {+        "number": "G13",+        "name": "PG7",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include SAI1_MCLK_A, USART6_CK, OCTOSPIM_P2_DQS, FMC_INT, DCMI_D13/PSSI_D13 and LCD_CLK."+      },+      {+        "number": "G14",+        "name": "PG4",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_BKIN2, TIM1_BKIN2_COMP12 and FMC_A14/FMC_BA0."+      },+      {+        "number": "G15",+        "name": "PG2",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_BKIN, TIM8_BKIN_COMP12, FMC_A12 and TIM24_ETR."+      },+      {+        "number": "H1",+        "name": "PF6",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM16_CH1, FDCAN3_RX, SPI5_NSS, SAI1_SD_B, UART7_RX and TIM23_CH1; analog inputs ADC3_INN4 and ADC3_INP8."+      },+      {+        "number": "H2",+        "name": "PF4",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P2_CLK and FMC_A4; analog inputs ADC3_INN5 and ADC3_INP9."+      },+      {+        "number": "H3",+        "name": "PF5",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P2_NCLK and FMC_A5; analog input ADC3_INP4."+      },+      {+        "number": "H4",+        "name": "PF3",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P2_IO3, FMC_A3 and TIM23_CH4; analog input ADC3_INP5."+      },+      {+        "number": "H6",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "H7",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "H8",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "H9",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "H10",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "H12",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "H13",+        "name": "PG3",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM8_BKIN2, TIM8_BKIN2_COMP12, FMC_A13 and TIM23_ETR."+      },+      {+        "number": "H14",+        "name": "PD14",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM4_CH3, UART8_CTS, UART9_RX and FMC_D0/FMC_AD0."+      },+      {+        "number": "H15",+        "name": "PD13",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include LPTIM1_OUT, TIM4_CH2, I2C4_SDA, FDCAN3_TX, OCTOSPIM_P1_IO3, FMC_A18 and DCMI_D13/PSSI_D13."+      },+      {+        "number": "J1",+        "name": "PH0-OSC_IN",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O (FT) whose additional function OSC_IN is the input of the 4-50 MHz HSE oscillator."+      },+      {+        "number": "J2",+        "name": "PF8",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM16_CH1N, SPI5_MISO, SAI1_SCK_B, UART7_RTS/UART7_DE and TIM23_CH3; analog inputs ADC3_INN3 and ADC3_INP7."+      },+      {+        "number": "J3",+        "name": "PF7",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM17_CH1, FDCAN3_TX, SPI5_SCK, UART7_TX and TIM23_CH2; analog input ADC3_INP3."+      },+      {+        "number": "J4",+        "name": "PF9",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM17_CH1N, SPI5_MOSI, SAI1_FS_B, UART7_CTS and TIM23_CH4; analog input ADC3_INP2."+      },+      {+        "number": "J6",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "J7",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "J8",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "J9",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "J10",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "J12",+        "name": "PD15",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM4_CH4, UART8_RTS/UART8_DE, UART9_TX and FMC_D1/FMC_AD1."+      },+      {+        "number": "J13",+        "name": "PD11",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include LPTIM2_IN2, I2C4_SMBA, USART3_CTS/USART3_NSS, OCTOSPIM_P1_IO0, SAI4_SD_A and FMC_A16/FMC_CLE."+      },+      {+        "number": "J14",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "J15",+        "name": "PD12",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include LPTIM1_IN1, TIM4_CH1, LPTIM2_IN1, I2C4_SCL, FDCAN3_RX, USART3_RTS/USART3_DE, FMC_A17/FMC_ALE and DCMI_D12/PSSI_D12."+      },+      {+        "number": "K1",+        "name": "PH1-OSC_OUT",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O (FT) whose additional function OSC_OUT is the output of the 4-50 MHz HSE oscillator."+      },+      {+        "number": "K2",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "K3",+        "name": "PF10",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM16_BKIN, SAI1_D3, PSSI_D15, OCTOSPIM_P1_CLK, DCMI_D11/PSSI_D11 and LCD_DE; analog inputs ADC3_INN2 and ADC3_INP6."+      },+      {+        "number": "K4",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "K6",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "K7",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "K8",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "K9",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "K10",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "K12",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "K13",+        "name": "PD9",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_DATIN3, USART3_RX (boot) and FMC_D14/FMC_AD14."+      },+      {+        "number": "K14",+        "name": "PB15",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include RTC_REFIN, TIM1_CH3N, TIM12_CH2, TIM8_CH3N, USART1_RX, SPI2_MOSI/I2S2_SDO, SDMMC2_D1 and FMC_D11/FMC_AD11."+      },+      {+        "number": "K15",+        "name": "PB14",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH2N, TIM12_CH1, USART1_TX, SPI2_MISO/I2S2_SDI, USART3_RTS/USART3_DE, SDMMC2_D0 and FMC_D10/FMC_AD10."+      },+      {+        "number": "L1",+        "name": "NRST",+        "type": "bidirectional",+        "description": "Bidirectional reset pin with embedded weak pull-up resistor (RST I/O structure)."+      },+      {+        "number": "L2",+        "name": "PC0",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O with analog option (FT_ha); alternate functions include FMC_D12/FMC_AD12, DFSDM1_CKIN0, OTG_HS_ULPI_STP, FMC_SDNWE and LCD_R5; analog input ADC123_INP10."+      },+      {+        "number": "L3",+        "name": "PC1",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O with analog option (FT_ha); alternate functions include TRACED0, SAI1_D1, SPI2_MOSI/I2S2_SDO, ETH_MDC, MDIOS_MDC and LCD_G5; analog inputs ADC123_INN10 and ADC123_INP11, plus RTC_TAMP3 and WKUP6."+      },+      {+        "number": "L4",+        "name": "VREF-",+        "type": "power_in",+        "description": "Negative reference voltage pin, connected to VSSA in the power supply scheme (Figure 14)."+      },+      {+        "number": "L12",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "L13",+        "name": "PD10",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_CKOUT, USART3_CK, FMC_D15/FMC_AD15 and LCD_B3."+      },+      {+        "number": "L14",+        "name": "PD8",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include DFSDM1_CKIN3, USART3_TX (boot), SPDIFRX1_IN2 and FMC_D13/FMC_AD13."+      },+      {+        "number": "L15",+        "name": "PB13",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH1N, LPTIM2_OUT, OCTOSPIM_P1_IO2, SPI2_SCK/I2S2_CK, USART3_CTS/USART3_NSS, FDCAN2_TX, SDMMC1_D0 and UART5_TX."+      },+      {+        "number": "M1",+        "name": "PC2",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_a); alternate functions include PWR_DEEPSLEEP, DFSDM1_CKIN1, OCTOSPIM_P1_IO5, SPI2_MISO/I2S2_SDI, OTG_HS_ULPI_DIR and FMC_SDNE0; analog inputs ADC123_INN11 and ADC123_INP12."+      },+      {+        "number": "M2",+        "name": "PC3",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_a); alternate functions include PWR_SLEEP, DFSDM1_DATIN1, OCTOSPIM_P1_IO6, SPI2_MOSI/I2S2_SDO, OTG_HS_ULPI_NXT and FMC_SDCKE0; analog inputs ADC12_INN12 and ADC12_INP13."+      },+      {+        "number": "M3",+        "name": "VREF+",+        "type": "power_in",+        "description": "Positive reference voltage pin; may be connected to VDDA or kept separate, as shown in the decoupling examples (Figures 48 and 49)."+      },+      {+        "number": "M4",+        "name": "VDDA",+        "type": "power_in",+        "description": "Analog supply: 1.62 V to 3.6 V when the ADC or COMP is used, 1.8 V minimum when the DAC or VREFBUF is used, and 2.0 V minimum when the OPAMP is used (Table 13)."+      },+      {+        "number": "M5",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "M6",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "M7",+        "name": "PC5",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha, TT_ha class); alternate functions include PWR_SLEEP, SAI4_D3, SAI1_D3, DFSDM1_DATIN2, PSSI_D15, SPDIFRX1_IN4, ETH_MII_RXD1 and COMP1_OUT; analog inputs ADC12_INN4, ADC12_INP8 and OPAMP1_VINM."+      },+      {+        "number": "M8",+        "name": "PB1",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_ha); alternate functions include TIM1_CH3N, TIM3_CH4, TIM8_CH3N, OCTOSPIM_P1_IO0, DFSDM1_DATIN1, OTG_HS_ULPI_D2 and LCD_G0; analog input ADC12_INP5 and COMP1_INM."+      },+      {+        "number": "M9",+        "name": "VDD",+        "type": "power_in",+        "description": "Standard operating supply pin; standard operating voltage 1.62 V to 3.6 V (Table 13), with variation between VDD pins of the same domain limited to 50 mV."+      },+      {+        "number": "M10",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "M11",+        "name": "PH7",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include I2C3_SCL, SPI5_MISO, ETH_MII_RXD3, FMC_SDCKE1 and DCMI_D9/PSSI_D9."+      },+      {+        "number": "M12",+        "name": "PE14",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH4, SPI4_MOSI (boot), SAI4_MCLK_B, FMC_D11/FMC_AD11 and LCD_CLK."+      },+      {+        "number": "M13",+        "name": "PH11",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM5_CH2, I2C4_SCL, FMC_D19, DCMI_D2/PSSI_D2 and LCD_R5."+      },+      {+        "number": "M14",+        "name": "PH9",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM12_CH2, I2C3_SMBA, FMC_D17, DCMI_D0/PSSI_D0 and LCD_R3."+      },+      {+        "number": "M15",+        "name": "PB12",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_BKIN, OCTOSPIM_P1_NCLK, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, FDCAN2_RX and ETH_MII_TXD0/ETH_RMII_TXD0."+      },+      {+        "number": "N1",+        "name": "PC2_C",+        "type": "input",+        "description": "Analog-only input (ANA; TT_a option, supplied by VDDA) with ADC3_INN1 and ADC3_INP0 inputs."+      },+      {+        "number": "N2",+        "name": "PC3_C",+        "type": "input",+        "description": "Analog-only input (ANA; TT_a option, supplied by VDDA) with ADC3_INP1 input."+      },+      {+        "number": "N3",+        "name": "VSSA",+        "type": "power_in",+        "description": "Analog ground for the ADC, DAC, OPAMP, COMP and VREFBUF blocks."+      },+      {+        "number": "N4",+        "name": "PH2",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include LPTIM1_IN2, OCTOSPIM_P1_IO4, SAI4_SCK_B, ETH_MII_CRS, FMC_SDCKE0 and LCD_R0; analog input ADC3_INP13."+      },+      {+        "number": "N5",+        "name": "PA3",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM2_CH4, TIM5_CH4, LPTIM5_OUT, TIM15_CH2, I2S6_MCK, OCTOSPIM_P1_IO2, USART2_RX (boot), OTG_HS_ULPI_D0 and ETH_MII_COL; analog input ADC12_INP15."+      },+      {+        "number": "N6",+        "name": "PA7",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI (boot)/I2S1_SDO, TIM14_CH1, ETH_MII_RX_DV and FMC_SDNWE; analog inputs ADC12_INN3, ADC12_INP7 and OPAMP1_VINM."+      },+      {+        "number": "N7",+        "name": "PF11",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include SPI5_MOSI, OCTOSPIM_P1_NCLK, SAI4_SD_B, FMC_NRAS, DCMI_D12/PSSI_D12 and TIM24_CH1; analog input ADC1_INP2."+      },+      {+        "number": "N8",+        "name": "PE8",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH1N, DFSDM1_CKIN2, UART7_TX, OCTOSPIM_P1_IO5, FMC_D5/FMC_AD5 and COMP2_OUT; analog input OPAMP2_VINM."+      },+      {+        "number": "N9",+        "name": "PG1",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O (TT_h); alternate functions include OCTOSPIM_P2_IO5, UART9_TX and FMC_A11; additional function OPAMP2_VINM."+      },+      {+        "number": "N10",+        "name": "PF15",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include I2C4_SDA and FMC_A9."+      },+      {+        "number": "N11",+        "name": "PF13",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include DFSDM1_DATIN6, I2C4_SMBA, FMC_A7 and TIM24_CH3; analog input ADC2_INP2."+      },+      {+        "number": "N12",+        "name": "PB10",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM2_CH3, LPTIM2_IN1, I2C2_SCL, SPI2_SCK/I2S2_CK, DFSDM1_DATIN7, USART3_TX (boot), OCTOSPIM_P1_NCS and OTG_HS_ULPI_D3."+      },+      {+        "number": "N13",+        "name": "PH8",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM5_ETR, I2C3_SDA, FMC_D16, DCMI_HSYNC/PSSI_DE and LCD_R2."+      },+      {+        "number": "N14",+        "name": "PH10",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM5_CH1, I2C4_SMBA, FMC_D18, DCMI_D1/PSSI_D1 and LCD_R4."+      },+      {+        "number": "N15",+        "name": "PH12",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and high-speed low-voltage options (FT_fh); alternate functions include TIM5_CH3, I2C4_SDA, FMC_D20, DCMI_D3/PSSI_D3 and LCD_R6."+      },+      {+        "number": "P1",+        "name": "PA0",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX and ETH_MII_CRS; analog input ADC1_INP16 and wake-up WKUP1."+      },+      {+        "number": "P2",+        "name": "PA1",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM2_CH2, TIM5_CH2, LPTIM3_OUT, USART2_RTS/USART2_DE, UART4_RX and ETH_MII_RX_CLK/ETH_RMII_REF_CLK; analog inputs ADC1_INN16 and ADC1_INP17."+      },+      {+        "number": "P3",+        "name": "PA1_C",+        "type": "input",+        "description": "Analog-only input (ANA; TT_a option, supplied by VDDA) with ADC12_INP1 input."+      },+      {+        "number": "P4",+        "name": "PH4",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and analog options (FT_fa); alternate functions include I2C2_SCL, LCD_G5, OTG_HS_ULPI_NXT, PSSI_D14 and LCD_G4; analog inputs ADC3_INN14 and ADC3_INP15."+      },+      {+        "number": "P5",+        "name": "PA4",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include D1PWREN, TIM5_ETR, SPI1_NSS (boot)/I2S1_WS, SPI3_NSS/I2S3_WS, USART2_CK and FMC_D8/FMC_AD8; analog input ADC12_INP18 and DAC1_OUT1."+      },+      {+        "number": "P6",+        "name": "PA5",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include D2PWREN, TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK (boot)/I2S1_CK, OTG_HS_ULPI_CK and FMC_D9/FMC_AD9; analog inputs ADC12_INN18, ADC12_INP19 and DAC1_OUT2."+      },+      {+        "number": "P7",+        "name": "PB2",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O with analog option (FT_ha); alternate functions include RTC_OUT, SAI4_D1, SAI1_D1, DFSDM1_CKIN1, SPI3_MOSI/I2S3_SDO, OCTOSPIM_P1_CLK and ETH_TX_ER; additional function COMP1_INP."+      },+      {+        "number": "P8",+        "name": "PG0",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include OCTOSPIM_P2_IO4, UART9_RX and FMC_A10."+      },+      {+        "number": "P9",+        "name": "PE7",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_ETR, DFSDM1_DATIN2, UART7_RX, OCTOSPIM_P1_IO4 and FMC_D4/FMC_AD4; additional functions OPAMP2_VOUT and COMP2_INM."+      },+      {+        "number": "P10",+        "name": "PB11",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ option (FT_f); alternate functions include TIM2_CH4, LPTIM2_ETR, I2C2_SDA, DFSDM1_CKIN7, USART3_RX (boot), OTG_HS_ULPI_D4 and ETH_MII_TX_EN/ETH_RMII_TX_EN."+      },+      {+        "number": "P11",+        "name": "PF12",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P2_DQS, FMC_A6 and TIM24_CH2; analog inputs ADC1_INN2 and ADC1_INP6."+      },+      {+        "number": "P12",+        "name": "PE12",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH3N, DFSDM1_DATIN5, SPI4_SCK (boot), SAI4_SCK_B, FMC_D9/FMC_AD9, COMP1_OUT and LCD_B4."+      },+      {+        "number": "P13",+        "name": "PE13",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_CH3, DFSDM1_CKIN5, SPI4_MISO (boot), SAI4_FS_B, FMC_D10/FMC_AD10, COMP2_OUT and LCD_DE."+      },+      {+        "number": "P14",+        "name": "PE15",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM1_BKIN, USART10_CK, FMC_D12/FMC_AD12, TIM1_BKIN_COMP12 and LCD_R7."+      },+      {+        "number": "P15",+        "name": "PH6",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O (FT_h); alternate functions include TIM12_CH1, I2C2_SMBA, SPI5_SCK, ETH_MII_RXD2, FMC_SDNE1 and DCMI_D8/PSSI_D8."+      },+      {+        "number": "R1",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      },+      {+        "number": "R2",+        "name": "PA2",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include TIM2_CH3, TIM5_CH3, LPTIM4_OUT, TIM15_CH1, OCTOSPIM_P1_IO0, USART2_TX (boot), ETH_MDIO and LCD_R1; analog input ADC12_INP14 and wake-up WKUP2."+      },+      {+        "number": "R3",+        "name": "PA0_C",+        "type": "input",+        "description": "Analog-only input (ANA; TT_a option, supplied by VDDA) with ADC12_INN1 and ADC12_INP0 inputs."+      },+      {+        "number": "R4",+        "name": "PH3",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with analog option (FT_ha); alternate functions include OCTOSPIM_P1_IO5, SAI4_MCLK_B, ETH_MII_COL, FMC_SDNE0 and LCD_R1; analog inputs ADC3_INN13 and ADC3_INP14."+      },+      {+        "number": "R5",+        "name": "PH5",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and analog options (FT_fha); alternate functions include I2C2_SDA, SPI5_NSS, FMC_SDNWE and EVENTOUT; analog inputs ADC3_INN15 and ADC3_INP16."+      },+      {+        "number": "R6",+        "name": "PC4",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include PWR_DEEPSLEEP, FMC_A22, DFSDM1_CKIN2, I2S1_MCK, SPDIFRX1_IN3, ETH_MII_RXD0 and LCD_R7; analog input ADC12_INP4, OPAMP1_VOUT and COMP1_INM."+      },+      {+        "number": "R7",+        "name": "PA6",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO (boot)/I2S1_SDI, SPI6_MISO/I2S6_SDI and TIM13_CH1; analog input ADC12_INP3."+      },+      {+        "number": "R8",+        "name": "PB0",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH2N, TIM3_CH3, TIM8_CH2N, OCTOSPIM_P1_IO1, UART4_CTS, OTG_HS_ULPI_D1 and ETH_MII_RXD2; analog inputs ADC12_INN5, ADC12_INP9, OPAMP1_VINP and COMP1_INP."+      },+      {+        "number": "R9",+        "name": "PE10",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH2N, DFSDM1_DATIN4, UART7_CTS, OCTOSPIM_P1_IO7 and FMC_D7/FMC_AD7; additional function COMP2_INM."+      },+      {+        "number": "R10",+        "name": "PF14",+        "type": "bidirectional",+        "description": "5 V-tolerant I/O with FM+ and analog options (FT_fha); alternate functions include DFSDM1_CKIN6, I2C4_SCL, FMC_A8 and TIM24_CH4; analog inputs ADC2_INN2 and ADC2_INP6."+      },+      {+        "number": "R11",+        "name": "PE9",+        "type": "bidirectional",+        "description": "3.3 V-tolerant high-speed low-voltage I/O with analog option (TT_ha); alternate functions include TIM1_CH1, DFSDM1_CKOUT, UART7_RTS/UART7_DE, OCTOSPIM_P1_IO6 and FMC_D6/FMC_AD6; additional functions OPAMP2_VINP and COMP2_INP."+      },+      {+        "number": "R12",+        "name": "PE11",+        "type": "bidirectional",+        "description": "5 V-tolerant high-speed low-voltage I/O with analog option (FT_ha); alternate functions include TIM1_CH2, DFSDM1_CKIN4, SPI4_NSS (boot), SAI4_SD_B, OCTOSPIM_P1_NCS, FMC_D8/FMC_AD8 and LCD_G3; additional function COMP2_INP."+      },+      {+        "number": "R13",+        "name": "VCAP",+        "type": "power_in",+        "description": "Connection for the external VCORE decoupling capacitor (CEXT) of the internal regulator."+      },+      {+        "number": "R14",+        "name": "VDDLDO",+        "type": "power_in",+        "description": "Supply for the internal LDO regulator; VDDLDO must not exceed VDD, with a range of 1.62 V to 3.6 V."+      },+      {+        "number": "R15",+        "name": "VSS",+        "type": "power_in",+        "description": "Ground pin; all VSS pins must be connected to the common ground, with variation between ground pins limited to 50 mV."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: Package selection: UFBGA176+25 (201 balls) is the only UFBGA variant with 201 balls and matches the ; Ballout figure text (Figure 11, p. 62) is garbled in the extracted text. Ball positions were taken f; Pins listed in Table 8 only for other packages (PJ8-PJ11, PK0-PK2, PI-series absent) show '-' in the"+        ],+        "pages_sent": 107,+        "cost_usd": 1.0216,+        "at": "2026-10-11T21:02:31"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588886234986909696",+        "pages": 273,+        "sha256": "e2d4e6686c530a98",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 201,+        "described": 201,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "stm32h725igk6.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          10,+          10,+          0.758+        ],+        "zmin_mm": -0.008,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "288ab6cc561097620c594322e6b0261cbf9a43d367b9019bebb555d8102764b4",+        "checked": "2026-10-11",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "stm32h725igk6-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          10,+          10,+          0.758+        ],+        "zmin_mm": -0.008,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "72b33263dec3e40f7f77d59f84492b303f4b322411e97e4f2e90dfdfc48fe585",+        "checked": "2026-10-11",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file
stm32h725igk6-hero.glbadded
⋯ 1 unchanged line ⋯
stm32h725igk6-hero.overlay.jsonadded+2697
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stm32h725igk6.glbadded
⋯ 1 unchanged line ⋯
stm32h725igk6.kicad_modadded+1374
@@ -0,0 +1,1374 @@+(footprint "UFBGA-201_10x10mm_Layout15x15_P0.65mm"+	(version 20260206)+	(generator "kicad-footprint-generator")+	(layer "F.Cu")+	(descr "UFBGA-201, 10.0x10.0mm, 201 Ball, 15x15 Layout, 0.65mm Pitch, http://www.st.com/resource/en/datasheet/stm32f207vg.pdf#page=166")+	(tags "BGA 201 0.65")+	(solder_mask_margin 0.05)+	(solder_paste_margin 0.000001)+	(property "Reference" "REF**"+		(at 0 -6 0)+		(layer "F.SilkS")+		(effects+			(font+				(size 1 1)+				(thickness 0.15)+			)+		)+	)+	(property "Value" "UFBGA-201_10x10mm_Layout15x15_P0.65mm"+		(at 0 6 0)+		(layer "F.Fab")+		(effects+			(font+				(size 1 1)+				(thickness 0.15)+			)+		)+	)+	(property "KiLib_Generator" "package/grid_array"+		(at 0 0 0)+		(layer "F.SilkS")+		(hide yes)+		(effects+			(font+				(size 1 1)+				(thickness 0.15)+			)+		)+	)+	(attr smd)+	(duplicate_pad_numbers_are_jumpers no)+	(fp_line+		(start -5.11 5.11)+		(end -5.11 -4.11)+		(stroke+			(width 0.12)+			(type solid)+		)+		(layer "F.SilkS")+	)+	(fp_line+		(start -4.11 -5.11)+		(end 5.11 -5.11)+		(stroke+			(width 0.12)+			(type solid)+		)+		(layer "F.SilkS")+	)+	(fp_line+		(start 5.11 -5.11)+		(end 5.11 5.11)+		(stroke+			(width 0.12)+			(type solid)+		)+		(layer "F.SilkS")+	)+	(fp_line+		(start 5.11 5.11)+		(end -5.11 5.11)+		(stroke+			(width 0.12)+			(type solid)+		)+		(layer "F.SilkS")+	)+	(fp_poly+		(pts+			(xy -5.11 -5.11)+			(xy -5.61 -5.11)+			(xy -5.11 -5.61)+		)+		(stroke+			(width 0.12)+			(type solid)+		)+		(fill yes)+		(layer "F.SilkS")+	)+	(fp_rect+		(start -6 -6)+		(end 6 6)+		(stroke+			(width 0.05)+			(type solid)+		)+		(fill no)+		(layer "F.CrtYd")+	)+	(fp_line+		(start -5 -4)+		(end -4 -5)+		(stroke+			(width 0.1)+			(type solid)+		)+		(layer "F.Fab")+	)+	(fp_line+		(start -5 5)+		(end -5 -4)+		(stroke+			(width 0.1)+			(type solid)+		)+		(layer "F.Fab")+	)+	(fp_line+		(start -4 -5)+		(end 5 -5)+		(stroke+			(width 0.1)+			(type solid)+		)+		(layer "F.Fab")+	)+	(fp_line+		(start 5 -5)+		(end 5 5)+		(stroke+			(width 0.1)+			(type solid)+		)+		(layer "F.Fab")+	)+	(fp_line+		(start 5 5)+		(end -5 5)+		(stroke+			(width 0.1)+			(type solid)+		)+		(layer "F.Fab")+	)+	(fp_text user "${REFERENCE}"+		(at 0 0 0)+		(layer "F.Fab")+		(effects+			(font+				(size 1 1)+				(thickness 0.15)+			)+		)+	)+	(pad "A1" smd circle+		(at -4.55 -4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "A2" smd circle+		(at -3.9 -4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "A3" smd circle+		(at -3.25 -4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "A4" smd circle+		(at -2.6 -4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "A5" smd circle+		(at -1.95 -4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "A6" smd circle+		(at -1.3 -4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "A7" smd circle+		(at -0.65 -4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "A8" smd circle+		(at 0 -4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "A9" smd circle+		(at 0.65 -4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "A10" smd circle+		(at 1.3 -4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "A11" smd circle+		(at 1.95 -4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "A12" smd circle+		(at 2.6 -4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "A13" smd circle+		(at 3.25 -4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "A14" smd circle+		(at 3.9 -4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "A15" smd circle+		(at 4.55 -4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "B1" smd circle+		(at -4.55 -3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "B2" smd circle+		(at -3.9 -3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "B3" smd circle+		(at -3.25 -3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "B4" smd circle+		(at -2.6 -3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "B5" smd circle+		(at -1.95 -3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "B6" smd circle+		(at -1.3 -3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "B7" smd circle+		(at -0.65 -3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "B8" smd circle+		(at 0 -3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "B9" smd circle+		(at 0.65 -3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "B10" smd circle+		(at 1.3 -3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "B11" smd circle+		(at 1.95 -3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "B12" smd circle+		(at 2.6 -3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "B13" smd circle+		(at 3.25 -3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "B14" smd circle+		(at 3.9 -3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "B15" smd circle+		(at 4.55 -3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "C1" smd circle+		(at -4.55 -3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "C2" smd circle+		(at -3.9 -3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "C3" smd circle+		(at -3.25 -3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "C4" smd circle+		(at -2.6 -3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "C5" smd circle+		(at -1.95 -3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "C6" smd circle+		(at -1.3 -3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "C7" smd circle+		(at -0.65 -3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "C8" smd circle+		(at 0 -3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "C9" smd circle+		(at 0.65 -3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "C10" smd circle+		(at 1.3 -3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "C11" smd circle+		(at 1.95 -3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "C12" smd circle+		(at 2.6 -3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "C13" smd circle+		(at 3.25 -3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "C14" smd circle+		(at 3.9 -3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "C15" smd circle+		(at 4.55 -3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "D1" smd circle+		(at -4.55 -2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "D2" smd circle+		(at -3.9 -2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "D3" smd circle+		(at -3.25 -2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "D4" smd circle+		(at -2.6 -2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "D5" smd circle+		(at -1.95 -2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "D6" smd circle+		(at -1.3 -2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "D7" smd circle+		(at -0.65 -2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "D8" smd circle+		(at 0 -2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "D9" smd circle+		(at 0.65 -2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "D10" smd circle+		(at 1.3 -2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "D11" smd circle+		(at 1.95 -2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "D12" smd circle+		(at 2.6 -2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "D13" smd circle+		(at 3.25 -2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "D14" smd circle+		(at 3.9 -2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "D15" smd circle+		(at 4.55 -2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "E1" smd circle+		(at -4.55 -1.95)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "E2" smd circle+		(at -3.9 -1.95)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "E3" smd circle+		(at -3.25 -1.95)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "E4" smd circle+		(at -2.6 -1.95)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "E12" smd circle+		(at 2.6 -1.95)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "E13" smd circle+		(at 3.25 -1.95)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "E14" smd circle+		(at 3.9 -1.95)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "E15" smd circle+		(at 4.55 -1.95)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "F1" smd circle+		(at -4.55 -1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "F2" smd circle+		(at -3.9 -1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "F3" smd circle+		(at -3.25 -1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "F4" smd circle+		(at -2.6 -1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "F6" smd circle+		(at -1.3 -1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "F7" smd circle+		(at -0.65 -1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "F8" smd circle+		(at 0 -1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "F9" smd circle+		(at 0.65 -1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "F10" smd circle+		(at 1.3 -1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "F12" smd circle+		(at 2.6 -1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "F13" smd circle+		(at 3.25 -1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "F14" smd circle+		(at 3.9 -1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "F15" smd circle+		(at 4.55 -1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "G1" smd circle+		(at -4.55 -0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "G2" smd circle+		(at -3.9 -0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "G3" smd circle+		(at -3.25 -0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "G4" smd circle+		(at -2.6 -0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "G6" smd circle+		(at -1.3 -0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "G7" smd circle+		(at -0.65 -0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "G8" smd circle+		(at 0 -0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "G9" smd circle+		(at 0.65 -0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "G10" smd circle+		(at 1.3 -0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "G12" smd circle+		(at 2.6 -0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "G13" smd circle+		(at 3.25 -0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "G14" smd circle+		(at 3.9 -0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "G15" smd circle+		(at 4.55 -0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "H1" smd circle+		(at -4.55 0)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "H2" smd circle+		(at -3.9 0)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "H3" smd circle+		(at -3.25 0)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "H4" smd circle+		(at -2.6 0)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "H6" smd circle+		(at -1.3 0)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "H7" smd circle+		(at -0.65 0)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "H8" smd circle+		(at 0 0)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "H9" smd circle+		(at 0.65 0)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "H10" smd circle+		(at 1.3 0)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "H12" smd circle+		(at 2.6 0)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "H13" smd circle+		(at 3.25 0)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "H14" smd circle+		(at 3.9 0)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "H15" smd circle+		(at 4.55 0)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "J1" smd circle+		(at -4.55 0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "J2" smd circle+		(at -3.9 0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "J3" smd circle+		(at -3.25 0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "J4" smd circle+		(at -2.6 0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "J6" smd circle+		(at -1.3 0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "J7" smd circle+		(at -0.65 0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "J8" smd circle+		(at 0 0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "J9" smd circle+		(at 0.65 0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "J10" smd circle+		(at 1.3 0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "J12" smd circle+		(at 2.6 0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "J13" smd circle+		(at 3.25 0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "J14" smd circle+		(at 3.9 0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "J15" smd circle+		(at 4.55 0.65)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "K1" smd circle+		(at -4.55 1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "K2" smd circle+		(at -3.9 1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "K3" smd circle+		(at -3.25 1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "K4" smd circle+		(at -2.6 1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "K6" smd circle+		(at -1.3 1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "K7" smd circle+		(at -0.65 1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "K8" smd circle+		(at 0 1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "K9" smd circle+		(at 0.65 1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "K10" smd circle+		(at 1.3 1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "K12" smd circle+		(at 2.6 1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "K13" smd circle+		(at 3.25 1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "K14" smd circle+		(at 3.9 1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "K15" smd circle+		(at 4.55 1.3)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "L1" smd circle+		(at -4.55 1.95)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "L2" smd circle+		(at -3.9 1.95)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "L3" smd circle+		(at -3.25 1.95)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "L4" smd circle+		(at -2.6 1.95)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "L12" smd circle+		(at 2.6 1.95)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "L13" smd circle+		(at 3.25 1.95)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "L14" smd circle+		(at 3.9 1.95)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "L15" smd circle+		(at 4.55 1.95)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "M1" smd circle+		(at -4.55 2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "M2" smd circle+		(at -3.9 2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "M3" smd circle+		(at -3.25 2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "M4" smd circle+		(at -2.6 2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "M5" smd circle+		(at -1.95 2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "M6" smd circle+		(at -1.3 2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "M7" smd circle+		(at -0.65 2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "M8" smd circle+		(at 0 2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "M9" smd circle+		(at 0.65 2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "M10" smd circle+		(at 1.3 2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "M11" smd circle+		(at 1.95 2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "M12" smd circle+		(at 2.6 2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "M13" smd circle+		(at 3.25 2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "M14" smd circle+		(at 3.9 2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "M15" smd circle+		(at 4.55 2.6)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "N1" smd circle+		(at -4.55 3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "N2" smd circle+		(at -3.9 3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "N3" smd circle+		(at -3.25 3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "N4" smd circle+		(at -2.6 3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "N5" smd circle+		(at -1.95 3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "N6" smd circle+		(at -1.3 3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "N7" smd circle+		(at -0.65 3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "N8" smd circle+		(at 0 3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "N9" smd circle+		(at 0.65 3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "N10" smd circle+		(at 1.3 3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "N11" smd circle+		(at 1.95 3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "N12" smd circle+		(at 2.6 3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "N13" smd circle+		(at 3.25 3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "N14" smd circle+		(at 3.9 3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "N15" smd circle+		(at 4.55 3.25)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "P1" smd circle+		(at -4.55 3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "P2" smd circle+		(at -3.9 3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "P3" smd circle+		(at -3.25 3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "P4" smd circle+		(at -2.6 3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "P5" smd circle+		(at -1.95 3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "P6" smd circle+		(at -1.3 3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "P7" smd circle+		(at -0.65 3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "P8" smd circle+		(at 0 3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "P9" smd circle+		(at 0.65 3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "P10" smd circle+		(at 1.3 3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "P11" smd circle+		(at 1.95 3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "P12" smd circle+		(at 2.6 3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "P13" smd circle+		(at 3.25 3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "P14" smd circle+		(at 3.9 3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "P15" smd circle+		(at 4.55 3.9)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "R1" smd circle+		(at -4.55 4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "R2" smd circle+		(at -3.9 4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "R3" smd circle+		(at -3.25 4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "R4" smd circle+		(at -2.6 4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "R5" smd circle+		(at -1.95 4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "R6" smd circle+		(at -1.3 4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "R7" smd circle+		(at -0.65 4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "R8" smd circle+		(at 0 4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "R9" smd circle+		(at 0.65 4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "R10" smd circle+		(at 1.3 4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "R11" smd circle+		(at 1.95 4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "R12" smd circle+		(at 2.6 4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "R13" smd circle+		(at 3.25 4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "R14" smd circle+		(at 3.9 4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(pad "R15" smd circle+		(at 4.55 4.55)+		(size 0.3 0.3)+		(property pad_prop_bga)+		(layers "F.Cu" "F.Mask" "F.Paste")+	)+	(embedded_fonts no)+	(model "${KICAD10_3DMODEL_DIR}/Package_BGA.3dshapes/UFBGA-201_10x10mm_Layout15x15_P0.65mm.step"+		(offset+			(xyz 0 0 0)+		)+		(scale+			(xyz 1 1 1)+		)+		(rotate+			(xyz 0 0 0)+		)+	)+)
stm32h725igk6.kicad_symadded+817
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name="VSS@17" x="-17.78" y="-99.06" length="middle" direction="pwr"/>+  <pin name="PG8" x="-17.78" y="-101.6" length="middle" direction="io"/>+  <pin name="PG7" x="-17.78" y="-104.14" length="middle" direction="io"/>+  <pin name="PG4" x="-17.78" y="-106.68" length="middle" direction="io"/>+  <pin name="PG2" x="-17.78" y="-109.22" length="middle" direction="io"/>+  <pin name="PF6" x="-17.78" y="-111.76" length="middle" direction="io"/>+  <pin name="PF4" x="-17.78" y="-114.3" length="middle" direction="io"/>+  <pin name="PF5" x="-17.78" y="-116.84" length="middle" direction="io"/>+  <pin name="PF3" x="-17.78" y="-119.38" length="middle" direction="io"/>+  <pin name="VSS@18" x="-17.78" y="-121.92" length="middle" direction="pwr"/>+  <pin name="VSS@19" x="-17.78" y="-124.46" length="middle" direction="pwr"/>+  <pin name="VSS@20" x="-17.78" y="-127" length="middle" direction="pwr"/>+  <pin name="VSS@21" x="17.78" y="124.46" length="middle" direction="pwr" rot="R180"/>+  <pin name="VDDLDO@3" x="17.78" y="121.92" length="middle" direction="pwr" rot="R180"/>+  <pin name="VCAP@3" x="17.78" y="119.38" length="middle" direction="pwr" rot="R180"/>+  <pin name="PE11" x="17.78" y="116.84" length="middle" direction="io" rot="R180"/>+  <pin name="PE9" x="17.78" y="114.3" length="middle" direction="io" rot="R180"/>+  <pin name="PF14" x="17.78" y="111.76" length="middle" direction="io" rot="R180"/>+  <pin name="PE10" x="17.78" y="109.22" length="middle" direction="io" rot="R180"/>+  <pin name="PB0" x="17.78" y="106.68" length="middle" direction="io" rot="R180"/>+  <pin name="PA6" x="17.78" y="104.14" length="middle" direction="io" rot="R180"/>+  <pin name="PC4" x="17.78" y="101.6" length="middle" direction="io" rot="R180"/>+  <pin name="PH5" x="17.78" y="99.06" length="middle" direction="io" rot="R180"/>+  <pin name="PH3" x="17.78" y="96.52" length="middle" direction="io" rot="R180"/>+  <pin name="PA0_C" x="17.78" y="93.98" length="middle" direction="in" rot="R180"/>+  <pin name="PA2" x="17.78" y="91.44" length="middle" direction="io" rot="R180"/>+  <pin name="VSS@22" x="17.78" y="88.9" length="middle" direction="pwr" rot="R180"/>+  <pin name="PH6" x="17.78" y="86.36" length="middle" direction="io" rot="R180"/>+  <pin name="PE15" x="17.78" y="83.82" length="middle" direction="io" rot="R180"/>+  <pin name="PE13" x="17.78" y="81.28" length="middle" direction="io" rot="R180"/>+  <pin name="PE12" x="17.78" y="78.74" length="middle" direction="io" rot="R180"/>+  <pin name="PF12" x="17.78" y="76.2" length="middle" direction="io" rot="R180"/>+  <pin name="PB11" x="17.78" y="73.66" length="middle" direction="io" rot="R180"/>+  <pin name="PE7" x="17.78" y="71.12" length="middle" direction="io" rot="R180"/>+  <pin name="PG0" x="17.78" y="68.58" length="middle" direction="io" rot="R180"/>+  <pin name="PB2" x="17.78" y="66.04" length="middle" direction="io" rot="R180"/>+  <pin name="PA5" x="17.78" y="63.5" length="middle" direction="io" rot="R180"/>+  <pin name="PA4" x="17.78" y="60.96" length="middle" direction="io" rot="R180"/>+  <pin name="PH4" x="17.78" y="58.42" length="middle" direction="io" rot="R180"/>+  <pin name="PA1_C" x="17.78" y="55.88" length="middle" direction="in" rot="R180"/>+  <pin name="PA1" x="17.78" y="53.34" length="middle" direction="io" rot="R180"/>+  <pin name="PA0" x="17.78" y="50.8" length="middle" direction="io" rot="R180"/>+  <pin name="PH12" x="17.78" y="48.26" length="middle" direction="io" rot="R180"/>+  <pin name="PH10" x="17.78" y="45.72" length="middle" direction="io" rot="R180"/>+  <pin name="PH8" x="17.78" y="43.18" length="middle" direction="io" rot="R180"/>+  <pin name="PB10" x="17.78" y="40.64" length="middle" direction="io" rot="R180"/>+  <pin name="PF13" x="17.78" y="38.1" length="middle" direction="io" rot="R180"/>+  <pin name="PF15" x="17.78" y="35.56" length="middle" direction="io" rot="R180"/>+  <pin name="PG1" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>+  <pin name="PE8" x="17.78" y="30.48" length="middle" direction="io" rot="R180"/>+  <pin name="PF11" x="17.78" y="27.94" length="middle" direction="io" rot="R180"/>+  <pin name="PA7" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>+  <pin name="PA3" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>+  <pin name="PH2" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>+  <pin name="VSSA" x="17.78" y="17.78" length="middle" direction="pwr" rot="R180"/>+  <pin name="PC3_C" x="17.78" y="15.24" length="middle" direction="in" rot="R180"/>+  <pin name="PC2_C" x="17.78" y="12.7" length="middle" direction="in" rot="R180"/>+  <pin name="PB12" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>+  <pin name="PH9" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>+  <pin name="PH11" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>+  <pin name="PE14" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>+  <pin name="PH7" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+  <pin name="VSS@23" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>+  <pin name="VDD@6" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>+  <pin name="PB1" x="17.78" y="-7.62" length="middle" direction="io" rot="R180"/>+  <pin name="PC5" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+  <pin name="VSS@24" x="17.78" y="-12.7" length="middle" direction="pwr" rot="R180"/>+  <pin name="VDD@7" x="17.78" y="-15.24" length="middle" direction="pwr" rot="R180"/>+  <pin name="VDDA" x="17.78" y="-17.78" length="middle" direction="pwr" rot="R180"/>+  <pin name="VREF+" x="17.78" y="-20.32" length="middle" direction="pwr" rot="R180"/>+  <pin name="PC3" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+  <pin name="PC2" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+  <pin name="PB13" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+  <pin name="PD8" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+  <pin name="PD10" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>+  <pin name="VDD@8" x="17.78" y="-35.56" length="middle" direction="pwr" rot="R180"/>+  <pin name="VREF-" x="17.78" y="-38.1" length="middle" direction="pwr" rot="R180"/>+  <pin name="PC1" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>+  <pin name="PC0" x="17.78" y="-43.18" length="middle" direction="io" rot="R180"/>+  <pin name="NRST" x="17.78" y="-45.72" length="middle" direction="io" rot="R180"/>+  <pin name="PB14" x="17.78" y="-48.26" length="middle" direction="io" rot="R180"/>+  <pin name="PB15" x="17.78" y="-50.8" length="middle" direction="io" rot="R180"/>+  <pin name="PD9" x="17.78" y="-53.34" length="middle" direction="io" rot="R180"/>+  <pin name="VSS@25" x="17.78" y="-55.88" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@26" x="17.78" y="-58.42" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@27" x="17.78" y="-60.96" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@28" x="17.78" y="-63.5" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@29" x="17.78" y="-66.04" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@30" x="17.78" y="-68.58" length="middle" direction="pwr" rot="R180"/>+  <pin name="VDD@9" x="17.78" y="-71.12" length="middle" direction="pwr" rot="R180"/>+  <pin name="PF10" x="17.78" y="-73.66" length="middle" direction="io" rot="R180"/>+  <pin name="VSS@31" x="17.78" y="-76.2" length="middle" direction="pwr" rot="R180"/>+  <pin name="PH1-OSC_OUT" x="17.78" y="-78.74" length="middle" direction="io" rot="R180"/>+  <pin name="PD12" x="17.78" y="-81.28" length="middle" direction="io" rot="R180"/>+  <pin name="VSS@32" x="17.78" y="-83.82" length="middle" direction="pwr" rot="R180"/>+  <pin name="PD11" x="17.78" y="-86.36" length="middle" direction="io" rot="R180"/>+  <pin name="PD15" x="17.78" y="-88.9" length="middle" direction="io" rot="R180"/>+  <pin name="VSS@33" x="17.78" y="-91.44" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@34" x="17.78" y="-93.98" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@35" x="17.78" y="-96.52" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@36" x="17.78" y="-99.06" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@37" x="17.78" y="-101.6" length="middle" direction="pwr" rot="R180"/>+  <pin name="PF9" x="17.78" y="-104.14" length="middle" direction="io" rot="R180"/>+  <pin name="PF7" x="17.78" y="-106.68" length="middle" direction="io" rot="R180"/>+  <pin name="PF8" x="17.78" y="-109.22" length="middle" direction="io" rot="R180"/>+  <pin name="PH0-OSC_IN" x="17.78" y="-111.76" length="middle" direction="io" rot="R180"/>+  <pin name="PD13" x="17.78" y="-114.3" length="middle" direction="io" rot="R180"/>+  <pin name="PD14" x="17.78" y="-116.84" length="middle" direction="io" rot="R180"/>+  <pin name="PG3" x="17.78" y="-119.38" length="middle" direction="io" rot="R180"/>+  <pin name="VDD@10" x="17.78" y="-121.92" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@38" x="17.78" y="-124.46" length="middle" direction="pwr" rot="R180"/>+  <pin name="VSS@39" x="17.78" y="-127" length="middle" direction="pwr" rot="R180"/>+</symbol>+</symbols>+<devicesets>+<deviceset name="STM32H725IGK6" prefix="U">+  <description></description>+  <gates>+    <gate name="G$1" symbol="STM32H725IGK6" x="0" y="0"/>+  </gates>+  <devices>+    <device name="" package="UFBGA-201_10x10mm_Layout15x15_P0.65mm">+      <connects>+        <connect gate="G$1" pin="VSS" pad="A1"/>+        <connect gate="G$1" pin="PB8" pad="A2"/>+        <connect gate="G$1" pin="VDDLDO" pad="A3"/>+        <connect gate="G$1" pin="VCAP" pad="A4"/>+        <connect gate="G$1" pin="PB6" pad="A5"/>+        <connect gate="G$1" pin="PB3" pad="A6"/>+        <connect gate="G$1" pin="PG11" pad="A7"/>+        <connect gate="G$1" pin="PG9" pad="A8"/>+        <connect gate="G$1" pin="PD3" pad="A9"/>+        <connect gate="G$1" pin="PD1" pad="A10"/>+        <connect gate="G$1" pin="PA15" pad="A11"/>+        <connect gate="G$1" pin="PA14" pad="A12"/>+        <connect gate="G$1" pin="VDDLDO@2" pad="A13"/>+        <connect gate="G$1" pin="VCAP@2" pad="A14"/>+        <connect gate="G$1" pin="VSS@2" pad="A15"/>+        <connect gate="G$1" pin="PE4" pad="B1"/>+        <connect gate="G$1" pin="PE3" pad="B2"/>+        <connect gate="G$1" pin="PB9" pad="B3"/>+        <connect gate="G$1" pin="PE0" pad="B4"/>+        <connect gate="G$1" pin="PB7" pad="B5"/>+        <connect gate="G$1" pin="PB4" pad="B6"/>+        <connect gate="G$1" pin="PG13" pad="B7"/>+        <connect gate="G$1" pin="PD7" pad="B8"/>+        <connect gate="G$1" pin="PD5" pad="B9"/>+        <connect gate="G$1" pin="PD2" pad="B10"/>+        <connect gate="G$1" pin="PC12" pad="B11"/>+        <connect gate="G$1" pin="PH14" pad="B12"/>+        <connect gate="G$1" pin="PA13" pad="B13"/>+        <connect gate="G$1" pin="PA8" pad="B14"/>+        <connect gate="G$1" pin="PA12" pad="B15"/>+        <connect gate="G$1" pin="PC13" pad="C1"/>+        <connect gate="G$1" pin="VSS@3" pad="C2"/>+        <connect gate="G$1" pin="PE2" pad="C3"/>+        <connect gate="G$1" pin="PE1" pad="C4"/>+        <connect gate="G$1" pin="BOOT0" pad="C5"/>+        <connect gate="G$1" pin="PB5" pad="C6"/>+        <connect gate="G$1" pin="PG14" pad="C7"/>+        <connect gate="G$1" pin="PG10" pad="C8"/>+        <connect gate="G$1" pin="PD4" pad="C9"/>+        <connect gate="G$1" pin="PD0" pad="C10"/>+        <connect gate="G$1" pin="PC11" pad="C11"/>+        <connect gate="G$1" pin="PC10" pad="C12"/>+        <connect gate="G$1" pin="PH13" pad="C13"/>+        <connect gate="G$1" pin="PA10" pad="C14"/>+        <connect gate="G$1" pin="PA11" pad="C15"/>+        <connect gate="G$1" pin="PC15-OSC32_OUT" pad="D1"/>+        <connect gate="G$1" pin="PC14-OSC32_IN" pad="D2"/>+        <connect gate="G$1" pin="PE5" pad="D3"/>+        <connect gate="G$1" pin="PDR_ON" pad="D4"/>+        <connect gate="G$1" pin="VDD" pad="D5"/>+        <connect gate="G$1" pin="VSS@4" pad="D6"/>+        <connect gate="G$1" pin="PG15" pad="D7"/>+        <connect gate="G$1" pin="PG12" pad="D8"/>+        <connect gate="G$1" pin="PD6" pad="D9"/>+        <connect gate="G$1" pin="VSS@5" pad="D10"/>+        <connect gate="G$1" pin="VDD@2" pad="D11"/>+        <connect gate="G$1" pin="PH15" pad="D12"/>+        <connect gate="G$1" pin="PA9" pad="D13"/>+        <connect gate="G$1" pin="PC8" pad="D14"/>+        <connect gate="G$1" pin="PC7" pad="D15"/>+        <connect gate="G$1" pin="VSS@6" pad="E1"/>+        <connect gate="G$1" pin="VBAT" pad="E2"/>+        <connect gate="G$1" pin="PE6" pad="E3"/>+        <connect gate="G$1" pin="VDD@3" pad="E4"/>+        <connect gate="G$1" pin="VDD@4" pad="E12"/>+        <connect gate="G$1" pin="PC9" pad="E13"/>+        <connect gate="G$1" pin="PC6" pad="E14"/>+        <connect gate="G$1" pin="VDD50USB" pad="E15"/>+        <connect gate="G$1" pin="VLXSMPS" pad="F1"/>+        <connect gate="G$1" pin="VSSSMPS" pad="F2"/>+        <connect gate="G$1" pin="PF1" pad="F3"/>+        <connect gate="G$1" pin="PF0" pad="F4"/>+        <connect gate="G$1" pin="VSS@7" pad="F6"/>+        <connect gate="G$1" pin="VSS@8" pad="F7"/>+        <connect gate="G$1" pin="VSS@9" pad="F8"/>+        <connect gate="G$1" pin="VSS@10" pad="F9"/>+        <connect gate="G$1" pin="VSS@11" pad="F10"/>+        <connect gate="G$1" pin="VSS@12" pad="F12"/>+        <connect gate="G$1" pin="VDD33USB" pad="F13"/>+        <connect gate="G$1" pin="PG6" pad="F14"/>+        <connect gate="G$1" pin="PG5" pad="F15"/>+        <connect gate="G$1" pin="VDDSMPS" pad="G1"/>+        <connect gate="G$1" pin="VFBSMPS" pad="G2"/>+        <connect gate="G$1" pin="PF2" pad="G3"/>+        <connect gate="G$1" pin="VDD@5" pad="G4"/>+        <connect gate="G$1" pin="VSS@13" pad="G6"/>+        <connect gate="G$1" pin="VSS@14" pad="G7"/>+        <connect gate="G$1" pin="VSS@15" pad="G8"/>+        <connect gate="G$1" pin="VSS@16" pad="G9"/>+        <connect gate="G$1" pin="VSS@17" pad="G10"/>+        <connect gate="G$1" pin="PG8" pad="G12"/>+        <connect gate="G$1" pin="PG7" pad="G13"/>+        <connect gate="G$1" pin="PG4" pad="G14"/>+        <connect gate="G$1" pin="PG2" pad="G15"/>+        <connect gate="G$1" pin="PF6" pad="H1"/>+        <connect gate="G$1" pin="PF4" pad="H2"/>+        <connect gate="G$1" pin="PF5" pad="H3"/>+        <connect gate="G$1" pin="PF3" pad="H4"/>+        <connect gate="G$1" pin="VSS@18" pad="H6"/>+        <connect gate="G$1" pin="VSS@19" pad="H7"/>+        <connect gate="G$1" pin="VSS@20" pad="H8"/>+        <connect gate="G$1" pin="VSS@21" pad="R15"/>+        <connect gate="G$1" pin="VDDLDO@3" pad="R14"/>+        <connect gate="G$1" pin="VCAP@3" pad="R13"/>+        <connect gate="G$1" pin="PE11" pad="R12"/>+        <connect gate="G$1" pin="PE9" pad="R11"/>+        <connect gate="G$1" pin="PF14" pad="R10"/>+        <connect gate="G$1" pin="PE10" pad="R9"/>+        <connect gate="G$1" pin="PB0" pad="R8"/>+        <connect gate="G$1" pin="PA6" pad="R7"/>+        <connect gate="G$1" pin="PC4" pad="R6"/>+        <connect gate="G$1" pin="PH5" pad="R5"/>+        <connect gate="G$1" pin="PH3" pad="R4"/>+        <connect gate="G$1" pin="PA0_C" pad="R3"/>+        <connect gate="G$1" pin="PA2" pad="R2"/>+        <connect gate="G$1" pin="VSS@22" pad="R1"/>+        <connect gate="G$1" pin="PH6" pad="P15"/>+        <connect gate="G$1" pin="PE15" pad="P14"/>+        <connect gate="G$1" pin="PE13" pad="P13"/>+        <connect gate="G$1" pin="PE12" pad="P12"/>+        <connect gate="G$1" pin="PF12" pad="P11"/>+        <connect gate="G$1" pin="PB11" pad="P10"/>+        <connect gate="G$1" pin="PE7" pad="P9"/>+        <connect gate="G$1" pin="PG0" pad="P8"/>+        <connect gate="G$1" pin="PB2" pad="P7"/>+        <connect gate="G$1" pin="PA5" pad="P6"/>+        <connect gate="G$1" pin="PA4" pad="P5"/>+        <connect gate="G$1" pin="PH4" pad="P4"/>+        <connect gate="G$1" pin="PA1_C" pad="P3"/>+        <connect gate="G$1" pin="PA1" pad="P2"/>+        <connect gate="G$1" pin="PA0" pad="P1"/>+        <connect gate="G$1" pin="PH12" pad="N15"/>+        <connect gate="G$1" pin="PH10" pad="N14"/>+        <connect gate="G$1" pin="PH8" pad="N13"/>+        <connect gate="G$1" pin="PB10" pad="N12"/>+        <connect gate="G$1" pin="PF13" pad="N11"/>+        <connect gate="G$1" pin="PF15" pad="N10"/>+        <connect gate="G$1" pin="PG1" pad="N9"/>+        <connect gate="G$1" pin="PE8" pad="N8"/>+        <connect gate="G$1" pin="PF11" pad="N7"/>+        <connect gate="G$1" pin="PA7" pad="N6"/>+        <connect gate="G$1" pin="PA3" pad="N5"/>+        <connect gate="G$1" pin="PH2" pad="N4"/>+        <connect gate="G$1" pin="VSSA" pad="N3"/>+        <connect gate="G$1" pin="PC3_C" pad="N2"/>+        <connect gate="G$1" pin="PC2_C" pad="N1"/>+        <connect gate="G$1" pin="PB12" pad="M15"/>+        <connect gate="G$1" pin="PH9" pad="M14"/>+        <connect gate="G$1" pin="PH11" pad="M13"/>+        <connect gate="G$1" pin="PE14" pad="M12"/>+        <connect gate="G$1" pin="PH7" pad="M11"/>+        <connect gate="G$1" pin="VSS@23" pad="M10"/>+        <connect gate="G$1" pin="VDD@6" pad="M9"/>+        <connect gate="G$1" pin="PB1" pad="M8"/>+        <connect gate="G$1" pin="PC5" pad="M7"/>+        <connect gate="G$1" pin="VSS@24" pad="M6"/>+        <connect gate="G$1" pin="VDD@7" pad="M5"/>+        <connect gate="G$1" pin="VDDA" pad="M4"/>+        <connect gate="G$1" pin="VREF+" pad="M3"/>+        <connect gate="G$1" pin="PC3" pad="M2"/>+        <connect gate="G$1" pin="PC2" pad="M1"/>+        <connect gate="G$1" pin="PB13" pad="L15"/>+        <connect gate="G$1" pin="PD8" pad="L14"/>+        <connect gate="G$1" pin="PD10" pad="L13"/>+        <connect gate="G$1" pin="VDD@8" pad="L12"/>+        <connect gate="G$1" pin="VREF-" pad="L4"/>+        <connect gate="G$1" pin="PC1" pad="L3"/>+        <connect gate="G$1" pin="PC0" pad="L2"/>+        <connect gate="G$1" pin="NRST" pad="L1"/>+        <connect gate="G$1" pin="PB14" pad="K15"/>+        <connect gate="G$1" pin="PB15" pad="K14"/>+        <connect gate="G$1" pin="PD9" pad="K13"/>+        <connect gate="G$1" pin="VSS@25" pad="K12"/>+        <connect gate="G$1" pin="VSS@26" pad="K10"/>+        <connect gate="G$1" pin="VSS@27" pad="K9"/>+        <connect gate="G$1" pin="VSS@28" pad="K8"/>+        <connect gate="G$1" pin="VSS@29" pad="K7"/>+        <connect gate="G$1" pin="VSS@30" pad="K6"/>+        <connect gate="G$1" pin="VDD@9" pad="K4"/>+        <connect gate="G$1" pin="PF10" pad="K3"/>+        <connect gate="G$1" pin="VSS@31" pad="K2"/>+        <connect gate="G$1" pin="PH1-OSC_OUT" pad="K1"/>+        <connect gate="G$1" pin="PD12" pad="J15"/>+        <connect gate="G$1" pin="VSS@32" pad="J14"/>+        <connect gate="G$1" pin="PD11" pad="J13"/>+        <connect gate="G$1" pin="PD15" pad="J12"/>+        <connect gate="G$1" pin="VSS@33" pad="J10"/>+        <connect gate="G$1" pin="VSS@34" pad="J9"/>+        <connect gate="G$1" pin="VSS@35" pad="J8"/>+        <connect gate="G$1" pin="VSS@36" pad="J7"/>+        <connect gate="G$1" pin="VSS@37" pad="J6"/>+        <connect gate="G$1" pin="PF9" pad="J4"/>+        <connect gate="G$1" pin="PF7" pad="J3"/>+        <connect gate="G$1" pin="PF8" pad="J2"/>+        <connect gate="G$1" pin="PH0-OSC_IN" pad="J1"/>+        <connect gate="G$1" pin="PD13" pad="H15"/>+        <connect gate="G$1" pin="PD14" pad="H14"/>+        <connect gate="G$1" pin="PG3" pad="H13"/>+        <connect gate="G$1" pin="VDD@10" pad="H12"/>+        <connect gate="G$1" pin="VSS@38" pad="H10"/>+        <connect gate="G$1" pin="VSS@39" pad="H9"/>+      </connects>+      <technologies><technology name=""/></technologies>+    </device>+  </devices>+</deviceset>+</devicesets>+</library>+</drawing>+</eagle>\ No newline at end of file
stm32h725igk6.stepadded+2410
@@ -0,0 +1,2410 @@+ISO-10303-21;
+HEADER;
+/* UFBGA-201_10x10mm_Layout15x15_P0.65mm.step 3D STEP model for use in ECAD systems
+ * Copyright (C) 2018, kicad StepUp
+ * 
+ * This work is licensed under the [Creative Commons CC-BY-SA 4.0 License](https://creativecommons.org/licenses/by-sa/4.0/legalcode), 
+ * with the following exception:
+ * To the extent that the creation of electronic designs that use 'Licensed Material' can be considered to be 'Adapted Material', 
+ * then the copyright holder waives article 3 of the license with respect to these designs and any generated files which use data provided 
+ * as part of the 'Licensed Material'.
+ * You are free to use the library data in your own projects without the obligation to share your project files under this or any other license agreement.
+ * However, if you wish to redistribute these libraries, or parts thereof (including in modified form) as a collection then the exception above does not apply. 
+ * Please refer to https://github.com/KiCad/kicad-packages3D/blob/master/LICENSE.md for further clarification of the exception.
+ * Disclaimer of Warranties and Limitation of Liability.
+ * These libraries are provided in the hope that they will be useful, but are provided without warranty of any kind, express or implied.
+ * *USE 3D CAD DATA AT YOUR OWN RISK*
+ * *DO NOT RELY UPON ANY INFORMATION FOUND HERE WITHOUT INDEPENDENT VERIFICATION.*
+ * 
+ */
+
+FILE_DESCRIPTION(
+/* description */ ('model of UFBGA-201_10x10mm_Layout15x15_P0.65mm'),
+/* implementation_level */ '2;1');
+
+FILE_NAME(
+/* name */ 'UFBGA-201_10x10mm_Layout15x15_P0.65mm.step',
+/* time_stamp */ '2018-11-07T22:21:41',
+/* author */ ('kicad StepUp','ksu'),
+/* organization */ ('FreeCAD'),
+/* preprocessor_version */ 'OCC',
+/* originating_system */ 'kicad StepUp',
+/* authorisation */ '');
+
+FILE_SCHEMA(('AUTOMOTIVE_DESIGN { 1 0 10303 214 1 1 1 1 }'));
+ENDSEC;
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+#2054,#2061,#2068,#2075,#2082,#2089,#2096,#2103,#2110,#2117,#2124,
+#2131,#2138,#2145,#2152,#2159,#2166,#2173,#2180,#2187,#2194,#2201,
+#2208,#2215,#2222,#2229,#2236,#2243,#2250,#2257,#2264,#2271,#2278,
+#2285,#2292,#2299,#2306,#2313,#2320,#2327,#2334,#2341),#1890);
+#1897 = STYLED_ITEM('color',(#1898),#17);
+#1898 = PRESENTATION_STYLE_ASSIGNMENT((#1899));
+#1899 = SURFACE_STYLE_USAGE(.BOTH.,#1900);
+#1900 = SURFACE_SIDE_STYLE('',(#1901));
+#1901 = SURFACE_STYLE_FILL_AREA(#1902);
+#1902 = FILL_AREA_STYLE('',(#1903));
+#1903 = FILL_AREA_STYLE_COLOUR('',#1904);
+#1904 = COLOUR_RGB('',0.148000001907,0.144999995828,0.144999995828);
+#1905 = STYLED_ITEM('color',(#1906),#57);
+#1906 = PRESENTATION_STYLE_ASSIGNMENT((#1907));
+#1907 = SURFACE_STYLE_USAGE(.BOTH.,#1908);
+#1908 = SURFACE_SIDE_STYLE('',(#1909));
+#1909 = SURFACE_STYLE_FILL_AREA(#1910);
+#1910 = FILL_AREA_STYLE('',(#1911));
+#1911 = FILL_AREA_STYLE_COLOUR('',#1904);
+#1912 = STYLED_ITEM('color',(#1913),#88);
+#1913 = PRESENTATION_STYLE_ASSIGNMENT((#1914));
+#1914 = SURFACE_STYLE_USAGE(.BOTH.,#1915);
+#1915 = SURFACE_SIDE_STYLE('',(#1916));
+#1916 = SURFACE_STYLE_FILL_AREA(#1917);
+#1917 = FILL_AREA_STYLE('',(#1918));
+#1918 = FILL_AREA_STYLE_COLOUR('',#1904);
+#1919 = STYLED_ITEM('color',(#1920),#123);
+#1920 = PRESENTATION_STYLE_ASSIGNMENT((#1921));
+#1921 = SURFACE_STYLE_USAGE(.BOTH.,#1922);
+#1922 = SURFACE_SIDE_STYLE('',(#1923));
+#1923 = SURFACE_STYLE_FILL_AREA(#1924);
+#1924 = FILL_AREA_STYLE('',(#1925));
+#1925 = FILL_AREA_STYLE_COLOUR('',#1904);
+#1926 = STYLED_ITEM('color',(#1927),#147);
+#1927 = PRESENTATION_STYLE_ASSIGNMENT((#1928));
+#1928 = SURFACE_STYLE_USAGE(.BOTH.,#1929);
+#1929 = SURFACE_SIDE_STYLE('',(#1930));
+#1930 = SURFACE_STYLE_FILL_AREA(#1931);
+#1931 = FILL_AREA_STYLE('',(#1932));
+#1932 = FILL_AREA_STYLE_COLOUR('',#1904);
+#1933 = STYLED_ITEM('color',(#1934),#780);
+#1934 = PRESENTATION_STYLE_ASSIGNMENT((#1935));
+#1935 = SURFACE_STYLE_USAGE(.BOTH.,#1936);
+#1936 = SURFACE_SIDE_STYLE('',(#1937));
+#1937 = SURFACE_STYLE_FILL_AREA(#1938);
+#1938 = FILL_AREA_STYLE('',(#1939));
+#1939 = FILL_AREA_STYLE_COLOUR('',#1904);
+#1940 = STYLED_ITEM('color',(#1941),#792);
+#1941 = PRESENTATION_STYLE_ASSIGNMENT((#1942));
+#1942 = SURFACE_STYLE_USAGE(.BOTH.,#1943);
+#1943 = SURFACE_SIDE_STYLE('',(#1944));
+#1944 = SURFACE_STYLE_FILL_AREA(#1945);
+#1945 = FILL_AREA_STYLE('',(#1946));
+#1946 = FILL_AREA_STYLE_COLOUR('',#1947);
+#1947 = COLOUR_RGB('',0.690999984741,0.663999974728,0.597999989986);
+#1948 = STYLED_ITEM('color',(#1949),#817);
+#1949 = PRESENTATION_STYLE_ASSIGNMENT((#1950));
+#1950 = SURFACE_STYLE_USAGE(.BOTH.,#1951);
+#1951 = SURFACE_SIDE_STYLE('',(#1952));
+#1952 = SURFACE_STYLE_FILL_AREA(#1953);
+#1953 = FILL_AREA_STYLE('',(#1954));
+#1954 = FILL_AREA_STYLE_COLOUR('',#1955);
+#1955 = COLOUR_RGB('',0.824000000954,0.819999992847,0.78100001812);
+#1956 = STYLED_ITEM('color',(#1957),#836);
+#1957 = PRESENTATION_STYLE_ASSIGNMENT((#1958));
+#1958 = SURFACE_STYLE_USAGE(.BOTH.,#1959);
+#1959 = SURFACE_SIDE_STYLE('',(#1960));
+#1960 = SURFACE_STYLE_FILL_AREA(#1961);
+#1961 = FILL_AREA_STYLE('',(#1962));
+#1962 = FILL_AREA_STYLE_COLOUR('',#1955);
+#1963 = STYLED_ITEM('color',(#1964),#855);
+#1964 = PRESENTATION_STYLE_ASSIGNMENT((#1965));
+#1965 = SURFACE_STYLE_USAGE(.BOTH.,#1966);
+#1966 = SURFACE_SIDE_STYLE('',(#1967));
+#1967 = SURFACE_STYLE_FILL_AREA(#1968);
+#1968 = FILL_AREA_STYLE('',(#1969));
+#1969 = FILL_AREA_STYLE_COLOUR('',#1955);
+#1970 = STYLED_ITEM('color',(#1971),#874);
+#1971 = PRESENTATION_STYLE_ASSIGNMENT((#1972));
+#1972 = SURFACE_STYLE_USAGE(.BOTH.,#1973);
+#1973 = SURFACE_SIDE_STYLE('',(#1974));
+#1974 = SURFACE_STYLE_FILL_AREA(#1975);
+#1975 = FILL_AREA_STYLE('',(#1976));
+#1976 = FILL_AREA_STYLE_COLOUR('',#1955);
+#1977 = STYLED_ITEM('color',(#1978),#893);
+#1978 = PRESENTATION_STYLE_ASSIGNMENT((#1979));
+#1979 = SURFACE_STYLE_USAGE(.BOTH.,#1980);
+#1980 = SURFACE_SIDE_STYLE('',(#1981));
+#1981 = SURFACE_STYLE_FILL_AREA(#1982);
+#1982 = FILL_AREA_STYLE('',(#1983));
+#1983 = FILL_AREA_STYLE_COLOUR('',#1955);
+#1984 = STYLED_ITEM('color',(#1985),#912);
+#1985 = PRESENTATION_STYLE_ASSIGNMENT((#1986));
+#1986 = SURFACE_STYLE_USAGE(.BOTH.,#1987);
+#1987 = SURFACE_SIDE_STYLE('',(#1988));
+#1988 = SURFACE_STYLE_FILL_AREA(#1989);
+#1989 = FILL_AREA_STYLE('',(#1990));
+#1990 = FILL_AREA_STYLE_COLOUR('',#1955);
+#1991 = STYLED_ITEM('color',(#1992),#931);
+#1992 = PRESENTATION_STYLE_ASSIGNMENT((#1993));
+#1993 = SURFACE_STYLE_USAGE(.BOTH.,#1994);
+#1994 = SURFACE_SIDE_STYLE('',(#1995));
+#1995 = SURFACE_STYLE_FILL_AREA(#1996);
+#1996 = FILL_AREA_STYLE('',(#1997));
+#1997 = FILL_AREA_STYLE_COLOUR('',#1955);
+#1998 = STYLED_ITEM('color',(#1999),#950);
+#1999 = PRESENTATION_STYLE_ASSIGNMENT((#2000));
+#2000 = SURFACE_STYLE_USAGE(.BOTH.,#2001);
+#2001 = SURFACE_SIDE_STYLE('',(#2002));
+#2002 = SURFACE_STYLE_FILL_AREA(#2003);
+#2003 = FILL_AREA_STYLE('',(#2004));
+#2004 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2005 = STYLED_ITEM('color',(#2006),#969);
+#2006 = PRESENTATION_STYLE_ASSIGNMENT((#2007));
+#2007 = SURFACE_STYLE_USAGE(.BOTH.,#2008);
+#2008 = SURFACE_SIDE_STYLE('',(#2009));
+#2009 = SURFACE_STYLE_FILL_AREA(#2010);
+#2010 = FILL_AREA_STYLE('',(#2011));
+#2011 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2012 = STYLED_ITEM('color',(#2013),#988);
+#2013 = PRESENTATION_STYLE_ASSIGNMENT((#2014));
+#2014 = SURFACE_STYLE_USAGE(.BOTH.,#2015);
+#2015 = SURFACE_SIDE_STYLE('',(#2016));
+#2016 = SURFACE_STYLE_FILL_AREA(#2017);
+#2017 = FILL_AREA_STYLE('',(#2018));
+#2018 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2019 = STYLED_ITEM('color',(#2020),#1007);
+#2020 = PRESENTATION_STYLE_ASSIGNMENT((#2021));
+#2021 = SURFACE_STYLE_USAGE(.BOTH.,#2022);
+#2022 = SURFACE_SIDE_STYLE('',(#2023));
+#2023 = SURFACE_STYLE_FILL_AREA(#2024);
+#2024 = FILL_AREA_STYLE('',(#2025));
+#2025 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2026 = STYLED_ITEM('color',(#2027),#1026);
+#2027 = PRESENTATION_STYLE_ASSIGNMENT((#2028));
+#2028 = SURFACE_STYLE_USAGE(.BOTH.,#2029);
+#2029 = SURFACE_SIDE_STYLE('',(#2030));
+#2030 = SURFACE_STYLE_FILL_AREA(#2031);
+#2031 = FILL_AREA_STYLE('',(#2032));
+#2032 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2033 = STYLED_ITEM('color',(#2034),#1045);
+#2034 = PRESENTATION_STYLE_ASSIGNMENT((#2035));
+#2035 = SURFACE_STYLE_USAGE(.BOTH.,#2036);
+#2036 = SURFACE_SIDE_STYLE('',(#2037));
+#2037 = SURFACE_STYLE_FILL_AREA(#2038);
+#2038 = FILL_AREA_STYLE('',(#2039));
+#2039 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2040 = STYLED_ITEM('color',(#2041),#1064);
+#2041 = PRESENTATION_STYLE_ASSIGNMENT((#2042));
+#2042 = SURFACE_STYLE_USAGE(.BOTH.,#2043);
+#2043 = SURFACE_SIDE_STYLE('',(#2044));
+#2044 = SURFACE_STYLE_FILL_AREA(#2045);
+#2045 = FILL_AREA_STYLE('',(#2046));
+#2046 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2047 = STYLED_ITEM('color',(#2048),#1083);
+#2048 = PRESENTATION_STYLE_ASSIGNMENT((#2049));
+#2049 = SURFACE_STYLE_USAGE(.BOTH.,#2050);
+#2050 = SURFACE_SIDE_STYLE('',(#2051));
+#2051 = SURFACE_STYLE_FILL_AREA(#2052);
+#2052 = FILL_AREA_STYLE('',(#2053));
+#2053 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2054 = STYLED_ITEM('color',(#2055),#1102);
+#2055 = PRESENTATION_STYLE_ASSIGNMENT((#2056));
+#2056 = SURFACE_STYLE_USAGE(.BOTH.,#2057);
+#2057 = SURFACE_SIDE_STYLE('',(#2058));
+#2058 = SURFACE_STYLE_FILL_AREA(#2059);
+#2059 = FILL_AREA_STYLE('',(#2060));
+#2060 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2061 = STYLED_ITEM('color',(#2062),#1121);
+#2062 = PRESENTATION_STYLE_ASSIGNMENT((#2063));
+#2063 = SURFACE_STYLE_USAGE(.BOTH.,#2064);
+#2064 = SURFACE_SIDE_STYLE('',(#2065));
+#2065 = SURFACE_STYLE_FILL_AREA(#2066);
+#2066 = FILL_AREA_STYLE('',(#2067));
+#2067 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2068 = STYLED_ITEM('color',(#2069),#1140);
+#2069 = PRESENTATION_STYLE_ASSIGNMENT((#2070));
+#2070 = SURFACE_STYLE_USAGE(.BOTH.,#2071);
+#2071 = SURFACE_SIDE_STYLE('',(#2072));
+#2072 = SURFACE_STYLE_FILL_AREA(#2073);
+#2073 = FILL_AREA_STYLE('',(#2074));
+#2074 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2075 = STYLED_ITEM('color',(#2076),#1159);
+#2076 = PRESENTATION_STYLE_ASSIGNMENT((#2077));
+#2077 = SURFACE_STYLE_USAGE(.BOTH.,#2078);
+#2078 = SURFACE_SIDE_STYLE('',(#2079));
+#2079 = SURFACE_STYLE_FILL_AREA(#2080);
+#2080 = FILL_AREA_STYLE('',(#2081));
+#2081 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2082 = STYLED_ITEM('color',(#2083),#1178);
+#2083 = PRESENTATION_STYLE_ASSIGNMENT((#2084));
+#2084 = SURFACE_STYLE_USAGE(.BOTH.,#2085);
+#2085 = SURFACE_SIDE_STYLE('',(#2086));
+#2086 = SURFACE_STYLE_FILL_AREA(#2087);
+#2087 = FILL_AREA_STYLE('',(#2088));
+#2088 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2089 = STYLED_ITEM('color',(#2090),#1197);
+#2090 = PRESENTATION_STYLE_ASSIGNMENT((#2091));
+#2091 = SURFACE_STYLE_USAGE(.BOTH.,#2092);
+#2092 = SURFACE_SIDE_STYLE('',(#2093));
+#2093 = SURFACE_STYLE_FILL_AREA(#2094);
+#2094 = FILL_AREA_STYLE('',(#2095));
+#2095 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2096 = STYLED_ITEM('color',(#2097),#1216);
+#2097 = PRESENTATION_STYLE_ASSIGNMENT((#2098));
+#2098 = SURFACE_STYLE_USAGE(.BOTH.,#2099);
+#2099 = SURFACE_SIDE_STYLE('',(#2100));
+#2100 = SURFACE_STYLE_FILL_AREA(#2101);
+#2101 = FILL_AREA_STYLE('',(#2102));
+#2102 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2103 = STYLED_ITEM('color',(#2104),#1235);
+#2104 = PRESENTATION_STYLE_ASSIGNMENT((#2105));
+#2105 = SURFACE_STYLE_USAGE(.BOTH.,#2106);
+#2106 = SURFACE_SIDE_STYLE('',(#2107));
+#2107 = SURFACE_STYLE_FILL_AREA(#2108);
+#2108 = FILL_AREA_STYLE('',(#2109));
+#2109 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2110 = STYLED_ITEM('color',(#2111),#1254);
+#2111 = PRESENTATION_STYLE_ASSIGNMENT((#2112));
+#2112 = SURFACE_STYLE_USAGE(.BOTH.,#2113);
+#2113 = SURFACE_SIDE_STYLE('',(#2114));
+#2114 = SURFACE_STYLE_FILL_AREA(#2115);
+#2115 = FILL_AREA_STYLE('',(#2116));
+#2116 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2117 = STYLED_ITEM('color',(#2118),#1273);
+#2118 = PRESENTATION_STYLE_ASSIGNMENT((#2119));
+#2119 = SURFACE_STYLE_USAGE(.BOTH.,#2120);
+#2120 = SURFACE_SIDE_STYLE('',(#2121));
+#2121 = SURFACE_STYLE_FILL_AREA(#2122);
+#2122 = FILL_AREA_STYLE('',(#2123));
+#2123 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2124 = STYLED_ITEM('color',(#2125),#1292);
+#2125 = PRESENTATION_STYLE_ASSIGNMENT((#2126));
+#2126 = SURFACE_STYLE_USAGE(.BOTH.,#2127);
+#2127 = SURFACE_SIDE_STYLE('',(#2128));
+#2128 = SURFACE_STYLE_FILL_AREA(#2129);
+#2129 = FILL_AREA_STYLE('',(#2130));
+#2130 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2131 = STYLED_ITEM('color',(#2132),#1311);
+#2132 = PRESENTATION_STYLE_ASSIGNMENT((#2133));
+#2133 = SURFACE_STYLE_USAGE(.BOTH.,#2134);
+#2134 = SURFACE_SIDE_STYLE('',(#2135));
+#2135 = SURFACE_STYLE_FILL_AREA(#2136);
+#2136 = FILL_AREA_STYLE('',(#2137));
+#2137 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2138 = STYLED_ITEM('color',(#2139),#1330);
+#2139 = PRESENTATION_STYLE_ASSIGNMENT((#2140));
+#2140 = SURFACE_STYLE_USAGE(.BOTH.,#2141);
+#2141 = SURFACE_SIDE_STYLE('',(#2142));
+#2142 = SURFACE_STYLE_FILL_AREA(#2143);
+#2143 = FILL_AREA_STYLE('',(#2144));
+#2144 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2145 = STYLED_ITEM('color',(#2146),#1349);
+#2146 = PRESENTATION_STYLE_ASSIGNMENT((#2147));
+#2147 = SURFACE_STYLE_USAGE(.BOTH.,#2148);
+#2148 = SURFACE_SIDE_STYLE('',(#2149));
+#2149 = SURFACE_STYLE_FILL_AREA(#2150);
+#2150 = FILL_AREA_STYLE('',(#2151));
+#2151 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2152 = STYLED_ITEM('color',(#2153),#1368);
+#2153 = PRESENTATION_STYLE_ASSIGNMENT((#2154));
+#2154 = SURFACE_STYLE_USAGE(.BOTH.,#2155);
+#2155 = SURFACE_SIDE_STYLE('',(#2156));
+#2156 = SURFACE_STYLE_FILL_AREA(#2157);
+#2157 = FILL_AREA_STYLE('',(#2158));
+#2158 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2159 = STYLED_ITEM('color',(#2160),#1387);
+#2160 = PRESENTATION_STYLE_ASSIGNMENT((#2161));
+#2161 = SURFACE_STYLE_USAGE(.BOTH.,#2162);
+#2162 = SURFACE_SIDE_STYLE('',(#2163));
+#2163 = SURFACE_STYLE_FILL_AREA(#2164);
+#2164 = FILL_AREA_STYLE('',(#2165));
+#2165 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2166 = STYLED_ITEM('color',(#2167),#1406);
+#2167 = PRESENTATION_STYLE_ASSIGNMENT((#2168));
+#2168 = SURFACE_STYLE_USAGE(.BOTH.,#2169);
+#2169 = SURFACE_SIDE_STYLE('',(#2170));
+#2170 = SURFACE_STYLE_FILL_AREA(#2171);
+#2171 = FILL_AREA_STYLE('',(#2172));
+#2172 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2173 = STYLED_ITEM('color',(#2174),#1425);
+#2174 = PRESENTATION_STYLE_ASSIGNMENT((#2175));
+#2175 = SURFACE_STYLE_USAGE(.BOTH.,#2176);
+#2176 = SURFACE_SIDE_STYLE('',(#2177));
+#2177 = SURFACE_STYLE_FILL_AREA(#2178);
+#2178 = FILL_AREA_STYLE('',(#2179));
+#2179 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2180 = STYLED_ITEM('color',(#2181),#1444);
+#2181 = PRESENTATION_STYLE_ASSIGNMENT((#2182));
+#2182 = SURFACE_STYLE_USAGE(.BOTH.,#2183);
+#2183 = SURFACE_SIDE_STYLE('',(#2184));
+#2184 = SURFACE_STYLE_FILL_AREA(#2185);
+#2185 = FILL_AREA_STYLE('',(#2186));
+#2186 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2187 = STYLED_ITEM('color',(#2188),#1463);
+#2188 = PRESENTATION_STYLE_ASSIGNMENT((#2189));
+#2189 = SURFACE_STYLE_USAGE(.BOTH.,#2190);
+#2190 = SURFACE_SIDE_STYLE('',(#2191));
+#2191 = SURFACE_STYLE_FILL_AREA(#2192);
+#2192 = FILL_AREA_STYLE('',(#2193));
+#2193 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2194 = STYLED_ITEM('color',(#2195),#1482);
+#2195 = PRESENTATION_STYLE_ASSIGNMENT((#2196));
+#2196 = SURFACE_STYLE_USAGE(.BOTH.,#2197);
+#2197 = SURFACE_SIDE_STYLE('',(#2198));
+#2198 = SURFACE_STYLE_FILL_AREA(#2199);
+#2199 = FILL_AREA_STYLE('',(#2200));
+#2200 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2201 = STYLED_ITEM('color',(#2202),#1501);
+#2202 = PRESENTATION_STYLE_ASSIGNMENT((#2203));
+#2203 = SURFACE_STYLE_USAGE(.BOTH.,#2204);
+#2204 = SURFACE_SIDE_STYLE('',(#2205));
+#2205 = SURFACE_STYLE_FILL_AREA(#2206);
+#2206 = FILL_AREA_STYLE('',(#2207));
+#2207 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2208 = STYLED_ITEM('color',(#2209),#1520);
+#2209 = PRESENTATION_STYLE_ASSIGNMENT((#2210));
+#2210 = SURFACE_STYLE_USAGE(.BOTH.,#2211);
+#2211 = SURFACE_SIDE_STYLE('',(#2212));
+#2212 = SURFACE_STYLE_FILL_AREA(#2213);
+#2213 = FILL_AREA_STYLE('',(#2214));
+#2214 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2215 = STYLED_ITEM('color',(#2216),#1539);
+#2216 = PRESENTATION_STYLE_ASSIGNMENT((#2217));
+#2217 = SURFACE_STYLE_USAGE(.BOTH.,#2218);
+#2218 = SURFACE_SIDE_STYLE('',(#2219));
+#2219 = SURFACE_STYLE_FILL_AREA(#2220);
+#2220 = FILL_AREA_STYLE('',(#2221));
+#2221 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2222 = STYLED_ITEM('color',(#2223),#1558);
+#2223 = PRESENTATION_STYLE_ASSIGNMENT((#2224));
+#2224 = SURFACE_STYLE_USAGE(.BOTH.,#2225);
+#2225 = SURFACE_SIDE_STYLE('',(#2226));
+#2226 = SURFACE_STYLE_FILL_AREA(#2227);
+#2227 = FILL_AREA_STYLE('',(#2228));
+#2228 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2229 = STYLED_ITEM('color',(#2230),#1577);
+#2230 = PRESENTATION_STYLE_ASSIGNMENT((#2231));
+#2231 = SURFACE_STYLE_USAGE(.BOTH.,#2232);
+#2232 = SURFACE_SIDE_STYLE('',(#2233));
+#2233 = SURFACE_STYLE_FILL_AREA(#2234);
+#2234 = FILL_AREA_STYLE('',(#2235));
+#2235 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2236 = STYLED_ITEM('color',(#2237),#1596);
+#2237 = PRESENTATION_STYLE_ASSIGNMENT((#2238));
+#2238 = SURFACE_STYLE_USAGE(.BOTH.,#2239);
+#2239 = SURFACE_SIDE_STYLE('',(#2240));
+#2240 = SURFACE_STYLE_FILL_AREA(#2241);
+#2241 = FILL_AREA_STYLE('',(#2242));
+#2242 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2243 = STYLED_ITEM('color',(#2244),#1615);
+#2244 = PRESENTATION_STYLE_ASSIGNMENT((#2245));
+#2245 = SURFACE_STYLE_USAGE(.BOTH.,#2246);
+#2246 = SURFACE_SIDE_STYLE('',(#2247));
+#2247 = SURFACE_STYLE_FILL_AREA(#2248);
+#2248 = FILL_AREA_STYLE('',(#2249));
+#2249 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2250 = STYLED_ITEM('color',(#2251),#1634);
+#2251 = PRESENTATION_STYLE_ASSIGNMENT((#2252));
+#2252 = SURFACE_STYLE_USAGE(.BOTH.,#2253);
+#2253 = SURFACE_SIDE_STYLE('',(#2254));
+#2254 = SURFACE_STYLE_FILL_AREA(#2255);
+#2255 = FILL_AREA_STYLE('',(#2256));
+#2256 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2257 = STYLED_ITEM('color',(#2258),#1653);
+#2258 = PRESENTATION_STYLE_ASSIGNMENT((#2259));
+#2259 = SURFACE_STYLE_USAGE(.BOTH.,#2260);
+#2260 = SURFACE_SIDE_STYLE('',(#2261));
+#2261 = SURFACE_STYLE_FILL_AREA(#2262);
+#2262 = FILL_AREA_STYLE('',(#2263));
+#2263 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2264 = STYLED_ITEM('color',(#2265),#1672);
+#2265 = PRESENTATION_STYLE_ASSIGNMENT((#2266));
+#2266 = SURFACE_STYLE_USAGE(.BOTH.,#2267);
+#2267 = SURFACE_SIDE_STYLE('',(#2268));
+#2268 = SURFACE_STYLE_FILL_AREA(#2269);
+#2269 = FILL_AREA_STYLE('',(#2270));
+#2270 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2271 = STYLED_ITEM('color',(#2272),#1691);
+#2272 = PRESENTATION_STYLE_ASSIGNMENT((#2273));
+#2273 = SURFACE_STYLE_USAGE(.BOTH.,#2274);
+#2274 = SURFACE_SIDE_STYLE('',(#2275));
+#2275 = SURFACE_STYLE_FILL_AREA(#2276);
+#2276 = FILL_AREA_STYLE('',(#2277));
+#2277 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2278 = STYLED_ITEM('color',(#2279),#1710);
+#2279 = PRESENTATION_STYLE_ASSIGNMENT((#2280));
+#2280 = SURFACE_STYLE_USAGE(.BOTH.,#2281);
+#2281 = SURFACE_SIDE_STYLE('',(#2282));
+#2282 = SURFACE_STYLE_FILL_AREA(#2283);
+#2283 = FILL_AREA_STYLE('',(#2284));
+#2284 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2285 = STYLED_ITEM('color',(#2286),#1729);
+#2286 = PRESENTATION_STYLE_ASSIGNMENT((#2287));
+#2287 = SURFACE_STYLE_USAGE(.BOTH.,#2288);
+#2288 = SURFACE_SIDE_STYLE('',(#2289));
+#2289 = SURFACE_STYLE_FILL_AREA(#2290);
+#2290 = FILL_AREA_STYLE('',(#2291));
+#2291 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2292 = STYLED_ITEM('color',(#2293),#1748);
+#2293 = PRESENTATION_STYLE_ASSIGNMENT((#2294));
+#2294 = SURFACE_STYLE_USAGE(.BOTH.,#2295);
+#2295 = SURFACE_SIDE_STYLE('',(#2296));
+#2296 = SURFACE_STYLE_FILL_AREA(#2297);
+#2297 = FILL_AREA_STYLE('',(#2298));
+#2298 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2299 = STYLED_ITEM('color',(#2300),#1767);
+#2300 = PRESENTATION_STYLE_ASSIGNMENT((#2301));
+#2301 = SURFACE_STYLE_USAGE(.BOTH.,#2302);
+#2302 = SURFACE_SIDE_STYLE('',(#2303));
+#2303 = SURFACE_STYLE_FILL_AREA(#2304);
+#2304 = FILL_AREA_STYLE('',(#2305));
+#2305 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2306 = STYLED_ITEM('color',(#2307),#1786);
+#2307 = PRESENTATION_STYLE_ASSIGNMENT((#2308));
+#2308 = SURFACE_STYLE_USAGE(.BOTH.,#2309);
+#2309 = SURFACE_SIDE_STYLE('',(#2310));
+#2310 = SURFACE_STYLE_FILL_AREA(#2311);
+#2311 = FILL_AREA_STYLE('',(#2312));
+#2312 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2313 = STYLED_ITEM('color',(#2314),#1805);
+#2314 = PRESENTATION_STYLE_ASSIGNMENT((#2315));
+#2315 = SURFACE_STYLE_USAGE(.BOTH.,#2316);
+#2316 = SURFACE_SIDE_STYLE('',(#2317));
+#2317 = SURFACE_STYLE_FILL_AREA(#2318);
+#2318 = FILL_AREA_STYLE('',(#2319));
+#2319 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2320 = STYLED_ITEM('color',(#2321),#1824);
+#2321 = PRESENTATION_STYLE_ASSIGNMENT((#2322));
+#2322 = SURFACE_STYLE_USAGE(.BOTH.,#2323);
+#2323 = SURFACE_SIDE_STYLE('',(#2324));
+#2324 = SURFACE_STYLE_FILL_AREA(#2325);
+#2325 = FILL_AREA_STYLE('',(#2326));
+#2326 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2327 = STYLED_ITEM('color',(#2328),#1843);
+#2328 = PRESENTATION_STYLE_ASSIGNMENT((#2329));
+#2329 = SURFACE_STYLE_USAGE(.BOTH.,#2330);
+#2330 = SURFACE_SIDE_STYLE('',(#2331));
+#2331 = SURFACE_STYLE_FILL_AREA(#2332);
+#2332 = FILL_AREA_STYLE('',(#2333));
+#2333 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2334 = STYLED_ITEM('color',(#2335),#1862);
+#2335 = PRESENTATION_STYLE_ASSIGNMENT((#2336));
+#2336 = SURFACE_STYLE_USAGE(.BOTH.,#2337);
+#2337 = SURFACE_SIDE_STYLE('',(#2338));
+#2338 = SURFACE_STYLE_FILL_AREA(#2339);
+#2339 = FILL_AREA_STYLE('',(#2340));
+#2340 = FILL_AREA_STYLE_COLOUR('',#1955);
+#2341 = STYLED_ITEM('color',(#2342),#1881);
+#2342 = PRESENTATION_STYLE_ASSIGNMENT((#2343));
+#2343 = SURFACE_STYLE_USAGE(.BOTH.,#2344);
+#2344 = SURFACE_SIDE_STYLE('',(#2345));
+#2345 = SURFACE_STYLE_FILL_AREA(#2346);
+#2346 = FILL_AREA_STYLE('',(#2347));
+#2347 = FILL_AREA_STYLE_COLOUR('',#1947);
+ENDSEC;
+END-ISO-10303-21;
viewers/footprint.htmladded+1
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viewers/symbol.htmladded+1
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