component

STM32H723ZGT6

Public Made by Adom

by adom

STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Datasheet-verified pinout, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32h723zgt6factory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

STM32H723ZGT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-144(20x20)

STM32H723ZGT6 from STMicroelectronics, in a LQFP-144(20x20). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional GPIO port E bit 2 with TRACECLK, SAI1/SAI4, SPI4, FMC, and Ethernet multiplexing; 5V tolerant high-speed I/O.
2 PE3 bidirectional GPIO port E bit 3 with TRACED0, TIM15, SAI1/SAI4, and FMC multiplexing; 5V tolerant high-speed I/O.
3 PE4 bidirectional GPIO port E bit 4 with TRACED1, SAI1, DFSDM1, TIM15, SPI4, and LCD multiplexing; 5V tolerant high-speed I/O.
4 PE5 bidirectional GPIO port E bit 5 with TRACED2, SAI1, DFSDM1, TIM15, SPI4, and LCD multiplexing; 5V tolerant high-speed I/O.
5 PE6 bidirectional GPIO port E bit 6 with TRACED3, TIM1_BKIN2, SAI1, TIM15, SPI4, and LCD multiplexing; 5V tolerant high-speed I/O.
6 VBAT power_in Battery backup supply voltage (1.62V to 3.6V) for RTC, backup registers, and SRAM.
7 PC13 bidirectional GPIO port C bit 13 with RTC tamper/timestamp and wake-up event input; 5V tolerant I/O.
8 PC14-OSC32_IN passive Low-speed external oscillator input for 32.768kHz crystal connection; 5V tolerant I/O.
9 PC15-OSC32_OUT passive Low-speed external oscillator output for 32.768kHz crystal connection; 5V tolerant I/O.
10 PF0 bidirectional GPIO port F bit 0 with I2C2/I2C5, OCTOSPIM_P2, and FMC multiplexing; 5V tolerant high-speed I/O.
11 PF1 bidirectional GPIO port F bit 1 with I2C2/I2C5, OCTOSPIM_P2, and FMC multiplexing; 5V tolerant high-speed I/O.
12 PF2 bidirectional GPIO port F bit 2 with I2C2/I2C5, OCTOSPIM_P2, and FMC multiplexing; 5V tolerant high-speed I/O.
13 PF3 bidirectional GPIO port F bit 3 with ADC3 analog input INP5/INN5; 5V tolerant high-speed analog I/O.
14 PF4 bidirectional GPIO port F bit 4 with ADC3 analog input INP9/INN5; 5V tolerant high-speed analog I/O.
15 PF5 bidirectional GPIO port F bit 5 with ADC3 analog input INP4; 5V tolerant high-speed analog I/O.
16 VSS power_in Ground connection for digital domain logic supply.
17 VDD power_in Main 3.3V supply for digital logic (1.62V to 3.6V).
18 PF6 bidirectional GPIO port F bit 6 with TIM16/TIM17, FDCAN3, SPI5, SAI1/SAI4, and ADC3 analog input; 5V tolerant high-speed analog I/O.
19 PF7 bidirectional GPIO port F bit 7 with TIM16/TIM17, FDCAN3, SPI5, SAI1/SAI4, and ADC3 analog input; 5V tolerant high-speed analog I/O.
20 PF8 bidirectional GPIO port F bit 8 with TIM16/TIM17, SPI5, SAI1/SAI4, TIM13/TIM14, and ADC3 analog input; 5V tolerant high-speed analog I/O.
21 PF9 bidirectional GPIO port F bit 9 with TIM16/TIM17, SPI5, SAI1/SAI4, TIM13/TIM14, and ADC3 analog input; 5V tolerant high-speed analog I/O.
22 PF10 bidirectional GPIO port F bit 10 with TIM16_BKIN, SAI1, PSSI_D15, OCTOSPIM_P1, SAI4, DCMI_D11, and LCD_DE; 5V tolerant high-speed analog I/O.
23 PH0-OSC_IN passive High-speed external oscillator input for 4-50MHz crystal connection; 5V tolerant I/O.
24 PH1-OSC_OUT passive High-speed external oscillator output for crystal feedback; 5V tolerant I/O.
25 NRST bidirectional Reset input pin with embedded weak pull-up resistor; bidirectional reset with LSIO control.
26 PC0 bidirectional GPIO port C bit 0 with FMC, DFSDM1, SAI4, OTG_HS, LCD, and ADC123 multiplexing; 5V tolerant high-speed analog I/O.
27 PC1 bidirectional GPIO port C bit 1 with SAI4, SAI1, DFSDM1, SPI2/I2S2, SDMMC2, OCTOSPIM_P1, ETH, and ADC123 multiplexing; 5V tolerant high-speed analog I/O.
28 PC2_C bidirectional GPIO port C bit 2 with analog-only option for ADC3 input INP0/INN1; 3.3V tolerant analog I/O.
29 PC3_C bidirectional GPIO port C bit 3 with analog-only option for ADC3 input INP1; 3.3V tolerant analog I/O.
30 VDD power_in Main 3.3V supply for digital logic (1.62V to 3.6V).
31 VSSA power_in Analog ground reference connection for ADC, DAC, OPAMP, and COMP.
32 VREF+ power_in Positive reference voltage input for 16-bit and 12-bit ADCs (1.62V to 3.6V).
33 VDDA power_in Analog supply voltage for ADC, DAC, OPAMP, COMP, and VREFBUF (1.62V to 3.6V).
34 PA0 bidirectional GPIO port A bit 0 with TIM2/TIM5/TIM8/TIM15, SPI6/I2S6, USART2, UART4, SDMMC2, SAI4, ETH, and ADC1 multiplexing; 5V tolerant high-speed analog I/O.
35 PA1 bidirectional GPIO port A bit 1 with TIM2/TIM5/TIM15, LPTIM3, USART2, UART4, OCTOSPIM_P1, SAI4, ETH, LCD, and ADC1 multiplexing; 5V tolerant high-speed analog I/O.
36 PA2 bidirectional GPIO port A bit 2 with TIM2/TIM5/TIM15, LPTIM4, OCTOSPIM_P1, USART2, SAI4, ETH, MDIOS, and ADC12 multiplexing; 5V tolerant high-speed analog I/O.
37 PA3 bidirectional GPIO port A bit 3 with TIM2/TIM5/TIM15, LPTIM5, I2S6, OCTOSPIM_P1, USART2, LCD, OTG_HS, ETH, and ADC12 multiplexing; 5V tolerant high-speed analog I/O.
38 VSS power_in Ground connection for digital domain logic supply.
39 VDD power_in Main 3.3V supply for digital logic (1.62V to 3.6V).
40 PA4 bidirectional GPIO port A bit 4 with D1PWREN, TIM5, SPI1/I2S1/SPI3/I2S3, USART2, SPI6/I2S6, FMC, DCMI, and DAC1_OUT1; 3.3V tolerant high-speed analog I/O.
41 PA5 bidirectional GPIO port A bit 5 with D2PWREN, TIM2/TIM8, SPI1/I2S1, SPI6/I2S6, OTG_HS, FMC, PSSI, LCD, and DAC1_OUT2; 3.3V tolerant high-speed analog I/O.
42 PA6 bidirectional GPIO port A bit 6 with TIM1_BKIN, TIM3, TIM8, SPI1/I2S1, OCTOSPIM_P1, SPI6/I2S6, TIM13, MDIOS, and DCMI; 5V tolerant high-speed analog I/O.
43 PA7 bidirectional GPIO port A bit 7 with TIM1_CH1N, TIM3, TIM8, SPI1/I2S1, SPI6/I2S6, TIM14, OCTOSPIM_P1, ETH, FMC, and LCD; 3.3V tolerant high-speed analog I/O.
44 PC4 bidirectional GPIO port C bit 4 with PWR_DEEPSLEEP, FMC, DFSDM1, I2S1, SPDIFRX1, SDMMC2, ETH, and ADC12 multiplexing; 3.3V tolerant high-speed analog I/O.
45 PC5 bidirectional GPIO port C bit 5 with PWR_SLEEP, SAI4/SAI1, DFSDM1, PSSI, SPDIFRX1, OCTOSPIM_P1, ETH, COMP1, and ADC12 multiplexing; 3.3V tolerant high-speed analog I/O.
46 PB0 bidirectional GPIO port B bit 0 with TIM1_CH2N, TIM3, TIM8, OCTOSPIM_P1, DFSDM1, UART4, LCD, OTG_HS, ETH, and ADC12 multiplexing; 3.3V tolerant high-speed analog I/O.
47 PB1 bidirectional GPIO port B bit 1 with TIM1_CH3N, TIM3, TIM8, OCTOSPIM_P1, DFSDM1, LCD, OTG_HS, ETH, and ADC12 multiplexing; 5V tolerant high-speed analog I/O.
48 PB2 bidirectional GPIO port B bit 2 with RTC_OUT, SAI4/SAI1, DFSDM1, SPI3/I2S3, OCTOSPIM_P1, ETH, and COMP1 multiplexing; 5V tolerant high-speed analog I/O.
49 PF11 bidirectional GPIO port F bit 11 with SPI5, OCTOSPIM_P1, SAI4, FMC, DCMI, and TIM24 multiplexing; 5V tolerant high-speed analog I/O.
50 PF12 bidirectional GPIO port F bit 12 with OCTOSPIM_P2, FMC, and TIM24 multiplexing; 5V tolerant high-speed analog I/O.
51 VSS power_in Ground connection for digital domain logic supply.
52 VDD power_in Main 3.3V supply for digital logic (1.62V to 3.6V).
53 PF13 bidirectional GPIO port F bit 13 with DFSDM1, I2C4, FMC, TIM24 multiplexing, and ADC2 input; 5V tolerant high-speed analog I/O.
54 PF14 bidirectional GPIO port F bit 14 with DFSDM1, I2C4, FMC, TIM24 multiplexing, and ADC2 analog input; 5V tolerant I2C FM+ high-speed analog I/O.
55 PF15 bidirectional GPIO port F bit 15 with I2C4 and FMC multiplexing; 5V tolerant I2C FM+ high-speed I/O.
56 PG0 bidirectional GPIO port G bit 0 with OCTOSPIM_P2, UART9, and FMC multiplexing; 5V tolerant high-speed I/O.
57 PG1 bidirectional GPIO port G bit 1 with OCTOSPIM_P2, UART9, FMC, and OPAMP2_VINM multiplexing; 3.3V tolerant high-speed I/O.
58 PE7 bidirectional GPIO port E bit 7 with TIM1, DFSDM1, UART7, OCTOSPIM_P1, FMC, OPAMP2, and COMP2 multiplexing; 3.3V tolerant high-speed analog I/O.
59 PE8 bidirectional GPIO port E bit 8 with TIM1, DFSDM1, UART7, OCTOSPIM_P1, FMC, COMP2_OUT, and OPAMP2_VINM multiplexing; 3.3V tolerant high-speed analog I/O.
60 PE9 bidirectional GPIO port E bit 9 with TIM1, DFSDM1, UART7, OCTOSPIM_P1, FMC, OPAMP2_VINP, and COMP2_INP multiplexing; 3.3V tolerant high-speed analog I/O.
61 VSS power_in Ground connection for digital domain logic supply.
62 VDD power_in Main 3.3V supply for digital logic (1.62V to 3.6V).
63 PE10 bidirectional GPIO port E bit 10 with TIM1, DFSDM1, UART7, OCTOSPIM_P1, FMC, and COMP2_INM multiplexing; 5V tolerant high-speed analog I/O.
64 PE11 bidirectional GPIO port E bit 11 with TIM1, DFSDM1, SPI4, SAI4, OCTOSPIM_P1, FMC, LCD_G3, and COMP2_INP multiplexing; 5V tolerant high-speed analog I/O.
65 PE12 bidirectional GPIO port E bit 12 with TIM1, DFSDM1, SPI4, SAI4, FMC, COMP1_OUT, and LCD_B4 multiplexing; 5V tolerant high-speed I/O.
66 PE13 bidirectional GPIO port E bit 13 with TIM1, DFSDM1, SPI4, SAI4, FMC, COMP2_OUT, and LCD_DE multiplexing; 5V tolerant high-speed I/O.
67 PE14 bidirectional GPIO port E bit 14 with TIM1, SPI4, SAI4, FMC, and LCD_CLK multiplexing; 5V tolerant high-speed I/O.
68 PE15 bidirectional GPIO port E bit 15 with TIM1_BKIN, USART10, FMC, TIM1_BKIN_COMP12, and LCD_R7 multiplexing; 5V tolerant high-speed I/O.
69 PB10 bidirectional GPIO port B bit 10 with TIM2, LPTIM2, I2C2, SPI2/I2S2, DFSDM1, USART3, OCTOSPIM_P1, OTG_HS, ETH, and LCD_G4; 5V tolerant I2C FM+ high-speed I/O.
70 PB11 bidirectional GPIO port B bit 11 with TIM2, LPTIM2, I2C2, DFSDM1, USART3, OTG_HS, ETH, and LCD_G5; 5V tolerant I2C FM+ I/O.
71 VCAP passive Connection point for external 2.2µF capacitor filtering the internal LDO regulator output voltage.
72 VDD power_in Main 3.3V supply for digital logic (1.62V to 3.6V).
73 PB12 bidirectional GPIO port B bit 12 with TIM1_BKIN, OCTOSPIM_P1, I2C2, SPI2/I2S2, DFSDM1, USART3, FDCAN2, OTG_HS, ETH, and UART5 multiplexing; 5V tolerant high-speed I/O.
74 PB13 bidirectional GPIO port B bit 13 with TIM1_CH1N, LPTIM2, OCTOSPIM_P1, SPI2/I2S2, DFSDM1, USART3, FDCAN2, OTG_HS, ETH, SDMMC1, and DCMI; 5V tolerant high-speed I/O.
75 PB14 bidirectional GPIO port B bit 14 with TIM1_CH2N, TIM12, TIM8, USART1, SPI2/I2S2, DFSDM1, USART3, UART4, SDMMC2, and FMC; 5V tolerant high-speed I/O.
76 PB15 bidirectional GPIO port B bit 15 with RTC_REFIN, TIM1_CH3N, TIM12, TIM8, USART1, SPI2/I2S2, DFSDM1, UART4, SDMMC2, and LCD_G7; 5V tolerant high-speed I/O.
77 PD8 bidirectional GPIO port D bit 8 with DFSDM1, USART3, SPDIFRX1, and FMC multiplexing; 5V tolerant high-speed I/O.
78 PD9 bidirectional GPIO port D bit 9 with DFSDM1, USART3, and FMC multiplexing; 5V tolerant high-speed I/O.
79 PD10 bidirectional GPIO port D bit 10 with DFSDM1, USART3, FMC, and LCD_B3 multiplexing; 5V tolerant high-speed I/O.
80 PD11 bidirectional GPIO port D bit 11 with LPTIM2, I2C4, USART3, OCTOSPIM_P1, and SAI4 multiplexing; 5V tolerant high-speed I/O.
81 PD12 bidirectional GPIO port D bit 12 with LPTIM1, TIM4, LPTIM2, I2C4, FDCAN3, USART3, OCTOSPIM_P1, SAI4, and DCMI; 5V tolerant I2C FM+ high-speed I/O.
82 PD13 bidirectional GPIO port D bit 13 with LPTIM1, TIM4, I2C4, FDCAN3, OCTOSPIM_P1, SAI4, UART9, and DCMI; 5V tolerant I2C FM+ high-speed I/O.
83 VSS power_in Ground connection for digital domain logic supply.
84 VDD power_in Main 3.3V supply for digital logic (1.62V to 3.6V).
85 PD14 bidirectional GPIO port D bit 14 with TIM4, UART8, UART9, and FMC multiplexing; 5V tolerant high-speed I/O.
86 PD15 bidirectional GPIO port D bit 15 with TIM4, UART8, UART9, and FMC multiplexing; 5V tolerant high-speed I/O.
87 PG2 bidirectional GPIO port G bit 2 with TIM8, TIM8_BKIN_COMP12, FMC, and TIM24_ETR multiplexing; 5V tolerant high-speed I/O.
88 PG3 bidirectional GPIO port G bit 3 with TIM8, TIM8_BKIN2_COMP12, FMC, and TIM23_ETR multiplexing; 5V tolerant high-speed I/O.
89 PG4 bidirectional GPIO port G bit 4 with TIM1_BKIN2, TIM1_BKIN2_COMP12, FMC_BA0, and FMC_A14 multiplexing; 5V tolerant high-speed I/O.
90 PG5 bidirectional GPIO port G bit 5 with TIM1_ETR, FMC_BA1, and FMC_A15 multiplexing; 5V tolerant high-speed I/O.
91 PG6 bidirectional GPIO port G bit 6 with TIM17_BKIN, OCTOSPIM_P1, FMC_NE3, DCMI_D12, and LCD_R7 multiplexing; 5V tolerant high-speed I/O.
92 PG7 bidirectional GPIO port G bit 7 with SAI1, USART6, OCTOSPIM_P2, FMC_INT, DCMI_D13, and LCD_CLK multiplexing; 5V tolerant high-speed I/O.
93 PG8 bidirectional GPIO port G bit 8 with TIM8, SPI6/I2S6, USART6, SPDIFRX1, ETH_PPS, FMC_SDCLK, and LCD_G7; 5V tolerant high-speed I/O.
94 VSS power_in Ground connection for digital domain logic supply.
95 VDD33USB power_in USB domain supply voltage (3.0V to 3.6V when USB is used, 0V to 3.6V when not used).
96 PC6 bidirectional GPIO port C bit 6 with TIM3, TIM8, DFSDM1, I2S2, USART6, SDMMC1, FMC, DCMI, LCD_HSYNC, and SWPMI_IO; 5V tolerant high-speed I/O.
97 PC7 bidirectional GPIO port C bit 7 with DBTRGIO, TIM3, TIM8, DFSDM1, I2S3, USART6, SDMMC1, FMC, DCMI, SWPMI_TX, and LCD_G6; 5V tolerant high-speed I/O.
98 PC8 bidirectional GPIO port C bit 8 with TRACED1, TIM3, TIM8, USART6, UART5, FMC, SWPMI_RX, SDMMC1, and DCMI; 5V tolerant high-speed I/O.
99 PC9 bidirectional GPIO port C bit 9 with MCO2, TIM3, TIM8, I2C3/I2C5, I2S_CKIN, UART5, OCTOSPIM_P1, LCD, SWPMI_SUSPEND, and DCMI; 5V tolerant I2C FM+ high-speed I/O.
100 PA8 bidirectional GPIO port A bit 8 with MCO1, TIM1, TIM8_BKIN2, I2C3/I2C5, USART1, OTG_HS, UART7, and LCD multiplexing; 5V tolerant I2C FM+ high-speed I/O.
101 PA9 bidirectional GPIO port A bit 9 with TIM1, LPUART1, I2C3/I2C5, SPI2/I2S2, USART1, ETH, DCMI, and LCD_R5; USB-domain 5V tolerant I/O.
102 PA10 bidirectional GPIO port A bit 10 with TIM1, LPUART1, USART1, OTG_HS_ID, MDIOS, LCD_B4, and DCMI; USB-domain 5V tolerant I/O.
103 PA11 bidirectional GPIO port A bit 11 with TIM1, LPUART1, SPI2/I2S2, UART4, USART1, FDCAN1, and LCD_R4; USB-domain 5V tolerant I/O (OTG_HS_DM).
104 PA12 bidirectional GPIO port A bit 12 with TIM1, LPUART1, SPI2/I2S2, UART4, USART1, SAI4, FDCAN1, and LCD_R5; USB-domain 5V tolerant I/O (OTG_HS_DP).
105 PA13 bidirectional JTAG test mode select / SWD serial wire data I/O pin for debug interface; 5V tolerant I/O.
106 VCAP passive Connection point for external 2.2µF capacitor filtering the internal LDO regulator output voltage.
107 VSS power_in Ground connection for digital domain logic supply.
108 VDD power_in Main 3.3V supply for digital logic (1.62V to 3.6V).
109 PA14 bidirectional JTAG test clock / SWD serial wire clock pin for debug interface; 5V tolerant I/O.
110 PA15 bidirectional JTAG test data in / trace SWO pin with TIM2, CEC, SPI1/I2S1/SPI3/I2S3, UART4, and LCD multiplexing; 5V tolerant I/O.
111 PC10 bidirectional GPIO port C bit 10 with DFSDM1, I2C5, SPI3/I2S3, USART3, UART4, OCTOSPIM_P1, LCD_B1, SWPMI_RX, SDMMC1, and DCMI; 5V tolerant I2C FM+ high-speed I/O.
112 PC11 bidirectional GPIO port C bit 11 with DFSDM1, I2C5, SPI3/I2S3, USART3, UART4, OCTOSPIM_P1, SDMMC1, DCMI, and LCD_B4; 5V tolerant I2C FM+ high-speed I/O.
113 PC12 bidirectional GPIO port C bit 12 with TRACED3, FMC, TIM15, I2C5, SPI6/I2S6, SPI3/I2S3, USART3, UART5, SDMMC1, DCMI, and LCD_R6; 5V tolerant high-speed I/O.
114 PD0 bidirectional GPIO port D bit 0 with DFSDM1, UART4, FDCAN1, UART9, FMC, and LCD_B1 multiplexing; 5V tolerant high-speed I/O.
115 PD1 bidirectional GPIO port D bit 1 with DFSDM1, UART4, FDCAN1, and FMC multiplexing; 5V tolerant high-speed I/O.
116 PD2 bidirectional GPIO port D bit 2 with TRACED2, FMC, TIM3, TIM15, UART5, LCD_B7, SDMMC1, and DCMI; 5V tolerant high-speed I/O.
117 PD3 bidirectional GPIO port D bit 3 with DFSDM1, SPI2/I2S2, USART2, FMC_CLK, DCMI_D5, and LCD_G7 multiplexing; 5V tolerant high-speed I/O.
118 PD4 bidirectional GPIO port D bit 4 with USART2, OCTOSPIM_P1, FMC_NOE multiplexing; 5V tolerant high-speed I/O.
119 PD5 bidirectional GPIO port D bit 5 with USART2 and OCTOSPIM_P1_IO5, FMC_NWE multiplexing; 5V tolerant high-speed I/O.
120 VSS power_in Ground connection for digital domain logic supply.
121 VDD power_in Main 3.3V supply for digital logic (1.62V to 3.6V).
122 PD6 bidirectional GPIO port D bit 6 with SAI4/SAI1, DFSDM1, SPI3/I2S3, USART2, SDMMC2, FMC_NWAIT, and DCMI multiplexing; 5V tolerant high-speed I/O.
123 PD7 bidirectional GPIO port D bit 7 with DFSDM1, SPI1/I2S1, USART2, SPDIFRX1, OCTOSPIM_P1, SDMMC2, FMC_NE1 multiplexing; 5V tolerant high-speed I/O.
124 PG9 bidirectional GPIO port G bit 9 with FDCAN3, SPI1/I2S1, USART6, SPDIFRX1, OCTOSPIM_P1, SAI4, SDMMC2, FMC, and DCMI; 5V tolerant high-speed I/O.
125 PG10 bidirectional GPIO port G bit 10 with FDCAN3, OCTOSPIM_P2, SPI1/I2S1, LCD_G3, SAI4, SDMMC2, FMC_NE3, and DCMI; 5V tolerant high-speed I/O.
126 PG11 bidirectional GPIO port G bit 11 with LPTIM1, USART10, SPI1/I2S1, SPDIFRX1, OCTOSPIM_P2, SDMMC2, and ETH; 5V tolerant high-speed I/O.
127 PG12 bidirectional GPIO port G bit 12 with LPTIM1, OCTOSPIM_P2, USART10, SPI6/I2S6, USART6, SPDIFRX1, LCD_B4, SDMMC2, FMC, and TIM23; 5V tolerant high-speed I/O.
128 PG13 bidirectional GPIO port G bit 13 with TRACED0, LPTIM1, USART10, SPI6/I2S6, USART6, SDMMC2, ETH, FMC_A24, and TIM23; 5V tolerant high-speed I/O.
129 PG14 bidirectional GPIO port G bit 14 with TRACED1, LPTIM1, USART10, SPI6/I2S6, USART6, OCTOSPIM_P1, SDMMC2, ETH, FMC_A25, and TIM23; 5V tolerant high-speed I/O.
130 VSS power_in Ground connection for digital domain logic supply.
131 VDD power_in Main 3.3V supply for digital logic (1.62V to 3.6V).
132 PG15 bidirectional GPIO port G bit 15 with USART6, OCTOSPIM_P2, USART10, FMC_NCAS, and DCMI multiplexing; 5V tolerant high-speed I/O.
133 PB3 bidirectional JTAG test data output / trace single-wire output with TIM2, SPI1/I2S1, SPI3/I2S3, SPI6/I2S6, SDMMC2, CRS, UART7, and TIM24; 5V tolerant high-speed I/O.
134 PB4 bidirectional NJTRST JTAG test reset with TIM16, TIM3, SPI1/I2S1, SPI3/I2S3, SPI2/I2S2, SPI6/I2S6, SDMMC2, and UART7; 5V tolerant high-speed I/O.
135 PB5 bidirectional GPIO port B bit 5 with TIM16/TIM17, TIM3, LCD_B5, I2C1/I2C4, SPI1/I2S1, SPI3/I2S3, SPI6/I2S6, FDCAN2, OTG_HS, ETH, FMC, and DCMI; 5V tolerant high-speed I/O.
136 PB6 bidirectional GPIO port B bit 6 with TIM16, TIM4, I2C1, CEC, I2C4, USART1, LPUART1, FDCAN2, OCTOSPIM_P1, DFSDM1, FMC, and DCMI; 5V tolerant I2C FM+ high-speed I/O.
137 PB7 bidirectional GPIO port B bit 7 with TIM16/TIM17, TIM4, I2C1, I2C4, USART1, LPUART1, DFSDM1, FMC_NL, DCMI_VSYNC, and PVD_IN; 5V tolerant high-speed I/O with analog input.
138 BOOT0 input Boot mode selection pin determining boot from flash (low) or system memory (high); accepts 0V to 9V.
139 PB8 bidirectional GPIO port B bit 8 with TIM16, TIM4, DFSDM1, I2C1/I2C4, SDMMC1, UART4, FDCAN1, SDMMC2, ETH, and DCMI; 5V tolerant I2C FM+ high-speed I/O.
140 PB9 bidirectional GPIO port B bit 9 with TIM16/TIM17, TIM4, DFSDM1, I2C1/I2C4, SPI2/I2S2, SDMMC1, UART4, FDCAN1, SDMMC2, and DCMI; 5V tolerant I2C FM+ high-speed I/O.
141 PE0 bidirectional GPIO port E bit 0 with LPTIM1, TIM4, LPTIM2, UART8, SAI4, FMC_NBL0, DCMI_D2, and LCD_R0 multiplexing; 5V tolerant high-speed I/O.
142 PE1 bidirectional GPIO port E bit 1 with LPTIM1, UART8, FMC_NBL1, DCMI_D3, and LCD_R6 multiplexing; 5V tolerant high-speed I/O.
143 PDR_ON output Power Down Regulator ON control output signal for external power management.
144 VDD power_in Main 3.3V supply for digital logic (1.62V to 3.6V).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-144(20x20)
Category Embedded Processors & Controllers
Pins 144

CAD (KiCad official)

  • Symbol: STM32H723ZGT6
  • Footprint: Package_QFP:LQFP-144_20x20mm_P0.5mm
  • 3D model: LQFP-144(20x20) (KiCad packages3D, STEP)
  • 3D model files: stm32h723zgt6-etched.step / stm32h723zgt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32h723zgt6.step / stm32h723zgt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (225 pp, sha256 c3741ebfd15024ac, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF