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STM32H573IIT3Q
Public Made by Adomby adom
STMICROELECTRONICS Global Sourcing Parts, LQFP-176(24x24). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32H573IIT3Q
STMICROELECTRONICS · Global Sourcing Parts · LQFP-176(24x24)
STM32H573IIT3Q from STMICROELECTRONICS, in a LQFP-176(24x24). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | FT_h I/O with TRACECLK, LPTIM1_IN2, SAI1_CK1, SPI4_SCK, USART10_RX, OCTOSPI1_IO2, ETH_MII_TXD3, FMC_A23 and DCMI_D3/PSSI_D3 alternate functions. |
| 2 | PE3 | bidirectional | FT_h I/O with TRACED0, TIM15_BKIN, SAI1_SD_B, USART10_TX and FMC_A19 alternate functions; additional functions TAMP_IN6/TAMP_OUT3. |
| 3 | PE4 | bidirectional | FT_h I/O with TRACED1, SAI1_D2, TIM15_CH1N, SPI4_NSS, SAI1_FS_A, FMC_A20 and DCMI_D4/PSSI_D4 alternate functions; additional functions TAMP_IN7/TAMP_OUT8. |
| 4 | PE5 | bidirectional | FT_h I/O with TRACED2, SAI1_CK2, TIM15_CH1, SPI4_MISO, SAI1_SCK_A, FMC_A21 and DCMI_D6/PSSI_D6 alternate functions; additional functions TAMP_IN8/TAMP_OUT7. |
| 5 | PE6 | bidirectional | FT_h I/O with TRACED3, TIM1_BKIN2, SAI1_D1, TIM15_CH2, SPI4_MOSI, SAI1_SD_A, SAI2_MCLK_B, FMC_A22 and DCMI_D7/PSSI_D7 alternate functions; additional functions TAMP_IN3/TAMP_OUT6. |
| 6 | VBAT | power_in | Backup battery supply for the RTC, backup registers and backup domain. |
| 7 | PI8 | bidirectional | FT_t I/O with EVENTOUT; additional functions TAMP_IN2/TAMP_OUT3, RTC_OUT2, WKUP3; tamper input/output functional in Standby and VBAT mode. |
| 8 | PC13 | bidirectional | FT_t I/O with EVENTOUT supplied via the VSW power switch (output speed at most 2 MHz, 30 pF max load, not a current source); additional functions TAMP_IN1/TAMP_OUT2/TAMP_OUT3, RTC_OUT1/RTC_TS, WKUP4. |
| 9 | PC14-OSC32_IN | bidirectional | FT I/O (PC14) that serves as the 32.768 kHz LSE oscillator input OSC32_IN; supplied via the VSW power switch with limited output (2 MHz, 30 pF max). |
| 10 | PC15-OSC32_OUT | bidirectional | FT I/O (PC15) that serves as the 32.768 kHz LSE oscillator output OSC32_OUT; supplied via the VSW power switch with limited output (2 MHz, 30 pF max). |
| 11 | PI9 | bidirectional | FT_h I/O with UART4_RX, FDCAN1_RX and EVENTOUT alternate functions. |
| 12 | PI10 | bidirectional | FT_h I/O with FDCAN1_RX, ETH_MII_RX_ER, PSSI_D14 and EVENTOUT alternate functions. |
| 13 | PI11 | bidirectional | FT I/O with PSSI_D15 and EVENTOUT alternate functions; additional functions TAMP_IN4/TAMP_OUT5. |
| 14 | VSS | power_in | Digital ground supply pin. |
| 15 | VDD | power_in | Digital supply pin (1.71 V to 3.6 V standard operating range with HSLV = 0). |
| 16 | PF0 | bidirectional | FT_f (Fm+ capable) I/O with I2C2_SDA, FMC_A0, LPTIM5_CH1 and EVENTOUT alternate functions. |
| 17 | PF1 | bidirectional | FT_f (Fm+ capable) I/O with I2C2_SCL, FMC_A1, LPTIM5_CH2 and EVENTOUT alternate functions. |
| 18 | PF2 | bidirectional | FT_h I/O with LPTIM3_CH2, LPTIM3_IN2, I2C2_SMBA, UART12_TX, USART11_CK, FMC_A2 and LPTIM5_IN1 alternate functions. |
| 19 | PF3 | bidirectional | FT_h I/O with LPTIM3_IN1, USART11_TX, FMC_A3 and LPTIM5_IN2 alternate functions. |
| 20 | PF4 | bidirectional | FT_h I/O with LPTIM3_ETR, USART11_RX and FMC_A4 alternate functions. |
| 21 | PF5 | bidirectional | FT_fh I/O with LPTIM3_CH1, I2C4_SCL, I3C1_SCL, UART12_RX, USART11_CTS/NSS and FMC_A5 alternate functions. |
| 22 | VSS | power_in | Digital ground supply pin. |
| 23 | VDD | power_in | Digital supply pin (1.71 V to 3.6 V standard operating range with HSLV = 0). |
| 24 | PF6 | bidirectional | FT_h I/O with TIM16_CH1, SPI5_NSS, SAI1_SD_B, UART7_RX, OCTOSPI1_IO3 and LPTIM5_CH1 alternate functions. |
| 25 | PF7 | bidirectional | FT_h I/O with TIM17_CH1, SPI5_SCK, SAI1_MCLK_B, UART7_TX, OCTOSPI1_IO2 and LPTIM5_CH2 alternate functions. |
| 26 | PF8 | bidirectional | FT_h I/O with TIM16_CH1N, SPI5_MISO, SAI1_SCK_B, UART7_RTS/DE, TIM13_CH1, OCTOSPI1_IO0 and LPTIM5_IN1 alternate functions. |
| 27 | PF9 | bidirectional | FT_h I/O with TIM17_CH1N, SPI5_MOSI, SAI1_FS_B, UART7_CTS, TIM14_CH1, OCTOSPI1_IO1 and LPTIM5_IN2 alternate functions. |
| 28 | PH0-OSC_IN | bidirectional | FT I/O (PH0) that serves as the 4-50 MHz HSE oscillator input OSC_IN. |
| 29 | PH1-OSC_OUT | bidirectional | FT I/O (PH1) that serves as the 4-50 MHz HSE oscillator output OSC_OUT. |
| 30 | NRST | bidirectional | Bidirectional active-low reset pin with embedded weak pull-up resistor. |
| 31 | PC0 | bidirectional | FT_a I/O with TIM16_BKIN, SAI1_MCLK_A, SPI2_RDY, SAI2_FS_B, FMC_A25, OCTOSPI1_IO7 and FMC_SDNWE alternate functions; additional function ADC12_INP10. |
| 32 | PC1 | bidirectional | FT_ah I/O with TRACED0, SAI1_D1, SPI2_MOSI/I2S2_SDO, SDMMC2_CK, OCTOSPI1_IO4 and ETH_MDC alternate functions; additional functions ADC12_INP11/INN10, TAMP_IN3/TAMP_OUT5, WKUP6. |
| 33 | PC2 | bidirectional | FT_a I/O with PWR_CSLEEP, TIM17_CH1, TIM4_CH4, SPI2_MISO/I2S2_SDI, OCTOSPI1_IO5/IO2, ETH_MII_TXD2 and FMC_SDNE0 alternate functions; additional functions ADC12_INP12/INN11. |
| 34 | PC3 | bidirectional | FT_a I/O with PWR_CSTOP, SAI1_D3, LPTIM3_CH1, SPI2_MOSI/I2S2_SDO, OCTOSPI1_IO6/IO0, ETH_MII_TX_CLK and FMC_SDCKE0 alternate functions; additional functions ADC12_INP13/INN12. |
| 35 | VDD | power_in | Digital supply pin (1.71 V to 3.6 V standard operating range with HSLV = 0). |
| 36 | VSSA | power_in | Analog ground supply pin. |
| 37 | VREF+ | power_in | Positive reference voltage input/output for the ADCs and DAC, also used by the internal VREFBUF; may exceed VDDA by at most 0.4 V. |
| 38 | VDDA | power_in | Analog supply pin for ADC, DAC and other analog blocks. |
| 39 | PA0 | bidirectional | FT_at I/O with TIM2_CH1, TIM5_CH1, TIM8_ETR, TIM15_BKIN, SPI6_NSS, USART2_CTS/NSS, UART4_TX, SDMMC2_CMD, SAI2_SD_B and ETH_MII_CRS alternate functions; additional functions ADC12_INP0/INN1, TAMP_IN2/TAMP_OUT1, WKUP1. |
| 40 | PA1 | bidirectional | FT_aht I/O with TIM2_CH2, TIM5_CH2, TIM15_CH1N, LPTIM1_IN1, OCTOSPI1_DQS, USART2_RTS/DE, UART4_RX, SAI2_MCLK_B and ETH_MII_RX_CLK/RMII_REF_CLK alternate functions; additional functions ADC12_INP1, TAMP_IN5/TAMP_OUT4. |
| 41 | PA2 | bidirectional | FT_hat I/O with TIM2_CH3, TIM5_CH3, TIM15_CH1, LPTIM1_IN2, USART2_TX, SAI2_SCK_B and ETH_MDIO alternate functions; additional functions ADC12_INP14, TAMP_IN4/TAMP_OUT3, WKUP2. |
| 42 | PH2 | bidirectional | FT_h I/O with LPTIM1_IN2, OCTOSPI1_IO4, SAI2_SCK_B, ETH_MII_CRS and FMC_SDCKE0 alternate functions. |
| 43 | PH3 | bidirectional | FT_ah I/O with OCTOSPI1_IO5, SAI2_MCLK_B, ETH_MII_COL and FMC_SDNE0 alternate functions. |
| 44 | PA3 | bidirectional | FT_ah I/O with TIM2_CH4, TIM5_CH4, OCTOSPI1_CLK, TIM15_CH2, SPI2_NSS/I2S2_WS, SAI1_SD_B, USART2_RX and ETH_MII_COL alternate functions; additional function ADC12_INP15. |
| 45 | VSS | power_in | Digital ground supply pin. |
| 46 | VDD | power_in | Digital supply pin (1.71 V to 3.6 V standard operating range with HSLV = 0). |
| 47 | PA4 | bidirectional | TT_a (3.6 V-tolerant) I/O with TIM5_ETR, LPTIM2_CH1, SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, USART2_CK, SPI6_NSS and DCMI_HSYNC/PSSI_DE alternate functions; additional functions ADC12_INP18, DAC1_OUT1. |
| 48 | PA5 | bidirectional | TT_ah (3.6 V-tolerant) I/O with TIM2_CH1, TIM8_CH1N, SPI1_SCK/I2S1_CK, SPI6_SCK, ETH_MII_TX_EN/RMII_TX_EN and PSSI_D14 alternate functions; additional functions ADC12_INP19/INN18, DAC1_OUT2. |
| 49 | PA6 | bidirectional | FT_ah I/O with TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO/I2S1_SDI, OCTOSPI1_IO3, USART11_TX, SPI6_MISO, TIM13_CH1 and DCMI_PIXCLK/PSSI_PDCK alternate functions; additional function ADC12_INP3. |
| 50 | PA7 | bidirectional | FT_ah I/O with TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI/I2S1_SDO, USART11_RX, SPI6_MOSI, TIM14_CH1, OCTOSPI1_IO2, ETH_MII_RX_DV/RMII_CRS_DV and FMC_SDNWE/NWE alternate functions; additional functions ADC12_INP7/INN3. |
| 51 | PC4 | bidirectional | FT_a I/O with TIM2_CH4, SAI1_CK1, LPTIM2_ETR, I2S1_MCK, USART3_RX, ETH_MII_RXD0/RMII_RXD0 and FMC_SDNE0 alternate functions; additional function ADC12_INP4. |
| 52 | PC5 | bidirectional | FT_ah I/O with TIM1_CH4N, SAI1_D3, PSSI_D15, SAI1_FS_A, UART12_RTS/DE, OCTOSPI1_DQS, ETH_MII_RXD1/RMII_RXD1 and FMC_SDCKE0 alternate functions; additional functions ADC12_INP8/INN4. |
| 53 | PB0 | bidirectional | FT_ah I/O with TIM1_CH2N, TIM3_CH3, TIM8_CH2N, OCTOSPI1_IO1, USART11_CK, UART4_CTS, ETH_MII_RXD2 and LPTIM3_CH1 alternate functions; additional functions ADC12_INP9/INN5. |
| 54 | PB1 | bidirectional | FT_ah I/O with TIM1_CH3N, TIM3_CH4, TIM8_CH3N, OCTOSPI1_IO0, ETH_MII_RXD3 and LPTIM3_CH2 alternate functions; additional function ADC12_INP5. |
| 55 | PB2 | bidirectional | FT_ah I/O with RTC_OUT2, SAI1_D1, TIM8_CH4N, SPI1_RDY, LPTIM1_CH1, SAI1_SD_A, SPI3_MOSI/I2S3_SDO, OCTOSPI1_CLK/DQS, SDMMC1_CMD and LPTIM5_ETR alternate functions; additional function LSCO. |
| 56 | PF11 | bidirectional | FT_ah I/O with SPI5_MOSI, OCTOSPI1_NCLK, SAI2_SD_B, FMC_NRAS, DCMI_D12/PSSI_D12 and LPTIM6_CH1 alternate functions; additional function ADC1_INP2. |
| 57 | PF12 | bidirectional | FT_ah I/O with FMC_A6 and LPTIM6_CH2 alternate functions; additional functions ADC1_INP6/INN2. |
| 58 | VSS | power_in | Digital ground supply pin. |
| 59 | VDD | power_in | Digital supply pin (1.71 V to 3.6 V standard operating range with HSLV = 0). |
| 60 | PF13 | bidirectional | FT_ah I/O with I2C4_SMBA, FMC_A7 and LPTIM6_IN1 alternate functions; additional function ADC2_INP2. |
| 61 | PF14 | bidirectional | FT_fah (Fm+ capable) I/O with FMC_A8 and LPTIM6_IN2 alternate functions; additional functions ADC2_INP6/INN2. |
| 62 | PF15 | bidirectional | FT_fh (Fm+ capable) I/O with I2C4_SDA, I3C1_SDA and FMC_A9 alternate functions. |
| 63 | PG0 | bidirectional | FT_h I/O with UART9_RX, FMC_A10 and LPTIM4_IN1 alternate functions. |
| 64 | PG1 | bidirectional | FT_h I/O with SPI2_MOSI/I2S2_SDO, UART9_TX and FMC_A11 alternate functions. |
| 65 | PE7 | bidirectional | FT_ah I/O with TIM1_ETR, UART12_RTS/DE, UART7_RX, OCTOSPI1_IO4 and FMC_D4/AD4 alternate functions. |
| 66 | PE8 | bidirectional | FT_ah I/O with TIM1_CH1N, UART12_CTS/NSS, UART7_TX, OCTOSPI1_IO5 and FMC_D5/AD5 alternate functions. |
| 67 | PE9 | bidirectional | FT_ah I/O with TIM1_CH1, UART12_RX, UART7_RTS/DE, OCTOSPI1_IO6 and FMC_D6/AD6 alternate functions. |
| 68 | VSS | power_in | Digital ground supply pin. |
| 69 | VDD | power_in | Digital supply pin (1.71 V to 3.6 V standard operating range with HSLV = 0). |
| 70 | PE10 | bidirectional | FT_ah I/O with TIM1_CH2N, UART12_TX, UART7_CTS, OCTOSPI1_IO7 and FMC_D7/AD7 alternate functions. |
| 71 | PE11 | bidirectional | FT_ah I/O with TIM1_CH2, SPI1_RDY, SPI4_NSS, OCTOSPI1_NCS, SAI2_SD_B and FMC_D8/AD8 alternate functions. |
| 72 | PE12 | bidirectional | FT_h I/O with TIM1_CH3N, SPI4_SCK, SAI2_SCK_B and FMC_D9/AD9 alternate functions. |
| 73 | PE13 | bidirectional | FT_h I/O with TIM1_CH3, SPI4_MISO, SAI2_FS_B and FMC_D10/AD10 alternate functions. |
| 74 | PE14 | bidirectional | FT_h I/O with TIM1_CH4, SPI4_MOSI, SAI2_MCLK_B and FMC_D11/AD11 alternate functions. |
| 75 | PE15 | bidirectional | FT_h I/O with TIM1_BKIN, TIM1_CH4N, USART10_CK and FMC_D12/AD12 alternate functions. |
| 76 | PB10 | bidirectional | FT_f (Fm+ capable) I/O with TIM2_CH3, LPTIM3_CH1, LPTIM2_IN1, I2C2_SCL, SPI2_SCK/I2S2_CK, USART3_TX, OCTOSPI1_NCS and ETH_MII_RX_ER alternate functions. |
| 77 | PB11 | bidirectional | FT_f (Fm+ capable) I/O with TIM2_CH4, LPTIM2_ETR, I2C2_SDA, SPI2_RDY, SPI4_RDY, USART3_RX, ETH_MII_TX_EN/RMII_TX_EN and FMC_NBL1 alternate functions. |
| 78 | VLXSMPS | power_out | Switching node output of the internal SMPS step-down converter, connected to the external inductor. |
| 79 | VDDSMPS | power_in | Supply input for the internal SMPS step-down converter, which must be at VDD level. |
| 80 | VSSSMPS | power_in | Ground pin for the internal SMPS step-down converter. |
| 81 | VCAP | passive | Connection for the external stabilization capacitor of the embedded core voltage regulator. |
| 82 | VSS | power_in | Digital ground supply pin. |
| 83 | VDD | power_in | Digital supply pin (1.71 V to 3.6 V standard operating range with HSLV = 0). |
| 84 | PH6 | bidirectional | FT I/O with TIM1_CH3N, TIM12_CH1, TIM8_CH1, I2C2_SMBA, SPI5_SCK, ETH_MII_RXD2, FMC_SDNE1 and DCMI_D8/PSSI_D8 alternate functions. |
| 85 | PH7 | bidirectional | FT_f (Fm+ capable) I/O with TIM1_CH3, TIM8_CH1N, I2C3_SCL, SPI5_MISO, ETH_MII_RXD3, FMC_SDCKE1 and DCMI_D9/PSSI_D9 alternate functions. |
| 86 | PH9 | bidirectional | FT_h I/O with TIM1_CH2, TIM12_CH2, TIM8_CH2N, I2C3_SMBA, SPI5_NSS and DCMI_D0/PSSI_D0 alternate functions. |
| 87 | PH10 | bidirectional | FT_h I/O with TIM1_CH1N, TIM5_CH1, TIM8_CH3, I2C4_SMBA, SPI5_RDY and DCMI_D1/PSSI_D1 alternate functions. |
| 88 | PH11 | bidirectional | FT_fh (Fm+ capable) I/O with TIM1_CH1, TIM5_CH2, TIM8_CH3N, I2C4_SCL, I3C1_SCL and DCMI_D2/PSSI_D2 alternate functions. |
| 89 | PH12 | bidirectional | FT_fh (Fm+ capable) I/O with TIM1_BKIN, TIM5_CH3, TIM8_BKIN, I2C4_SDA, I3C1_SDA, TIM8_CH4N and DCMI_D3/PSSI_D3 alternate functions. |
| 90 | VSS | power_in | Digital ground supply pin. |
| 91 | VDD | power_in | Digital supply pin (1.71 V to 3.6 V standard operating range with HSLV = 0). |
| 92 | PB12 | bidirectional | FT_fh (Fm+ capable) I/O with TIM1_BKIN, OCTOSPI1_NCLK, I2C2_SDA, SPI2_NSS/I2S2_WS, UCPD1_FRSTX, USART3_CK, FDCAN2_RX, ETH_MII_TXD0/RMII_TXD0 and UART5_RX alternate functions. |
| 93 | PB13 | bidirectional | FT_c I/O (USB Type-C PD, 5.5 V max input) with TIM1_CH1N, LPTIM3_IN1, LPTIM2_CH1, I2C2_SMBA, SPI2_SCK/I2S2_CK, USART3_CTS/NSS, FDCAN2_TX, SDMMC1_D0 and UART5_TX alternate functions; additional function UCPD1_CC1. |
| 94 | PB14 | bidirectional | FT_c I/O (USB Type-C PD, 5.5 V max input) with TIM1_CH2N, TIM12_CH1, TIM8_CH2N, USART1_TX, SPI2_MISO/I2S2_SDI, USART3_RTS/DE, UART4_RTS/DE, SDMMC2_D0 and LPTIM3_ETR alternate functions; additional function UCPD1_CC2. |
| 95 | PB15 | bidirectional | FT_h I/O with RTC_REFIN, TIM1_CH3N, TIM12_CH2, TIM8_CH3N, USART1_RX, SPI2_MOSI/I2S2_SDO, USART11_CTS/NSS, UART4_CTS, SDMMC2_D1, OCTOSPI1_CLK, ETH_MII_TXD1/RMII_TXD1, DCMI_D2/PSSI_D2 and UART5_RX alternate functions; additional function PVD_IN. |
| 96 | PD8 | bidirectional | FT_h I/O with USART3_TX and FMC_D13/AD13 alternate functions. |
| 97 | PD9 | bidirectional | FT_h I/O with USART3_RX, FDCAN2_RX and FMC_D14/AD14 alternate functions. |
| 98 | PD10 | bidirectional | FT_h I/O with LPTIM2_CH2, USART3_CK and FMC_D15/AD15 alternate functions. |
| 99 | PD11 | bidirectional | FT_h I/O with SAI1_CK1, LPTIM2_IN2, I2C4_SMBA, USART3_CTS/NSS, UART4_RX, OCTOSPI1_IO0, SAI2_SD_A and FMC_A16/CLE alternate functions. |
| 100 | PD12 | bidirectional | FT_fh (Fm+ capable) I/O with LPTIM1_IN1, TIM4_CH1, LPTIM2_IN1, I2C4_SCL, I3C1_SCL, SAI1_D1, USART3_RTS/DE, UART4_TX, OCTOSPI1_IO1, SAI2_FS_A, FMC_A17/ALE and DCMI_D12/PSSI_D12 alternate functions. |
| 101 | PD13 | bidirectional | FT_fh (Fm+ capable) I/O with LPTIM1_CH1, TIM4_CH2, LPTIM2_CH1, I2C4_SDA, I3C1_SDA, OCTOSPI1_IO3, SAI2_SCK_A, UART9_RTS/DE, FMC_A18, DCMI_D13/PSSI_D13 and LPTIM4_IN1 alternate functions. |
| 102 | VSS | power_in | Digital ground supply pin. |
| 103 | VDD | power_in | Digital supply pin (1.71 V to 3.6 V standard operating range with HSLV = 0). |
| 104 | PD14 | bidirectional | FT_h I/O with TIM4_CH3, UART8_CTS, UART9_RX and FMC_D0/AD0 alternate functions. |
| 105 | PD15 | bidirectional | FT_h I/O with TIM4_CH4, UART8_RTS/DE, UART9_TX and FMC_D1/AD1 alternate functions. |
| 106 | PG2 | bidirectional | FT_h I/O with TIM8_BKIN, UART12_RX, FMC_A12 and LPTIM6_ETR alternate functions. |
| 107 | PG3 | bidirectional | FT_h I/O with TIM8_BKIN2, UART12_TX, FMC_A13 and LPTIM5_ETR alternate functions. |
| 108 | PG4 | bidirectional | FT_h I/O with TIM1_BKIN2, FMC_A14/BA0 and LPTIM4_ETR alternate functions. |
| 109 | PG5 | bidirectional | FT_h I/O with TIM1_ETR and FMC_A15/BA1 alternate functions. |
| 110 | PG6 | bidirectional | FT_fh (Fm+ capable) I/O with TIM17_BKIN, I3C1_SDA, I2C4_SDA, SPI1_RDY, OCTOSPI1_NCS, UCPD1_FRSTX, FMC_NE3 and DCMI_D12/PSSI_D12 alternate functions. |
| 111 | PG7 | bidirectional | FT_fh (Fm+ capable) I/O with SAI1_CK2, I3C1_SCL, I2C4_SCL, SAI1_MCLK_A, USART6_CK, UCPD1_FRSTX, FMC_INT and DCMI_D13/PSSI_D13 alternate functions. |
| 112 | PG8 | bidirectional | FT_h I/O with TIM8_ETR, SPI6_NSS, USART6_RTS/DE, ETH_PPS_OUT and FMC_SDCLK alternate functions. |
| 113 | VSS | power_in | Digital ground supply pin. |
| 114 | VDD | power_in | Digital supply pin (1.71 V to 3.6 V standard operating range with HSLV = 0). |
| 115 | PC6 | bidirectional | FT_h I/O with TIM3_CH1, TIM8_CH1, I2S2_MCK, SAI1_SCK_A, USART6_TX, SDMMC1_D0DIR, FMC_NWAIT, SDMMC2_D6, OCTOSPI1_IO5, SDMMC1_D6 and DCMI_D0/PSSI_D0 alternate functions. |
| 116 | PC7 | bidirectional | FT_h I/O with TRGIO, TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, SDMMC1_D123DIR, FMC_NE1, SDMMC2_D7, OCTOSPI1_IO6, SDMMC1_D7 and DCMI_D1/PSSI_D1 alternate functions. |
| 117 | PC8 | bidirectional | FT_h I/O with TRACED1, TIM3_CH3, TIM8_CH3, USART6_CK, UART5_RTS/DE, FMC_NE2/NCE, FMC_INT, FMC_ALE, SDMMC1_D0 and DCMI_D2/PSSI_D2 alternate functions. |
| 118 | PC9 | bidirectional | FT_fh (Fm+ capable) I/O with MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, AUDIOCLK, UART5_CTS, OCTOSPI1_IO0, FMC_CLE, SDMMC1_D1 and DCMI_D3/PSSI_D3 alternate functions; additional function UCPD1_DB2. |
| 119 | PA8 | bidirectional | FT_fh (Fm+ capable) I/O with MCO1, TIM1_CH1, TIM8_BKIN2, I2C3_SCL, SPI1_RDY, USART1_CK, USB_SOF, UART7_RX, FMC_NOE and DCMI_D3/PSSI_D3 alternate functions. |
| 120 | PA9 | bidirectional | FT_d I/O (USB Type-C dead battery) with TIM1_CH2, LPUART1_TX, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX, ETH_MII_TX_ER, FMC_NWE and DCMI_D0/PSSI_D0 alternate functions; additional function UCPD1_DB1. |
| 121 | PA10 | bidirectional | FT_h I/O with TIM1_CH3, LPUART1_RX, LPTIM2_IN2, UCPD1_FRSTX, USART1_RX, FDCAN2_TX, SDMMC1_D0 and DCMI_D1/PSSI_D1 alternate functions. |
| 122 | PA11 | bidirectional | FT_u I/O supplied by VDDUSB with TIM1_CH4, LPUART1_CTS, SPI2_NSS/I2S2_WS, UART4_RX, USART1_CTS/NSS, FDCAN1_RX and USB_DM alternate functions. |
| 123 | PA12 | bidirectional | FT_u I/O supplied by VDDUSB with TIM1_ETR, LPUART1_RTS/DE, SPI2_SCK/I2S2_CK, UART4_TX, USART1_RTS/DE, SAI2_FS_B, FDCAN1_TX and USB_DP alternate functions. |
| 124 | PA13 | bidirectional | FT I/O that is JTMS/SWDIO after reset (internal pull-up active) with EVENTOUT alternate function. |
| 125 | VDDUSB | power_in | Supply pin for the USB full-speed I/Os (PA11/PA12). |
| 126 | VSS | power_in | Digital ground supply pin. |
| 127 | VDD | power_in | Digital supply pin (1.71 V to 3.6 V standard operating range with HSLV = 0). |
| 128 | PH13 | bidirectional | FT_h I/O with LPTIM1_IN2, TIM8_CH1N, UART8_TX, UART4_TX, FDCAN1_TX and DCMI_D3/PSSI_D3 alternate functions. |
| 129 | PH14 | bidirectional | FT_h I/O with TIM8_CH2N, UART4_RX, FDCAN1_RX and DCMI_D4/PSSI_D4 alternate functions. |
| 130 | PH15 | bidirectional | FT_h I/O with TIM8_CH3N and DCMI_D11/PSSI_D11 alternate functions. |
| 131 | PI0 | bidirectional | FT_h I/O with TIM5_CH4, SPI2_NSS/I2S2_WS and DCMI_D13/PSSI_D13 alternate functions. |
| 132 | PI1 | bidirectional | FT_h I/O with TIM8_BKIN2, SPI2_SCK/I2S2_CK and DCMI_D8/PSSI_D8 alternate functions. |
| 133 | PI2 | bidirectional | FT_h I/O with TIM8_CH4, SPI2_MISO/I2S2_SDI and DCMI_D9/PSSI_D9 alternate functions. |
| 134 | PI3 | bidirectional | FT_h I/O with TIM8_ETR, SPI2_MOSI/I2S2_SDO and DCMI_D10/PSSI_D10 alternate functions. |
| 135 | VSS | power_in | Digital ground supply pin. |
| 136 | VDD | power_in | Digital supply pin (1.71 V to 3.6 V standard operating range with HSLV = 0). |
| 137 | PA14 | bidirectional | FT I/O that is JTCK/SWCLK after reset (internal pull-down active) with EVENTOUT alternate function. |
| 138 | PA15 | bidirectional | FT I/O that is JTDI after reset (internal pull-up active) with TIM2_CH1, LPTIM3_IN2, HDMI_CEC, SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, SPI6_NSS, UART4_RTS/DE, UART7_TX, FMC_NBL1, DCMI_D11/PSSI_D11 and TIM2_ETR alternate functions. |
| 139 | PC10 | bidirectional | FT_h I/O with LPTIM3_ETR, SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, OCTOSPI1_IO1, ETH_MII_TXD0/RMII_TXD0, SDMMC1_D2 and DCMI_D8/PSSI_D8 alternate functions. |
| 140 | PC11 | bidirectional | FT_h I/O with LPTIM3_IN1, SPI3_MISO/I2S3_SDI, USART3_RX, UART4_RX, OCTOSPI1_NCS, SDMMC1_D3 and DCMI_D4/PSSI_D4 alternate functions. |
| 141 | PC12 | bidirectional | FT_h I/O with TRACED3, TIM15_CH1, SPI6_SCK, SPI3_MOSI/I2S3_SDO, USART3_CK, UART5_TX, SDMMC1_CK and DCMI_D9/PSSI_D9 alternate functions. |
| 142 | PD0 | bidirectional | FT_h I/O with TIM8_CH4N, UART4_RX, FDCAN1_RX, UART9_CTS and FMC_D2/AD2 alternate functions. |
| 143 | PD1 | bidirectional | FT_h I/O with UART4_TX, FDCAN1_TX and FMC_D3/AD3 alternate functions. |
| 144 | PD2 | bidirectional | FT_h I/O with TRACED2, TIM3_ETR, TIM15_BKIN, UART5_RX, SDMMC1_CMD, DCMI_D11/PSSI_D11 and LPTIM4_ETR alternate functions; additional function WKUP7. |
| 145 | PD3 | bidirectional | FT_h I/O with SPI2_SCK/I2S2_CK, USART2_CTS/NSS, FMC_CLK and DCMI_D5/PSSI_D5 alternate functions; additional function WKUP8. |
| 146 | PD4 | bidirectional | FT_h I/O with USART2_RTS/DE, OCTOSPI1_IO4 and FMC_NOE alternate functions. |
| 147 | PD5 | bidirectional | FT_h I/O with TIM1_CH4N, SPI2_RDY, USART2_TX, FDCAN1_TX, OCTOSPI1_IO5 and FMC_NWE alternate functions. |
| 148 | VSS | power_in | Digital ground supply pin. |
| 149 | VDDIO2 | power_in | Independent I/O supply for the VDDIO2 I/O group (supports down to 1.08 V). |
| 150 | PD6 | bidirectional | FT_sh I/O supplied only by VDDIO2 with SAI1_D1, SPI3_MOSI/I2S3_SDO, SAI1_SD_A, USART2_RX, OCTOSPI1_IO6, SDMMC2_CK, FMC_NWAIT and DCMI_D10/PSSI_D10 alternate functions. |
| 151 | PD7 | bidirectional | FT_sh I/O supplied only by VDDIO2 with SPI1_MOSI/I2S1_SDO, USART2_CK, OCTOSPI1_IO7, SDMMC2_CMD, FMC_NE1/NCE and LPTIM4_OUT alternate functions. |
| 152 | PG9 | bidirectional | FT_sh I/O supplied only by VDDIO2 with SPI1_MISO/I2S1_SDI, USART6_RX, OCTOSPI1_IO6, SAI2_FS_B, SDMMC2_D0, FMC_NE2/NCE and DCMI_VSYNC/PSSI_RDY alternate functions. |
| 153 | PG10 | bidirectional | FT_sh I/O supplied only by VDDIO2 with SPI1_NSS/I2S1_WS, SAI2_SD_B, SDMMC2_D1, FMC_NE3 and DCMI_D2/PSSI_D2 alternate functions. |
| 154 | PG11 | bidirectional | FT_sh I/O supplied only by VDDIO2 with LPTIM1_IN2, SPI1_SCK/I2S1_CK, USART10_RX, USART11_RTS/DE, SDMMC2_D2, ETH_MII_TX_EN/RMII_TX_EN and DCMI_D3/PSSI_D3 alternate functions. |
| 155 | PG12 | bidirectional | FT_sh I/O supplied only by VDDIO2 with LPTIM1_IN1, PSSI_D15, SPI6_MISO, USART10_TX, USART6_RTS/DE, SDMMC2_D3, ETH_MII_TXD1/RMII_TXD1, FMC_NE4, DCMI_D11/PSSI_D11 and LPTIM5_CH1 alternate functions. |
| 156 | PG13 | bidirectional | FT_sh I/O supplied only by VDDIO2 with TRACED0, LPTIM1_CH1, SPI6_SCK, USART10_CTS/NSS, USART6_CTS/NSS, SDMMC2_D6, ETH_MII_TXD0/RMII_TXD0, FMC_A24 and LPTIM5_CH2 alternate functions. |
| 157 | PG14 | bidirectional | FT_sh I/O supplied only by VDDIO2 with TRACED1, LPTIM1_ETR, LPTIM1_CH2, SPI6_MOSI, USART10_RTS/DE, USART6_TX, OCTOSPI1_IO7, SDMMC2_D7, ETH_MII_TXD1/RMII_TXD1, FMC_A25 and LPTIM5_IN1 alternate functions. |
| 158 | VSS | power_in | Digital ground supply pin. |
| 159 | VDD | power_in | Digital supply pin (1.71 V to 3.6 V standard operating range with HSLV = 0). |
| 160 | PG15 | bidirectional | FT_h I/O with SPI4_RDY, USART10_CK, USART6_CTS/NSS, FMC_NCAS and DCMI_D13/PSSI_D13 alternate functions. |
| 161 | PB3 | bidirectional | FT_fh I/O that is JTDO/TRACESWO after reset, with TIM2_CH2, I2C2_SDA, SPI1_SCK/I2S1_CK, SPI3_SCK/I2S3_CK, UART12_CTS/NSS, SPI6_SCK, SDMMC2_D2, CRS_SYNC, UART7_RX and LPTIM6_ETR alternate functions. |
| 162 | PB4 | bidirectional | FT_h I/O that is NJTRST after reset (internal pull-up active), with TIM16_BKIN, TIM3_CH1, OCTOSPI1_CLK, LPTIM1_CH2, SPI1_MISO/I2S1_SDI, SPI3_MISO/I2S3_SDI, SPI2_NSS/I2S2_WS, SPI6_MISO, SDMMC2_D3, UART7_TX and DCMI_D7/PSSI_D7 alternate functions. |
| 163 | PB5 | bidirectional | FT_h I/O with TIM17_BKIN, TIM3_CH2, OCTOSPI1_NCLK, I2C1_SMBA, SPI1_MOSI/I2S1_SDO, I2C4_SMBA, SPI3_MOSI/I2S3_SDO, SPI6_MOSI, FDCAN2_RX, ETH_PPS_OUT, FMC_SDCKE1, DCMI_D10/PSSI_D10 and UART5_RX alternate functions. |
| 164 | PB6 | bidirectional | FT_f (Fm+ capable) I/O with TIM16_CH1N, TIM4_CH1, I3C1_SCL, I2C1_SCL, HDMI_CEC, I2C4_SCL, USART1_TX, LPUART1_TX, FDCAN2_TX, OCTOSPI1_NCS, FMC_SDNE1, DCMI_D5/PSSI_D5 and UART5_TX alternate functions. |
| 165 | PB7 | bidirectional | FT_fa (Fm+ capable) I/O with TIM17_CH1N, TIM4_CH2, I3C1_SDA, I2C1_SDA, I2C4_SDA, USART1_RX, LPUART1_RX, FDCAN1_TX, SDMMC2_D5, SDMMC2_CKIN, FMC_NL and DCMI_VSYNC/PSSI_RDY alternate functions; additional function WKUP5. |
| 166 | BOOT0 | input | Boot mode selection input (type B), input only. |
| 167 | PB8 | bidirectional | FT_fhs I/O with TIM16_CH1, TIM4_CH3, I3C1_SCL, I2C1_SCL, SPI4_RDY, I2C4_SCL, SDMMC1_CKIN, UART4_RX, FDCAN1_RX, SDMMC2_D4, ETH_MII_TXD3, SDMMC1_D4 and DCMI_D6/PSSI_D6 alternate functions. |
| 168 | PB9 | bidirectional | FT_fhs I/O with TIM17_CH1, TIM4_CH4, I3C1_SDA, I2C1_SDA, SPI2_NSS/I2S2_WS, I2C4_SDA, SDMMC1_CDIR, UART4_TX, FDCAN1_TX, SDMMC2_D5, SDMMC2_CKIN, SDMMC1_D5 and DCMI_D7/PSSI_D7 alternate functions. |
| 169 | PE0 | bidirectional | FT_h I/O with LPTIM1_ETR, TIM4_ETR, LPTIM2_CH2, LPTIM2_ETR, SPI3_RDY, UART8_RX, FDCAN1_RX, SAI2_MCLK_A, FMC_NBL0 and DCMI_D2/PSSI_D2 alternate functions. |
| 170 | PE1 | bidirectional | FT_h I/O with LPTIM1_IN2, UART8_TX, FDCAN1_TX, FMC_NBL1 and DCMI_D3/PSSI_D3 alternate functions. |
| 171 | VCAP | passive | Connection for the external stabilization capacitor of the embedded core voltage regulator. |
| 172 | VDD | power_in | Digital supply pin (1.71 V to 3.6 V standard operating range with HSLV = 0). |
| 173 | PI4 | bidirectional | FT_h I/O with TIM8_BKIN, SPI2_RDY, SAI2_MCLK_A and DCMI_D5/PSSI_D5 alternate functions. |
| 174 | PI5 | bidirectional | FT_h I/O with TIM8_CH1, SAI2_SCK_A and DCMI_VSYNC/PSSI_RDY alternate functions. |
| 175 | PI6 | bidirectional | FT_h I/O with TIM8_CH2, SAI2_SD_A and DCMI_D6/PSSI_D6 alternate functions. |
| 176 | PI7 | bidirectional | FT_h I/O with TIM8_CH3, SAI2_FS_A and DCMI_D7/PSSI_D7 alternate functions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMICROELECTRONICS |
| Package | LQFP-176(24x24) |
| Category | Global Sourcing Parts |
| Pins | 176 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| External main supply voltage | VDDx - VSS | -0.3 | 4 | V | including VDDSMPS, VDDA, VDDUSB, VDDIO2, VBAT, VREF+ | 127 | |
| I/O supply voltage, HSLV = 0 | VDDIOx - VSS | -0.3 | 4 | V | HSLV = 0 | 127 | |
| I/O supply voltage, HSLV = 1 | VDDIOx - VSS | -0.3 | 2.75 | V | HSLV = 1 | 127 | |
| Input voltage on TT_xx pins | VIN | -0.3 | 4 | V | VSS - 0.3 to 4.0 | 127 | |
| Input voltage on FT_c pins | VIN | -0.3 | 5.5 | V | VSS - 0.3 to 5.5 | 127 | |
| Input voltage on any other pins | VIN | -0.3 | 4 | V | VSS - 0.3 to 4.0 | 127 | |
| Allowed voltage difference for VREF+ > VDDA | VREF+-VDDA | 0.4 | V | 127 | |||
| Variations between different VDDX power pins of the same domain | /ΔVDDx/ | 50 | mV | 127 | |||
| Variations between all the different ground pins | /VSSx-VSS/ | 50 | mV | 127 | |||
| Total current into sum of all VDD power lines | ΣIVDD | 350 | mA | source | 128 | ||
| Total current out of sum of all VSS ground lines | ΣIVSS | 350 | mA | sink | 128 | ||
| Maximum current into each VDD power pin | IVDD | 100 | mA | source | 128 | ||
| Maximum current out of each VSS ground pin | IVSS | 100 | mA | sink | 128 | ||
| Output current sunk/sourced by any I/O and control pin | IIO(PIN) | 20 | mA | 128 | |||
| Total output current sunk by sum of all I/Os and control pins | ΣIIO(PIN) | 140 | mA | sunk | 128 | ||
| Total output current sourced by sum of all I/Os and control pins | ΣIIO(PIN) | 140 | mA | sourced | 128 | ||
| Injected current on FT_xxx, TT_xx, NRST pins | IINJ(PIN) | -5 | 0 | mA | -5 / 0 | 128 | |
| Total injected current (sum of all I/Os and control pins) | ∑/IINJ(PIN)/ | -25 | 25 | mA | 128 | ||
| Storage temperature range | TSTG | -65 | 150 | °C | 128 | ||
| Maximum junction temperature | TJ | 130 | °C | limited to 105 °C in the VOS0 voltage range | 128 | ||
| Standard operating voltage, HSLV = 0 | VDD | 1.71 | 3.6 | V | HSLV = 0 | 128 | |
| Standard operating voltage, HSLV = 1 | VDD | 1.71 | 2.7 | V | HSLV = 1 | 128 | |
| I/O supply voltage VDDIO2, HSLV = 0 | VDDIO2 | 1.08 | 3.6 | V | at least one I/O in PB8, PB9, PD6, PD7, PG[9:14] used, HSLV = 0 | 129 | |
| I/O supply voltage VDDIO2, HSLV = 1 | VDDIO2 | 1.08 | 2.7 | V | at least one I/O in PB8, PB9, PD6, PD7, PG[9:14] used, HSLV = 1 | 129 | |
| USB supply voltage | VDDUSB | 3 | 3.6 | V | USB is used | 129 | |
| Analog supply voltage, ADC used | VDDA | 1.62 | 3.6 | V | ADC is used | 129 | |
| Analog supply voltage, VREFBUF used | VDDA | 2.1 | 3.6 | V | VREFBUF is used | 129 | |
| Backup domain supply voltage | VBAT | 1.2 | 3.6 | V | 129 | ||
| Internal regulator ON VCORE, VOS0 | VCORE | 1.3 | 1.35 | 1.4 | V | Internal regulator ON, VOS0 (max 250 MHz) | 130 |
| Internal regulator ON VCORE, VOS1 | VCORE | 1.15 | 1.2 | 1.26 | V | Internal regulator ON, VOS1 (max 200 MHz) | 130 |
| Internal regulator ON VCORE, VOS3 | VCORE | 0.95 | 1 | 1.05 | V | Internal regulator ON, VOS3 (max 100 MHz) | 130 |
| AHB clock frequency, VOS0 | fHCLK | 250 | MHz | VOS0 | 130 | ||
| Ambient temperature for the suffix 3 version | TA | -40 | 125 | °C | Maximum power dissipation | 131 | |
| Junction temperature range, VOS0 | TJ | -40 | 105 | °C | VOS0 | 131 | |
| Junction temperature range, VOS1/2/3 | TJ | -40 | 130 | °C | VOS1, VOS2, and VOS3 | 131 | |
| External capacitor for LDO | CEXT | 2.2 | μF | A variation of ±20% is tolerated | 133 | ||
| Power-on/down reset threshold, rising edge | VPOR/PDR | 1.62 | 1.67 | 1.71 | V | BORH_EN = 0, rising edge | 136 |
| Power-on/down reset threshold, falling edge | VPOR/PDR | 1.58 | 1.62 | 1.68 | V | BORH_EN = 0, falling edge | 136 |
| Brownout reset threshold 1, rising edge | VBOR1 | 2.04 | 2.1 | 2.15 | V | BORH_EN = 1, rising edge | 136 |
| Brownout reset threshold 3, rising edge | VBOR3 | 2.63 | 2.7 | 2.78 | V | BORH_EN = 1, rising edge | 136 |
| Reset temporization after BOR0 detection | tRSTTEMPO | 377 | 550 | μs | VDD rising | 136 | |
| Internal reference voltage | VREFINT | 1.18 | 1.216 | 1.255 | V | -40 °C < TJ < +130 °C | 138 |
| Average temperature coefficient of VREFINT | TCoeff | 20 | 70 | ppm/°C | Average temperature coefficient | 138 | |
| Average voltage coefficient of VREFINT | VDDcoeff | 10 | 1370 | ppm/V | 3.0 V < VDD < 3.6 V | 138 | |
| Supply current in Run mode, VOS0 250 MHz, TJ = 25 °C | IDD(Run) | 32.1 | 37 | mA | All peripherals disabled, VOS0, 250 MHz, typ LDO, max TJ = 25 °C (typ SMPS 17.5) | 139 | |
| Supply current in Run mode, VOS0 250 MHz, TJ = 85 °C | IDD(Run) | 65 | mA | All peripherals disabled, VOS0, 250 MHz, TJ = 85 °C | 139 | ||
| Supply current in Run mode, VOS0 250 MHz, TJ = 105 °C | IDD(Run) | 87 | mA | All peripherals disabled, VOS0, 250 MHz, TJ = 105 °C | 139 | ||
| Supply current in Run mode, all peripherals enabled, VOS0 250 MHz, TJ = 25 °C | IDD(Run) | 86.8 | 90 | mA | All peripherals enabled, VOS0, 250 MHz, typ LDO, max TJ = 25 °C (typ SMPS 49.8) | 139 |
CAD (KiCad official)
- Symbol:
STM32H573IIT3Q - Footprint:
Package_QFP:LQFP-176_24x24mm_P0.5mm - 3D model: LQFP-176(24x24) (KiCad packages3D, STEP)
- 3D model files:
stm32h573iit3q-etched.step/stm32h573iit3q-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32h573iit3q.step/stm32h573iit3q.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMICROELECTRONICS datasheet (273 pp, sha256
e66d535f5a5fcb6d, retrieved 2026-10-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).