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STM32G491CET6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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README.mdadded+84@@ -0,0 +1,84 @@+# STM32G491CET6++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)++STM32G491CET6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VBAT | power_in | Backup-domain supply for the RTC, backup registers and the power switch feeding PC13 to PC15; operating range is 1.55 V to 3.6 V. |+| 2 | PC13 | bidirectional | 5 V tolerant GPIO on the power-switch domain, which sinks only 3 mA, so output use is limited to 2 MHz at 30 pF maximum and it must not source current to loads such as LEDs; also WKUP2, RTC_TAMP1, RTC_TS and RTC_OUT1. |+| 3 | PC14-OSC32_IN | bidirectional | 5 V tolerant GPIO on the power-switch domain with the same 3 mA and 2 MHz / 30 pF output limits as PC13, also serving as the 32 kHz oscillator input OSC32_IN. |+| 4 | PC15-OSC32_OUT | bidirectional | 5 V tolerant GPIO on the power-switch domain with the same 3 mA and 2 MHz / 30 pF output limits as PC13, also serving as the 32 kHz oscillator output OSC32_OUT. |+| 5 | PF0-OSC_IN | bidirectional | 5 V tolerant, Fm+ capable I/O with analog switch supplied by VDDA, also serving as the HSE oscillator input OSC_IN and ADC1_IN10, with I2C2_SDA and SPI2_NSS/I2S2_WS alternate functions. |+| 6 | PF1-OSC_OUT | bidirectional | 5 V tolerant I/O with analog switch supplied by VDDA, also serving as the HSE oscillator output OSC_OUT, with ADC2_IN10 and COMP3_INM additional functions. |+| 7 | PG10-NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor (NRST), also providing the MCO alternate function. |+| 8 | PA0 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC12_IN1, WKUP1, RTC_TAMP2 and TIM2_CH1 / USART2_CTS. |+| 9 | PA1 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC12_IN2, RTC_REFIN, OPAMP1_VINP and TIM2_CH2 / USART2_RTS_DE. |+| 10 | PA2 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC1_IN3, COMP2_OUT, WKUP4/LSCO, TIM2_CH3 and USART2_TX. |+| 11 | PA3 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC1_IN4, OPAMP1_VINM/OPAMP1_VINP, TIM2_CH4 and USART2_RX. |+| 12 | PA4 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC2_IN17, DAC1_OUT1, COMP1_INM, SPI1_NSS and TIM3_CH2. |+| 13 | PA5 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC2_IN13, DAC1_OUT2, COMP2_INM, OPAMP2_VINM, SPI1_SCK and TIM2_CH1. |+| 14 | PA6 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC2_IN3, OPAMP2_VOUT, COMP1_OUT, SPI1_MISO and TIM16_CH1. |+| 15 | PA7 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC2_IN4, COMP2_INP, OPAMP1_VINP/OPAMP2_VINP, SPI1_MOSI and TIM17_CH1. |+| 16 | PB0 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC1_IN15/ADC3_IN12, COMP4_INP, OPAMP2_VINP, OPAMP3_VINP and TIM3_CH3. |+| 17 | PB1 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC1_IN12/ADC3_IN1, COMP1_INP, OPAMP3_VOUT, OPAMP6_VINM and TIM3_CH4. |+| 18 | PB2 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC2_IN12, COMP4_INM, OPAMP3_VINM, RTC_OUT2 and LPTIM1_OUT. |+| 19 | VSSA | power_in | Analog ground for the ADC, DAC, OPAMP, COMP and VREFBUF; ground-pin variations must stay within 50 mV of VSS. |+| 20 | VREF+ | power_in | Positive reference voltage input for the ADC and DAC (also VREFBUF_OUT); VREF+ may exceed VDDA by no more than 0.4 V and can be internally connected to VDDA depending on package. |+| 21 | VDDA | power_in | Analog supply for the ADC, DAC, OPAMP, COMP and VREFBUF; minimum 1.62 V for ADC or COMP, 1.71 V for DAC, 2.0 V for OPAMP and 2.4 V for VREFBUF, maximum 3.6 V. |+| 22 | PB10 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; also OPAMP3_VINM, TIM2_CH3, USART3_TX, LPUART1_RX and QUADSPI1_CLK. |+| 23 | VSS | power_in | Ground pin; all VSS pins must be connected to the external ground. |+| 24 | VDD | power_in | Main digital supply pin; operating voltage range is 1.71 V to 3.6 V. |+| 25 | PB11 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC12_IN14, OPAMP6_VOUT, TIM2_CH4, USART3_RX and LPUART1_TX. |+| 26 | PB12 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC1_IN11, OPAMP6_VINP, SPI2_NSS/I2S2_WS, USART3_CK and FDCAN2_RX. |+| 27 | PB13 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC3_IN5, OPAMP3_VINP, OPAMP6_VINP, SPI2_SCK/I2S2_CK, USART3_CTS and FDCAN2_TX. |+| 28 | PB14 | bidirectional | 3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC1_IN5, OPAMP2_VINP, TIM15_CH1, SPI2_MISO and COMP4_OUT. |+| 29 | PB15 | bidirectional | 5 V tolerant I/O with analog switch supplied by VDDA; also ADC2_IN15, RTC_REFIN, TIM15_CH2, COMP3_OUT and SPI2_MOSI/I2S2_SD. |+| 30 | PA8 | bidirectional | 5 V tolerant, Fm+ capable I/O; also MCO, I2C3_SCL, I2C2_SDA, TIM1_CH1, USART1_CK and SAI1_CK2. |+| 31 | PA9 | bidirectional | 5 V tolerant, Fm+ capable I/O with USB Type-C dead-battery function; a high level on this pin activates the internal 5.1 kΩ pull-down on PB6 (UCPD1_CC1) after reset, also USART1_TX, I2C2_SCL and TIM1_CH2. |+| 32 | PA10 | bidirectional | 5 V tolerant, Fm+ capable I/O with USB Type-C dead-battery function; a high level on this pin activates the internal 5.1 kΩ pull-down on PB4 (UCPD1_CC2) after reset, also USART1_RX, SPI2_MISO and USB_CRS_SYNC. |+| 33 | PA11 | bidirectional | 5 V tolerant I/O with USB function; also USB_DM, USART1_CTS, SPI2_MOSI/I2S2_SD, TIM1_CH1N, COMP1_OUT and FDCAN1_RX. |+| 34 | PA12 | bidirectional | 5 V tolerant I/O with USB function; also USB_DP, USART1_RTS_DE, TIM16_CH1, COMP2_OUT and FDCAN1_TX. |+| 35 | VSS | power_in | Ground pin; all VSS pins must be connected to the external ground. |+| 36 | VDD | power_in | Main digital supply pin; operating voltage range is 1.71 V to 3.6 V. |+| 37 | PA13 | bidirectional | 5 V tolerant, Fm+ capable I/O; after reset it is configured as SWDIO-JTMS with an internal pull-up enabled, also IR_OUT, I2C1_SCL and USART3_CTS. |+| 38 | PA14 | bidirectional | 5 V tolerant, Fm+ capable I/O; after reset it is configured as SWCLK-JTCK with an internal pull-down enabled, also I2C1_SDA, LPTIM1_OUT and USART2_TX. |+| 39 | PA15 | bidirectional | 5 V tolerant, Fm+ capable I/O; after reset it is configured as JTDI with an internal pull-up enabled, also TIM2_CH1, SPI1_NSS, SPI3_NSS/I2S3_WS and USART2_RX. |+| 40 | PB3 | bidirectional | 5 V tolerant I/O; after reset it is configured as JTDO/TRACESWO debug alternate function, also SPI1_SCK, SPI3_SCK/I2S3_CK, USART2_TX and TIM2_CH2. |+| 41 | PB4 | bidirectional | 5 V tolerant, USB Type-C CC capable I/O; after reset it is configured as JTRST with an internal pull-up enabled and its UCPD1_CC2 pull-down is enabled unless disabled, also SPI1_MISO, USART2_RX and TIM16_CH1. |+| 42 | PB5 | bidirectional | 5 V tolerant, Fm+ capable I/O; also TIM16_BKIN, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI/I2S3_SD, FDCAN2_RX and LPTIM1_IN1. |+| 43 | PB6 | bidirectional | 5 V tolerant, USB Type-C CC capable I/O; its UCPD1_CC1 pull-down is controlled by the level on PA9 after reset, also TIM16_CH1N, TIM4_CH1, USART1_TX, COMP4_OUT and FDCAN2_TX. |+| 44 | PB7 | bidirectional | 5 V tolerant, Fm+ capable I/O; also PVD_IN, TIM17_CH1N, TIM4_CH2, I2C1_SDA, USART1_RX and COMP3_OUT. |+| 45 | PB8-BOOT0 | bidirectional | 5 V tolerant, Fm+ capable I/O that also carries the BOOT0 function; the datasheet recommends setting it to a mode other than analog after startup to limit consumption if left unconnected, also TIM16_CH1, I2C1_SCL and USART3_RX. |+| 46 | PB9 | bidirectional | 5 V tolerant, Fm+ capable I/O; also TIM17_CH1, TIM4_CH4, I2C1_SDA, IR_OUT, USART3_TX, COMP2_OUT and FDCAN1_TX. |+| 47 | VSS | power_in | Ground pin; all VSS pins must be connected to the external ground. |+| 48 | VDD | power_in | Main digital supply pin; operating voltage range is 1.71 V to 3.6 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-48(7x7) |+| Category | Embedded Processors & Controllers |+| Pins | 48 |++## CAD (KiCad official)++- Symbol: `STM32G491CET6`+- Footprint: `Package_QFP:LQFP-48_7x7mm_P0.5mm`+- 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)+- 3D model files: `stm32g491cet6-etched.step` / `stm32g491cet6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32g491cet6.step` / `stm32g491cet6.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590264930139209728) (199 pp, sha256 `ba71e197157250a1`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32g491cet6-datasheet.pdf)
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operating range is 1.55 V to 3.6 V."+ },+ {+ "number": "2",+ "name": "PC13",+ "type": "bidirectional",+ "description": "5 V tolerant GPIO on the power-switch domain, which sinks only 3 mA, so output use is limited to 2 MHz at 30 pF maximum and it must not source current to loads such as LEDs; also WKUP2, RTC_TAMP1, RTC_TS and RTC_OUT1."+ },+ {+ "number": "3",+ "name": "PC14-OSC32_IN",+ "type": "bidirectional",+ "description": "5 V tolerant GPIO on the power-switch domain with the same 3 mA and 2 MHz / 30 pF output limits as PC13, also serving as the 32 kHz oscillator input OSC32_IN."+ },+ {+ "number": "4",+ "name": "PC15-OSC32_OUT",+ "type": "bidirectional",+ "description": "5 V tolerant GPIO on the power-switch domain with the same 3 mA and 2 MHz / 30 pF output limits as PC13, also serving as the 32 kHz oscillator output OSC32_OUT."+ },+ {+ "number": "5",+ "name": "PF0-OSC_IN",+ "type": "bidirectional",+ "description": "5 V tolerant, Fm+ capable I/O with analog switch supplied by VDDA, also serving as the HSE oscillator input OSC_IN and ADC1_IN10, with I2C2_SDA and SPI2_NSS/I2S2_WS alternate functions."+ },+ {+ "number": "6",+ "name": "PF1-OSC_OUT",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with analog switch supplied by VDDA, also serving as the HSE oscillator output OSC_OUT, with ADC2_IN10 and COMP3_INM additional functions."+ },+ {+ "number": "7",+ "name": "PG10-NRST",+ "type": "bidirectional",+ "description": "Bidirectional reset pin with embedded weak pull-up resistor (NRST), also providing the MCO alternate function."+ },+ {+ "number": "8",+ "name": "PA0",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC12_IN1, WKUP1, RTC_TAMP2 and TIM2_CH1 / USART2_CTS."+ },+ {+ "number": "9",+ "name": "PA1",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC12_IN2, RTC_REFIN, OPAMP1_VINP and TIM2_CH2 / USART2_RTS_DE."+ },+ {+ "number": "10",+ "name": "PA2",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC1_IN3, COMP2_OUT, WKUP4/LSCO, TIM2_CH3 and USART2_TX."+ },+ {+ "number": "11",+ "name": "PA3",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC1_IN4, OPAMP1_VINM/OPAMP1_VINP, TIM2_CH4 and USART2_RX."+ },+ {+ "number": "12",+ "name": "PA4",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC2_IN17, DAC1_OUT1, COMP1_INM, SPI1_NSS and TIM3_CH2."+ },+ {+ "number": "13",+ "name": "PA5",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC2_IN13, DAC1_OUT2, COMP2_INM, OPAMP2_VINM, SPI1_SCK and TIM2_CH1."+ },+ {+ "number": "14",+ "name": "PA6",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC2_IN3, OPAMP2_VOUT, COMP1_OUT, SPI1_MISO and TIM16_CH1."+ },+ {+ "number": "15",+ "name": "PA7",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC2_IN4, COMP2_INP, OPAMP1_VINP/OPAMP2_VINP, SPI1_MOSI and TIM17_CH1."+ },+ {+ "number": "16",+ "name": "PB0",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC1_IN15/ADC3_IN12, COMP4_INP, OPAMP2_VINP, OPAMP3_VINP and TIM3_CH3."+ },+ {+ "number": "17",+ "name": "PB1",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC1_IN12/ADC3_IN1, COMP1_INP, OPAMP3_VOUT, OPAMP6_VINM and TIM3_CH4."+ },+ {+ "number": "18",+ "name": "PB2",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC2_IN12, COMP4_INM, OPAMP3_VINM, RTC_OUT2 and LPTIM1_OUT."+ },+ {+ "number": "19",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog ground for the ADC, DAC, OPAMP, COMP and VREFBUF; ground-pin variations must stay within 50 mV of VSS."+ },+ {+ "number": "20",+ "name": "VREF+",+ "type": "power_in",+ "description": "Positive reference voltage input for the ADC and DAC (also VREFBUF_OUT); VREF+ may exceed VDDA by no more than 0.4 V and can be internally connected to VDDA depending on package."+ },+ {+ "number": "21",+ "name": "VDDA",+ "type": "power_in",+ "description": "Analog supply for the ADC, DAC, OPAMP, COMP and VREFBUF; minimum 1.62 V for ADC or COMP, 1.71 V for DAC, 2.0 V for OPAMP and 2.4 V for VREFBUF, maximum 3.6 V."+ },+ {+ "number": "22",+ "name": "PB10",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O with analog switch supplied by VDDA; also OPAMP3_VINM, TIM2_CH3, USART3_TX, LPUART1_RX and QUADSPI1_CLK."+ },+ {+ "number": "23",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected to the external ground."+ },+ {+ "number": "24",+ "name": "VDD",+ "type": "power_in",+ "description": "Main digital supply pin; operating voltage range is 1.71 V to 3.6 V."+ },+ {+ "number": "25",+ "name": "PB11",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC12_IN14, OPAMP6_VOUT, TIM2_CH4, USART3_RX and LPUART1_TX."+ },+ {+ "number": "26",+ "name": "PB12",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC1_IN11, OPAMP6_VINP, SPI2_NSS/I2S2_WS, USART3_CK and FDCAN2_RX."+ },+ {+ "number": "27",+ "name": "PB13",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC3_IN5, OPAMP3_VINP, OPAMP6_VINP, SPI2_SCK/I2S2_CK, USART3_CTS and FDCAN2_TX."+ },+ {+ "number": "28",+ "name": "PB14",+ "type": "bidirectional",+ "description": "3.6 V tolerant I/O with analog switch supplied by VDDA; also ADC1_IN5, OPAMP2_VINP, TIM15_CH1, SPI2_MISO and COMP4_OUT."+ },+ {+ "number": "29",+ "name": "PB15",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with analog switch supplied by VDDA; also ADC2_IN15, RTC_REFIN, TIM15_CH2, COMP3_OUT and SPI2_MOSI/I2S2_SD."+ },+ {+ "number": "30",+ "name": "PA8",+ "type": "bidirectional",+ "description": "5 V tolerant, Fm+ capable I/O; also MCO, I2C3_SCL, I2C2_SDA, TIM1_CH1, USART1_CK and SAI1_CK2."+ },+ {+ "number": "31",+ "name": "PA9",+ "type": "bidirectional",+ "description": "5 V tolerant, Fm+ capable I/O with USB Type-C dead-battery function; a high level on this pin activates the internal 5.1 kΩ pull-down on PB6 (UCPD1_CC1) after reset, also USART1_TX, I2C2_SCL and TIM1_CH2."+ },+ {+ "number": "32",+ "name": "PA10",+ "type": "bidirectional",+ "description": "5 V tolerant, Fm+ capable I/O with USB Type-C dead-battery function; a high level on this pin activates the internal 5.1 kΩ pull-down on PB4 (UCPD1_CC2) after reset, also USART1_RX, SPI2_MISO and USB_CRS_SYNC."+ },+ {+ "number": "33",+ "name": "PA11",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with USB function; also USB_DM, USART1_CTS, SPI2_MOSI/I2S2_SD, TIM1_CH1N, COMP1_OUT and FDCAN1_RX."+ },+ {+ "number": "34",+ "name": "PA12",+ "type": "bidirectional",+ "description": "5 V tolerant I/O with USB function; also USB_DP, USART1_RTS_DE, TIM16_CH1, COMP2_OUT and FDCAN1_TX."+ },+ {+ "number": "35",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected to the external ground."+ },+ {+ "number": "36",+ "name": "VDD",+ "type": "power_in",+ "description": "Main digital supply pin; operating voltage range is 1.71 V to 3.6 V."+ },+ {+ "number": "37",+ "name": "PA13",+ "type": "bidirectional",+ "description": "5 V tolerant, Fm+ capable I/O; after reset it is configured as SWDIO-JTMS with an internal pull-up enabled, also IR_OUT, I2C1_SCL and USART3_CTS."+ },+ {+ "number": "38",+ "name": "PA14",+ "type": "bidirectional",+ "description": "5 V tolerant, Fm+ capable I/O; after reset it is configured as SWCLK-JTCK with an internal pull-down enabled, also I2C1_SDA, LPTIM1_OUT and USART2_TX."+ },+ {+ "number": "39",+ "name": "PA15",+ "type": "bidirectional",+ "description": "5 V tolerant, Fm+ capable I/O; after reset it is configured as JTDI with an internal pull-up enabled, also TIM2_CH1, SPI1_NSS, SPI3_NSS/I2S3_WS and USART2_RX."+ },+ {+ "number": "40",+ "name": "PB3",+ "type": "bidirectional",+ "description": "5 V tolerant I/O; after reset it is configured as JTDO/TRACESWO debug alternate function, also SPI1_SCK, SPI3_SCK/I2S3_CK, USART2_TX and TIM2_CH2."+ },+ {+ "number": "41",+ "name": "PB4",+ "type": "bidirectional",+ "description": "5 V tolerant, USB Type-C CC capable I/O; after reset it is configured as JTRST with an internal pull-up enabled and its UCPD1_CC2 pull-down is enabled unless disabled, also SPI1_MISO, USART2_RX and TIM16_CH1."+ },+ {+ "number": "42",+ "name": "PB5",+ "type": "bidirectional",+ "description": "5 V tolerant, Fm+ capable I/O; also TIM16_BKIN, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI/I2S3_SD, FDCAN2_RX and LPTIM1_IN1."+ },+ {+ "number": "43",+ "name": "PB6",+ "type": "bidirectional",+ "description": "5 V tolerant, USB Type-C CC capable I/O; its UCPD1_CC1 pull-down is controlled by the level on PA9 after reset, also TIM16_CH1N, TIM4_CH1, USART1_TX, COMP4_OUT and FDCAN2_TX."+ },+ {+ "number": "44",+ "name": "PB7",+ "type": "bidirectional",+ "description": "5 V tolerant, Fm+ capable I/O; also PVD_IN, TIM17_CH1N, TIM4_CH2, I2C1_SDA, USART1_RX and COMP3_OUT."+ },+ {+ "number": "45",+ "name": "PB8-BOOT0",+ "type": "bidirectional",+ "description": "5 V tolerant, Fm+ capable I/O that also carries the BOOT0 function; the datasheet recommends setting it to a mode other than analog after startup to limit consumption if left unconnected, also TIM16_CH1, I2C1_SCL and USART3_RX."+ },+ {+ "number": "46",+ "name": "PB9",+ "type": "bidirectional",+ "description": "5 V tolerant, Fm+ capable I/O; also TIM17_CH1, TIM4_CH4, I2C1_SDA, IR_OUT, USART3_TX, COMP2_OUT and FDCAN1_TX."+ },+ {+ "number": "47",+ "name": "VSS",+ "type": "power_in",+ "description": "Ground pin; all VSS pins must be connected to the external ground."+ },+ {+ "number": "48",+ "name": "VDD",+ "type": "power_in",+ "description": "Main digital supply pin; operating voltage range is 1.71 V to 3.6 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The LQFP48 pinout figure (Figure 7, page 46) text extraction is garbled and does not map cleanly to ; The datasheet gives no per-pin prose for LQFP48. Descriptions were compiled from Table 12 (I/O struc; Pin PB8-BOOT0 is listed as I/O (FT_f) in Table 12 with footnote 6, although the Table 11 legend list"+ ],+ "pages_sent": 80,+ "cost_usd": 0.3642,+ "at": "2026-10-08T18:14:56"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590264930139209728",+ "pages": 199,+ "sha256": "ba71e197157250a1",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 48,+ "described": 48,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm32g491cet6.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "9dea352d93177c2904afd7d7b68ea8855ce1ab691f69f8b3e13655600514b6bf",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm32g491cet6-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "7afa41a79a1750debec6eff76ef4b7085d711b6578d4b4a844dea1c7eccf0647",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}