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Contents

README

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STM32G474VET3

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32G474VET3 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5V-tolerant (FT) GPIO port E pin 2 with alternate functions TRACECK, TIM3_CH1, SAI1_CK1, SPI4_SCK, TIM20_CH1, FMC_A23, SAI1_MCLK_A and EVENTOUT.
2 PE3 bidirectional 5V-tolerant (FT) GPIO port E pin 3 with alternate functions TRACED0, TIM3_CH2, SPI4_NSS, TIM20_CH2, FMC_A19, SAI1_SD_B and EVENTOUT.
3 PE4 bidirectional 5V-tolerant (FT) GPIO port E pin 4 with alternate functions TRACED1, TIM3_CH3, SAI1_D2, SPI4_NSS, TIM20_CH1N, FMC_A20, SAI1_FS_A and EVENTOUT.
4 PE5 bidirectional 5V-tolerant (FT) GPIO port E pin 5 with alternate functions TRACED2, TIM3_CH4, SAI1_CK2, SPI4_MISO, TIM20_CH2N, FMC_A21, SAI1_SCK_A and EVENTOUT.
5 PE6 bidirectional 5V-tolerant (FT) GPIO port E pin 6 with alternate functions TRACED3, SAI1_D1, SPI4_MOSI, TIM20_CH3N, FMC_A22, SAI1_SD_A and EVENTOUT, plus additional functions WKUP3 and RTC_TAMP3.
6 VBAT power_in Battery backup supply input, 1.55 V to 3.6 V, powers the RTC, backup registers and LSE oscillator when VDD is not present.
7 PC13 bidirectional FT I/O supplied through the internal power switch (limited to 3 mA sink, max 2 MHz/30 pF and not usable as a current source in output mode) with alternate functions TIM1_BKIN, TIM1_CH1N, TIM8_CH4N, EVENTOUT and additional functions WKUP2, RTC_TAMP1, RTC_TS, RTC_OUT1.
8 PC14-OSC32_IN bidirectional FT I/O supplied through the internal power switch (3 mA/2 MHz output limitation) whose additional function OSC32_IN is the 32.768 kHz LSE crystal oscillator input.
9 PC15-OSC32_OUT bidirectional FT I/O supplied through the internal power switch (3 mA/2 MHz output limitation) whose additional function OSC32_OUT is the 32.768 kHz LSE crystal oscillator output.
10 PF9 bidirectional FT GPIO port F pin 9 with alternate functions TIM20_BKIN, TIM15_CH1, SPI2_SCK, TIM5_CH4, QUADSPI1_BK1_IO1, FMC_A25, SAI1_FS_B and EVENTOUT.
11 PF10 bidirectional FT GPIO port F pin 10 with alternate functions TIM20_BKIN2, TIM15_CH2, SPI2_SCK, QUADSPI1_CLK, FMC_A0, SAI1_D3 and EVENTOUT.
12 PF0-OSC_IN bidirectional FT_fa I/O with alternate functions I2C2_SDA, SPI2_NSS/I2S2_WS, TIM1_CH3N, EVENTOUT and additional functions ADC1_IN10 and OSC_IN, the 4-48 MHz HSE crystal oscillator input.
13 PF1-OSC_OUT bidirectional FT_a I/O with alternate function SPI2_SCK/I2S2_CK and additional functions ADC2_IN10, COMP3_INM and OSC_OUT, the HSE crystal oscillator output.
14 PG10-NRST bidirectional Bidirectional device reset pin (NRST) with an embedded weak pull-up resistor; alternate function MCO/EVENTOUT is available if reconfigured as GPIO by option bytes, in which case it becomes FT tolerant except during the startup period before option bytes load.
15 PC0 bidirectional FT_a I/O with alternate functions LPTIM1_IN1, TIM1_CH1, LPUART1_RX, EVENTOUT and additional functions ADC12_IN6, COMP3_INM.
16 PC1 bidirectional TT_a I/O with alternate functions LPTIM1_OUT, TIM1_CH2, LPUART1_TX, QUADSPI1_BK2_IO0, SAI1_SD_A, EVENTOUT and additional functions ADC12_IN7, COMP3_INP.
17 PC2 bidirectional FT_a I/O with alternate functions LPTIM1_IN2, TIM1_CH3, COMP3_OUT, TIM20_CH2, QUADSPI1_BK2_IO1, EVENTOUT and additional function ADC12_IN8.
18 PC3 bidirectional TT_a I/O with alternate functions LPTIM1_ETR, TIM1_CH4, SAI1_D1, TIM1_BKIN2, QUADSPI1_BK2_IO2, SAI1_SD_A, EVENTOUT and additional functions ADC12_IN9, OPAMP5_VINP.
19 PF2 bidirectional FT GPIO port F pin 2 with alternate functions TIM20_CH3, I2C2_SMBA, FMC_A2 and EVENTOUT.
20 PA0 bidirectional TT_a I/O with alternate functions TIM2_CH1, TIM5_CH1, USART2_CTS, COMP1_OUT, TIM8_BKIN, TIM8_ETR, TIM2_ETR, EVENTOUT and additional functions ADC12_IN1, COMP1_INM, COMP3_INP, RTC_TAMP2, WKUP1.
21 PA1 bidirectional TT_a I/O with alternate functions RTC_REFIN, TIM2_CH2, TIM5_CH2, USART2_RTS_DE, TIM15_CH1N, EVENTOUT and additional functions ADC12_IN2, COMP1_INP, OPAMP1_VINP, OPAMP3_VINP, OPAMP6_VINM.
22 PA2 bidirectional FT_a I/O with alternate functions TIM2_CH3, TIM5_CH3, USART2_TX, COMP2_OUT, TIM15_CH1, QUADSPI1_BK1_NCS, LPUART1_TX, UCPD1_FRSTX, EVENTOUT and additional functions ADC1_IN3, COMP2_INM, OPAMP1_VOUT, WKUP4/LSCO.
23 VSS power_in Digital ground reference pin.
24 VDD power_in Digital supply voltage pin, standard operating range 1.71 V to 3.6 V.
25 PA3 bidirectional TT_a I/O with alternate functions TIM2_CH4, TIM5_CH4, SAI1_CK1, USART2_RX, TIM15_CH2, QUADSPI1_CLK, LPUART1_RX, SAI1_MCLK_A, EVENTOUT and additional functions ADC1_IN4, COMP2_INP, OPAMP1_VINM/VINP, OPAMP5_VINM.
26 PA4 bidirectional TT_a I/O with alternate functions TIM3_CH2, SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, SAI1_FS_B, EVENTOUT and additional functions ADC2_IN17, DAC1_OUT1, COMP1_INM.
27 PA5 bidirectional TT_a I/O with alternate functions TIM2_CH1, TIM2_ETR, SPI1_SCK, UCPD1_FRSTX, EVENTOUT and additional functions ADC2_IN13, DAC1_OUT2, COMP2_INM, OPAMP2_VINM.
28 PA6 bidirectional TT_a I/O with alternate functions TIM16_CH1, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM1_BKIN, COMP1_OUT, QUADSPI1_BK1_IO3, LPUART1_CTS, EVENTOUT and additional functions ADC2_IN3, DAC2_OUT1, OPAMP2_VOUT.
29 PA7 bidirectional TT_a I/O with alternate functions TIM17_CH1, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM1_CH1N, COMP2_OUT, QUADSPI1_BK1_IO2, UCPD1_FRSTX, EVENTOUT and additional functions ADC2_IN4, COMP2_INP, OPAMP1_VINP, OPAMP2_VINP.
30 PC4 bidirectional FT_fa I/O (Fm+ I2C capable, analog switch) with alternate functions TIM1_ETR, I2C2_SCL, USART1_TX, QUADSPI1_BK2_IO3, EVENTOUT and additional function ADC2_IN5.
31 PC5 bidirectional TT_a I/O with alternate functions TIM15_BKIN, SAI1_D3, TIM1_CH4N, USART1_RX, HRTIM1_EEV10, EVENTOUT and additional functions ADC2_IN11, OPAMP1_VINM, OPAMP2_VINM, WKUP5.
32 PB0 bidirectional TT_a I/O with alternate functions TIM3_CH3, TIM8_CH2N, TIM1_CH2N, QUADSPI1_BK1_IO1, HRTIM1_FLT5, UCPD1_FRSTX, EVENTOUT and additional functions ADC3_IN12/ADC1_IN15, COMP4_INP, OPAMP2_VINP, OPAMP3_VINP.
33 PB1 bidirectional TT_a I/O with alternate functions TIM3_CH4, TIM8_CH3N, TIM1_CH3N, COMP4_OUT, QUADSPI1_BK1_IO0, LPUART1_RTS_DE, HRTIM1_SCOUT, EVENTOUT and additional functions ADC3_IN1/ADC1_IN12, COMP1_INP, OPAMP3_VOUT, OPAMP6_VINM.
34 PB2 bidirectional TT_a I/O with alternate functions RTC_OUT2, LPTIM1_OUT, TIM5_CH1, TIM20_CH1, I2C3_SMBA, QUADSPI1_BK2_IO1, HRTIM1_SCIN, EVENTOUT and additional functions ADC2_IN12, COMP4_INM, OPAMP3_VINM.
35 VSSA power_in Analog ground reference pin for the ADCs, DACs, comparators, op-amps and VREFBUF.
36 VREF+ power_in Positive analog reference supply pin for the ADCs/DACs; additional function VREFBUF_OUT is the output of the internal voltage reference buffer, with an allowed VREF+ to VDDA difference of up to 0.4 V.
37 VDDA power_in Analog supply voltage pin, valid range depends on the analog block in use (1.62 V min for ADC/COMP, 1.71 V min for DAC, 2.0 V min for OPAMP, 2.4 V min for VREFBUF), up to 3.6 V.
38 PE7 bidirectional TT_a I/O with alternate functions TIM1_ETR, FMC_D4, SAI1_SD_B, EVENTOUT and additional functions ADC3_IN4, COMP4_INP.
39 PE8 bidirectional FT_a I/O with alternate functions TIM5_CH3, TIM1_CH1N, FMC_D5, SAI1_SCK_B, EVENTOUT and additional functions ADC345_IN6, COMP4_INM.
40 PE9 bidirectional FT_a I/O with alternate functions TIM5_CH4, TIM1_CH1, FMC_D6, SAI1_FS_B, EVENTOUT and additional function ADC3_IN2.
41 PE10 bidirectional FT_a I/O with alternate functions TIM1_CH2N, QUADSPI1_CLK, FMC_D7, SAI1_MCLK_B, EVENTOUT and additional function ADC345_IN14.
42 PE11 bidirectional FT_a I/O with alternate functions TIM1_CH2, SPI4_NSS, QUADSPI1_BK1_NCS, FMC_D8, EVENTOUT and additional function ADC345_IN15.
43 PE12 bidirectional FT_a I/O with alternate functions TIM1_CH3N, SPI4_SCK, QUADSPI1_BK1_IO0, FMC_D9, EVENTOUT and additional function ADC345_IN16.
44 PE13 bidirectional FT_a I/O with alternate functions TIM1_CH3, SPI4_MISO, QUADSPI1_BK1_IO1, FMC_D10, EVENTOUT and additional function ADC3_IN3.
45 PE14 bidirectional FT_a I/O with alternate functions TIM1_CH4, SPI4_MOSI, TIM1_BKIN2, QUADSPI1_BK1_IO2, FMC_D11, EVENTOUT and additional function ADC4_IN1.
46 PE15 bidirectional FT_a I/O with alternate functions TIM1_BKIN, TIM1_CH4N, USART3_RX, QUADSPI1_BK1_IO3, FMC_D12, EVENTOUT and additional function ADC4_IN2.
47 PB10 bidirectional TT_a I/O with alternate functions TIM2_CH3, USART3_TX, LPUART1_RX, QUADSPI1_CLK, TIM1_BKIN, HRTIM1_FLT3, SAI1_SCK_A, EVENTOUT and additional functions COMP5_INM, OPAMP3_VINM, OPAMP4_VINM.
48 VSS power_in Digital ground reference pin.
49 VDD power_in Digital supply voltage pin, 1.71 V to 3.6 V.
50 PB11 bidirectional TT_a I/O with alternate functions TIM2_CH4, USART3_RX, LPUART1_TX, QUADSPI1_BK1_NCS, HRTIM1_FLT4, EVENTOUT and additional functions ADC12_IN14, COMP6_INP, OPAMP4_VINP, OPAMP6_VOUT.
51 PB12 bidirectional TT_a I/O with alternate functions TIM5_ETR, I2C2_SMBA, SPI2_NSS/I2S2_WS, TIM1_BKIN, USART3_CK, LPUART1_RTS_DE, FDCAN2_RX, HRTIM1_CHC1, EVENTOUT and additional functions ADC4_IN3/ADC1_IN11, COMP7_INM, OPAMP4_VOUT, OPAMP6_VINP.
52 PB13 bidirectional TT_a I/O with alternate functions SPI2_SCK/I2S2_CK, TIM1_CH1N, USART3_CTS, LPUART1_CTS, FDCAN2_TX, HRTIM1_CHC2, EVENTOUT and additional functions ADC3_IN5, COMP5_INP, OPAMP3_VINP, OPAMP4_VINP, OPAMP6_VINP.
53 PB14 bidirectional TT_a I/O with alternate functions TIM15_CH1, SPI2_MISO, TIM1_CH2N, USART3_RTS_DE, COMP4_OUT, HRTIM1_CHD1, EVENTOUT and additional functions ADC4_IN4/ADC1_IN5, COMP7_INP, OPAMP2_VINP, OPAMP5_VINP.
54 PB15 bidirectional TT_a I/O with alternate functions RTC_REFIN, TIM15_CH2, TIM15_CH1N, COMP3_OUT, TIM1_CH3N, SPI2_MOSI/I2S2_SD, HRTIM1_CHD2, EVENTOUT and additional functions ADC4_IN5/ADC2_IN15, COMP6_INM, OPAMP5_VINM.
55 PD8 bidirectional TT_a I/O with alternate functions USART3_TX, FMC_D13, EVENTOUT and additional functions ADC4_IN12/ADC5_IN12, OPAMP4_VINM.
56 PD9 bidirectional TT_a I/O with alternate functions USART3_RX, FMC_D14, EVENTOUT and additional functions ADC4_IN13/ADC5_IN13, OPAMP6_VINP.
57 PD10 bidirectional FT_a I/O with alternate functions USART3_CK, FMC_D15, EVENTOUT and additional functions ADC345_IN7, COMP6_INM.
58 PD11 bidirectional TT_a I/O with alternate functions TIM5_ETR, I2C4_SMBA, USART3_CTS, FMC_A16, EVENTOUT and additional functions ADC345_IN8, COMP6_INP, OPAMP4_VINP.
59 PD12 bidirectional TT_a I/O with alternate functions TIM4_CH1, USART3_RTS_DE, FMC_A17, EVENTOUT and additional functions ADC345_IN9, COMP5_INP, OPAMP5_VINP.
60 PD13 bidirectional FT_a I/O with alternate functions TIM4_CH2, FMC_A18, EVENTOUT and additional functions ADC345_IN10, COMP5_INM.
61 PD14 bidirectional TT_a I/O with alternate functions TIM4_CH3, FMC_D0, EVENTOUT and additional functions ADC345_IN11, COMP7_INP, OPAMP2_VINP.
62 PD15 bidirectional FT_a I/O with alternate functions TIM4_CH4, SPI2_NSS, FMC_D1, EVENTOUT and additional function COMP7_INM.
63 VSS power_in Digital ground reference pin.
64 VDD power_in Digital supply voltage pin, 1.71 V to 3.6 V.
65 PC6 bidirectional FT_f I/O (Fm+ capable) with alternate functions TIM3_CH1, HRTIM1_EEV10, TIM8_CH1, I2S2_MCK, COMP6_OUT, I2C4_SCL, HRTIM1_CHF1, EVENTOUT.
66 PC7 bidirectional FT_f I/O with alternate functions TIM3_CH2, HRTIM1_FLT5, TIM8_CH2, I2S3_MCK, COMP5_OUT, I2C4_SDA, HRTIM1_CHF2, EVENTOUT.
67 PC8 bidirectional FT_f I/O with alternate functions TIM3_CH3, HRTIM1_CHE1, TIM8_CH3, TIM20_CH3, COMP7_OUT, I2C3_SCL, EVENTOUT.
68 PC9 bidirectional FT_f I/O with alternate functions TIM3_CH4, HRTIM1_CHE2, TIM8_CH4, I2SCKIN, TIM8_BKIN2, I2C3_SDA, EVENTOUT.
69 PA8 bidirectional FT_a I/O with alternate functions MCO, I2C3_SCL, I2C2_SDA, I2S2_MCK, TIM1_CH1, USART1_CK, COMP7_OUT, TIM4_ETR, FDCAN3_RX, SAI1_CK2, HRTIM1_CHA1, SAI1_SCK_A, EVENTOUT and additional functions ADC5_IN1, OPAMP5_VOUT.
70 PA9 bidirectional FT_fda I/O (Fm+, USB Type-C PD dead-battery capable) with alternate functions I2C3_SMBA, I2C2_SCL, I2S3_MCK, TIM1_CH2, USART1_TX, COMP5_OUT, TIM15_BKIN, TIM2_CH3, HRTIM1_CHA2, SAI1_FS_A, EVENTOUT and additional functions ADC5_IN2, UCPD1_DBCC1 (a high level activates the UCPD dead-battery pull-down on PB6/CC1, removable via UCPD1_DBDIS).
71 PA10 bidirectional FT_fda I/O with alternate functions TIM17_BKIN, USB_CRS_SYNC, I2C2_SMBA, SPI2_MISO, TIM1_CH3, USART1_RX, COMP6_OUT, TIM2_CH4, TIM8_BKIN, SAI1_D1, HRTIM1_CHB1, SAI1_SD_A, EVENTOUT and additional functions UCPD1_DBCC2 (activates dead-battery pull-down on PB4/CC2) and PVD_IN.
72 PA11 bidirectional FT_u I/O (USB capable) with alternate functions SPI2_MOSI/I2S2_SD, TIM1_CH1N, USART1_CTS, COMP1_OUT, FDCAN1_RX, TIM4_CH1, TIM1_CH4, TIM1_BKIN2, HRTIM1_CHB2, EVENTOUT and additional function USB_DM.
73 PA12 bidirectional FT_u I/O with alternate functions TIM16_CH1, I2SCKIN, TIM1_CH2N, USART1_RTS_DE, COMP2_OUT, FDCAN1_TX, TIM4_CH2, TIM1_ETR, HRTIM1_FLT1, EVENTOUT and additional function USB_DP.
74 VSS power_in Digital ground reference pin.
75 VDD power_in Digital supply voltage pin, 1.71 V to 3.6 V.
76 PA13 bidirectional FT_f I/O configured after reset as SWDIO-JTMS debug alternate function with an internal pull-up activated; other alternate functions TIM16_CH1N, I2C4_SCL, I2C1_SCL, IR_OUT, USART3_CTS, TIM4_CH3, SAI1_SD_B, EVENTOUT.
77 PA14 bidirectional FT_f I/O configured after reset as SWCLK-JTCK debug alternate function with an internal pull-down activated; other alternate functions LPTIM1_OUT, I2C4_SMBA, I2C1_SDA, TIM8_CH2, TIM1_BKIN, USART2_TX, SAI1_FS_B, EVENTOUT.
78 PA15 bidirectional FT_f I/O configured after reset as JTDI debug alternate function with an internal pull-up activated; other alternate functions TIM2_CH1, TIM8_CH1, I2C1_SCL, SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_RX, UART4_RTS_DE, TIM1_BKIN, FDCAN3_TX, HRTIM1_FLT2, TIM2_ETR, EVENTOUT.
79 PC10 bidirectional FT I/O with alternate functions TIM8_CH1N, UART4_TX, SPI3_SCK/I2S3_CK, USART3_TX, HRTIM1_FLT6, EVENTOUT.
80 PC11 bidirectional FT_f I/O with alternate functions HRTIM1_EEV2, TIM8_CH2N, UART4_RX, SPI3_MISO, USART3_RX, I2C3_SDA, EVENTOUT.
81 PC12 bidirectional FT I/O with alternate functions TIM5_CH2, HRTIM1_EEV1, TIM8_CH3N, UART5_TX, SPI3_MOSI/I2S3_SD, USART3_CK, UCPD1_FRSTX, EVENTOUT.
82 PD0 bidirectional FT I/O with alternate functions TIM8_CH4N, FDCAN1_RX, FMC_D2, EVENTOUT.
83 PD1 bidirectional FT I/O with alternate functions TIM8_CH4, TIM8_BKIN2, FDCAN1_TX, FMC_D3, EVENTOUT.
84 PD2 bidirectional FT I/O with alternate functions TIM3_ETR, TIM8_BKIN, UART5_RX, EVENTOUT.
85 PD3 bidirectional FT I/O with alternate functions TIM2_CH1/TIM2_ETR, USART2_CTS, QUADSPI1_BK2_NCS, FMC_CLK, EVENTOUT.
86 PD4 bidirectional FT I/O with alternate functions TIM2_CH2, USART2_RTS_DE, QUADSPI1_BK2_IO0, FMC_NOE, EVENTOUT.
87 PD5 bidirectional FT I/O with alternate functions USART2_TX, QUADSPI1_BK2_IO1, FMC_NWE, EVENTOUT.
88 PD6 bidirectional FT I/O with alternate functions TIM2_CH4, SAI1_D1, USART2_RX, QUADSPI1_BK2_IO2, FMC_NWAIT, SAI1_SD_A, EVENTOUT.
89 PD7 bidirectional FT I/O with alternate functions TIM2_CH3, USART2_CK, QUADSPI1_BK2_IO3, FMC_NCE/FMC_NE1, EVENTOUT.
90 PB3 bidirectional FT I/O configured after reset as JTDO-TRACESWO debug alternate function with an internal pull-up activated; other alternate functions TIM2_CH2, TIM4_ETR, UCPD1_CRS_SYNC, TIM8_CH1N, SPI1_SCK, SPI3_SCK/I2S3_CK, USART2_TX, TIM3_ETR, FDCAN3_RX, HRTIM1_SCOUT, HRTIM1_EEV9, SAI1_SCK_B, EVENTOUT.
91 PB4 bidirectional FT_c I/O (USB Type-C PD capable) configured after reset as JTRST debug alternate function with an internal pull-up activated; carries UCPD1_CC2 with an internal 5.1 kOhm pull-down controlled by a high level on PA10 (dead-battery, disable via UCPD1_DBDIS); other alternate functions TIM16_CH1, TIM3_CH1, TIM8_CH2N, SPI1_MISO, SPI3_MISO, USART2_RX, UART5_RTS_DE, TIM17_BKIN, FDCAN3_TX, HRTIM1_EEV7, SAI1_MCLK_B, EVENTOUT.
92 PB5 bidirectional FT_f I/O with alternate functions TIM16_BKIN, TIM3_CH2, TIM8_CH3N, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI/I2S3_SD, USART2_CK, I2C3_SDA, FDCAN2_RX, TIM17_CH1, LPTIM1_IN1, SAI1_SD_B, HRTIM1_EEV6, UART5_CTS, EVENTOUT.
93 PB6 bidirectional FT_c I/O (USB Type-C PD capable) carrying UCPD1_CC1 with an internal 5.1 kOhm pull-down controlled by a high level on PA9 (dead-battery, disable via UCPD1_DBDIS); other alternate functions TIM16_CH1N, TIM4_CH1, TIM8_CH1, TIM8_ETR, USART1_TX, COMP4_OUT, FDCAN2_TX, TIM8_BKIN2, LPTIM1_ETR, HRTIM1_SCIN, HRTIM1_EEV4, SAI1_FS_B, EVENTOUT.
94 PB7 bidirectional FT_f I/O with alternate functions TIM17_CH1N, TIM4_CH2, I2C4_SDA, I2C1_SDA, TIM8_BKIN, USART1_RX, COMP3_OUT, TIM3_CH4, LPTIM1_IN2, FMC_NL, HRTIM1_EEV3, UART4_CTS, EVENTOUT.
95 PB8-BOOT0 bidirectional FT_f I/O that also serves as the dedicated BOOT0 boot-mode selection pin; it is recommended to set it to a non-analog mode after startup to limit consumption if left unconnected; alternate functions TIM16_CH1, TIM4_CH3, SAI1_CK1, I2C1_SCL, USART3_RX, COMP1_OUT, FDCAN1_RX, TIM8_CH2, TIM1_BKIN, HRTIM1_EEV8, SAI1_MCLK_A, EVENTOUT.
96 PB9 bidirectional FT_f I/O with alternate functions TIM17_CH1, TIM4_CH4, SAI1_D2, I2C1_SDA, IR_OUT, USART3_TX, COMP2_OUT, FDCAN1_TX, TIM8_CH3, TIM1_CH3N, HRTIM1_EEV5, SAI1_FS_A, EVENTOUT.
97 PE0 bidirectional FT I/O with alternate functions TIM4_ETR, TIM20_CH4N, TIM16_CH1, TIM20_ETR, USART1_TX, FMC_NBL0, EVENTOUT.
98 PE1 bidirectional FT I/O with alternate functions TIM17_CH1, TIM20_CH4, USART1_RX, FMC_NBL1, EVENTOUT.
99 VSS power_in Digital ground reference pin.
100 VDD power_in Digital supply voltage pin, 1.71 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32G474VET3
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32g474vet3-etched.step / stm32g474vet3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32g474vet3.step / stm32g474vet3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (236 pp, sha256 b018e20dbe34b63a, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF