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Contents

README

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STM32G474CET6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM32G474CET6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Backup supply for RTC, LSE and backup registers, operating range 1.55 V to 3.6 V.
2 PC13 bidirectional FT I/O supplied through the power switch; in output mode limited to 2 MHz, 30 pF load, 3 mA sink, no LED drive; functions WKUP2, RTC_TAMP1, RTC_TS, RTC_OUT1.
3 PC14-OSC32_IN bidirectional FT I/O supplied through the power switch (limited output drive); LSE oscillator input OSC32_IN.
4 PC15-OSC32_OUT bidirectional FT I/O supplied through the power switch (limited output drive); LSE oscillator output OSC32_OUT.
5 PF0-OSC_IN bidirectional FT_fa I/O with ADC1_IN10 and HSE oscillator input OSC_IN; alternate functions I2C2_SDA, SPI2_NSS/I2S2_WS, TIM1_CH3N.
6 PF1-OSC_OUT bidirectional FT_a I/O with ADC2_IN10, COMP3_INM and HSE oscillator output OSC_OUT; alternate function SPI2_SCK/I2S2_CK.
7 PG10-NRST bidirectional Bidirectional reset pin with embedded weak pull-up (NRST); can also be used as GPIO PG10 with MCO alternate function.
8 PA0 bidirectional TT_a I/O with ADC12_IN1, COMP1_INM, COMP3_INP, RTC_TAMP2 and WKUP1; alternate functions TIM2_CH1, TIM5_CH1, USART2_CTS, TIM8_ETR.
9 PA1 bidirectional TT_a I/O with ADC12_IN2, COMP1_INP, OPAMP1_VINP, OPAMP3_VINP, OPAMP6_VINM; alternate functions TIM2_CH2, TIM5_CH2, USART2_RTS_DE.
10 PA2 bidirectional FT_a I/O with ADC1_IN3, COMP2_INM, OPAMP1_VOUT, WKUP4/LSCO; alternate functions TIM2_CH3, USART2_TX, LPUART1_TX.
11 PA3 bidirectional TT_a I/O with ADC1_IN4, COMP2_INP, OPAMP1_VINM/VINP, OPAMP5_VINM; alternate functions TIM2_CH4, USART2_RX, LPUART1_RX.
12 PA4 bidirectional TT_a I/O with ADC2_IN17, DAC1_OUT1, COMP1_INM; alternate functions SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK.
13 PA5 bidirectional TT_a I/O with ADC2_IN13, DAC1_OUT2, COMP2_INM, OPAMP2_VINM; alternate functions TIM2_CH1, SPI1_SCK.
14 PA6 bidirectional TT_a I/O with ADC2_IN3, DAC2_OUT1, OPAMP2_VOUT; alternate functions TIM16_CH1, TIM3_CH1, SPI1_MISO, LPUART1_CTS.
15 PA7 bidirectional TT_a I/O with ADC2_IN4, COMP2_INP, OPAMP1_VINP, OPAMP2_VINP; alternate functions TIM17_CH1, SPI1_MOSI, TIM1_CH1N.
16 PB0 bidirectional TT_a I/O with ADC3_IN12/ADC1_IN15, COMP4_INP, OPAMP2_VINP, OPAMP3_VINP; alternate functions TIM3_CH3, TIM8_CH2N, TIM1_CH2N.
17 PB1 bidirectional TT_a I/O with ADC3_IN1/ADC1_IN12, COMP1_INP, OPAMP3_VOUT, OPAMP6_VINM; alternate functions TIM3_CH4, COMP4_OUT, LPUART1_RTS_DE.
18 PB2 bidirectional TT_a I/O with ADC2_IN12, COMP4_INM, OPAMP3_VINM; alternate functions RTC_OUT2, LPTIM1_OUT, TIM5_CH1, I2C3_SMBA.
19 VSSA power_in Analog ground; must always be connected to the external supply ground.
20 VREF+ power_in Positive voltage reference for ADC/DAC/comparators, also VREFBUF_OUT; VREF+ - VDDA must not exceed 0.4 V.
21 VDDA power_in Analog supply, 1.62 V min with ADC, 1.8 V min with DAC/OPAMP/COMP, 2.4 V min with VREFBUF, 3.6 V max.
22 PB10 bidirectional TT_a I/O with COMP5_INM, OPAMP3_VINM, OPAMP4_VINM; alternate functions TIM2_CH3, USART3_TX, LPUART1_RX, QUADSPI1_CLK.
23 VSS power_in Digital ground; must always be connected to the external supply ground.
24 VDD power_in Digital supply, 1.71 V to 3.6 V, to be decoupled with 100 nF ceramic capacitors plus 4.7 µF.
25 PB11 bidirectional TT_a I/O with ADC12_IN14, COMP6_INP, OPAMP4_VINP, OPAMP6_VOUT; alternate functions TIM2_CH4, USART3_RX, LPUART1_TX.
26 PB12 bidirectional TT_a I/O with ADC4_IN3/ADC1_IN11, COMP7_INM, OPAMP4_VOUT, OPAMP6_VINP; alternate functions SPI2_NSS/I2S2_WS, USART3_CK, FDCAN2_RX.
27 PB13 bidirectional TT_a I/O with ADC3_IN5, COMP5_INP, OPAMP3_VINP, OPAMP4_VINP, OPAMP6_VINP; alternate functions SPI2_SCK/I2S2_CK, USART3_CTS, FDCAN2_TX.
28 PB14 bidirectional TT_a I/O with ADC4_IN4/ADC1_IN5, COMP7_INP, OPAMP2_VINP, OPAMP5_VINP; alternate functions TIM15_CH1, SPI2_MISO, USART3_RTS_DE.
29 PB15 bidirectional TT_a I/O with ADC4_IN5/ADC2_IN15, COMP6_INM, OPAMP5_VINM; alternate functions RTC_REFIN, TIM15_CH2, SPI2_MOSI/I2S2_SD.
30 PA8 bidirectional FT_a I/O with ADC5_IN1, OPAMP5_VOUT; alternate functions MCO, I2C3_SCL, TIM1_CH1, USART1_CK.
31 PA9 bidirectional FT_fda I/O with ADC5_IN2 and UCPD1_DBCC1; alternate functions I2C3_SMBA, I2C2_SCL, TIM1_CH2, USART1_TX.
32 PA10 bidirectional FT_fda I/O with UCPD1_DBCC2; alternate functions TIM17_BKIN, USB_CRS_SYNC, TIM1_CH3, USART1_RX.
33 PA11 bidirectional FT_u I/O with USB_DM; alternate functions SPI2_MOSI/I2S2_SD, TIM1_CH1N, USART1_CTS, FDCAN1_RX.
34 PA12 bidirectional FT_u I/O with USB_DP; alternate functions TIM16_CH1, TIM1_CH2N, USART1_RTS_DE, FDCAN1_TX.
35 VSS power_in Digital ground; must always be connected to the external supply ground.
36 VDD power_in Digital supply, 1.71 V to 3.6 V, to be decoupled with 100 nF ceramic capacitors plus 4.7 µF.
37 PA13 bidirectional FT_f I/O, SWDIO-JTMS after reset with internal pull-up active; alternate functions TIM16_CH1N, I2C4_SCL, I2C1_SCL, IR_OUT.
38 PA14 bidirectional FT_f I/O, SWCLK-JTCK after reset with internal pull-down active; alternate functions LPTIM1_OUT, I2C4_SMBA, I2C1_SDA, USART2_TX.
39 PA15 bidirectional FT_f I/O, JTDI after reset with internal pull-up active; alternate functions TIM2_CH1, I2C1_SCL, SPI1_NSS, USART2_RX.
40 PB3 bidirectional FT I/O, JTDO-TRACESWO after reset; alternate functions TIM2_CH2, SPI1_SCK, SPI3_SCK/I2S3_CK, USART2_TX.
41 PB4 bidirectional FT_c I/O with UCPD1_CC2, JTRST after reset with internal pull-up active; alternate functions TIM16_CH1, TIM3_CH1, SPI1_MISO, USART2_RX.
42 PB5 bidirectional FT_f I/O; alternate functions TIM16_BKIN, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, USART2_CK, FDCAN2_RX.
43 PB6 bidirectional FT_c I/O with UCPD1_CC1; alternate functions TIM16_CH1N, TIM4_CH1, USART1_TX, FDCAN2_TX.
44 PB7 bidirectional FT_f I/O with PVD_IN; alternate functions TIM17_CH1N, TIM4_CH2, I2C4_SDA, I2C1_SDA, USART1_RX.
45 PB8-BOOT0 bidirectional FT_f I/O doubling as BOOT0 pin; set to a mode other than analog after startup to limit consumption if left unconnected.
46 PB9 bidirectional FT_f I/O; alternate functions TIM17_CH1, TIM4_CH4, SAI1_D2, I2C1_SDA, IR_OUT, USART3_TX, FDCAN1_TX.
47 VSS power_in Digital ground; must always be connected to the external supply ground.
48 VDD power_in Digital supply, 1.71 V to 3.6 V, to be decoupled with 100 nF ceramic capacitors plus 4.7 µF.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

CAD (KiCad official)

  • Symbol: STM32G474CET6
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32g474cet6-etched.step / stm32g474cet6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32g474cet6.step / stm32g474cet6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (236 pp, sha256 d493fe0ab22e61ff, retrieved 2026-10-01, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF