component
STM32G473RBT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32G473RBT6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
STM32G473RBT6 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup operating voltage of 1.55 V to 3.6 V, supplying the RTC and backup registers. |
| 2 | PC13 | bidirectional | 5 V tolerant (FT) GPIO supplied through the power switch, which sinks only 3 mA, so output use is limited to 2 MHz with a 30 pF load and it must not be used as a current source; also WKUP2, RTC_TAMP1, RTC_TS and RTC_OUT1. |
| 3 | PC14-OSC32_IN | bidirectional | 5 V tolerant GPIO supplied through the power switch (3 mA sink limit, 2 MHz and 30 pF output limit, no current sourcing) and the 32 kHz oscillator input OSC32_IN. |
| 4 | PC15-OSC32_OUT | bidirectional | 5 V tolerant GPIO supplied through the power switch (3 mA sink limit, 2 MHz and 30 pF output limit, no current sourcing) and the 32 kHz oscillator output OSC32_OUT. |
| 5 | PF0-OSC_IN | bidirectional | 5 V tolerant Fm+ capable I/O with analog switch supplied by VDDA, also serving as HSE oscillator input OSC_IN and ADC1_IN10. |
| 6 | PF1-OSC_OUT | bidirectional | 5 V tolerant I/O with analog switch supplied by VDDA, also serving as HSE oscillator output OSC_OUT, with ADC2_IN10 and COMP3_INM. |
| 7 | PG10-NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor; 5 V tolerant I/O (FT) with MCO alternate function. |
| 8 | PC0 | bidirectional | 5 V tolerant I/O with analog switch supplied by VDDA; alternate functions LPTIM1_IN1, TIM1_CH1 and LPUART1_RX; analog inputs ADC12_IN6 and COMP3_INM. |
| 9 | PC1 | bidirectional | 3.6 V tolerant I/O (TT) with analog switch supplied by VDDA; alternate functions LPTIM1_OUT, TIM1_CH2, LPUART1_TX, QUADSPI1_BK2_IO0 and SAI1_SD_A; analog inputs ADC12_IN7 and COMP3_INP. |
| 10 | PC2 | bidirectional | 5 V tolerant I/O with analog switch supplied by VDDA; alternate functions LPTIM1_IN2, TIM1_CH3, COMP3_OUT, TIM20_CH2 and QUADSPI1_BK2_IO1; analog input ADC12_IN8. |
| 11 | PC3 | bidirectional | 3.6 V tolerant I/O (TT) with analog switch supplied by VDDA; alternate functions LPTIM1_ETR, TIM1_CH4, SAI1_D1, TIM1_BKIN2 and QUADSPI1_BK2_IO2; analog inputs ADC12_IN9 and OPAMP5_VINP. |
| 12 | PA0 | bidirectional | 3.6 V tolerant I/O (TT) with analog switch supplied by VDDA; alternate functions TIM2_CH1, TIM5_CH1, USART2_CTS, COMP1_OUT and TIM8_BKIN; analog inputs ADC12_IN1, COMP1_INM and COMP3_INP; also RTC_TAMP2 and WKUP1. |
| 13 | PA1 | bidirectional | 3.6 V tolerant I/O (TT) with analog switch supplied by VDDA; alternate functions RTC_REFIN, TIM2_CH2, TIM5_CH2, USART2_RTS_DE and TIM15_CH1N; analog inputs ADC12_IN2, COMP1_INP, OPAMP1_VINP, OPAMP3_VINP and OPAMP6_VINM. |
| 14 | PA2 | bidirectional | 5 V tolerant I/O with analog switch supplied by VDDA; alternate functions TIM2_CH3, TIM5_CH3, USART2_TX, COMP2_OUT, TIM15_CH1, LPUART1_TX and UCPD1_FRSTX; analog inputs ADC1_IN3, COMP2_INM and OPAMP1_VOUT; also WKUP4/LSCO. |
| 15 | VSS | power_in | Ground pin that must be connected to the external ground within the permitted range. |
| 16 | VDD | power_in | Standard operating voltage of 1.71 V to 3.6 V; functionality is guaranteed down to VBOR0 min once RESET is released. |
| 17 | PA3 | bidirectional | 3.6 V tolerant I/O (TT) with analog switch supplied by VDDA; alternate functions TIM2_CH4, TIM5_CH4, SAI1_CK1, USART2_RX, TIM15_CH2 and LPUART1_RX; analog inputs ADC1_IN4, COMP2_INP, OPAMP1_VINM/OPAMP1_VINP and OPAMP5_VINM. |
| 18 | PA4 | bidirectional | 3.6 V tolerant I/O (TT) with analog switch supplied by VDDA; alternate functions TIM3_CH2, SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK and SAI1_FS_B; analog inputs ADC2_IN17, DAC1_OUT1 and COMP1_INM. |
| 19 | PA5 | bidirectional | 3.6 V tolerant I/O (TT) with analog switch supplied by VDDA; alternate functions TIM2_CH1, TIM2_ETR, SPI1_SCK and UCPD1_FRSTX; analog inputs ADC2_IN13, DAC1_OUT2, COMP2_INM and OPAMP2_VINM. |
| 20 | PA6 | bidirectional | 3.6 V tolerant I/O (TT) with analog switch supplied by VDDA; alternate functions TIM16_CH1, TIM3_CH1, TIM8_BKIN, SPI1_MISO, COMP1_OUT, QUADSPI1_BK1_IO3 and LPUART1_CTS; analog inputs ADC2_IN3, DAC2_OUT1 and OPAMP2_VOUT. |
| 21 | PA7 | bidirectional | 3.6 V tolerant I/O (TT) with analog switch supplied by VDDA; alternate functions TIM17_CH1, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, COMP2_OUT, QUADSPI1_BK1_IO2 and UCPD1_FRSTX; analog inputs ADC2_IN4, COMP2_INP, OPAMP1_VINP and OPAMP2_VINP. |
| 22 | PC4 | bidirectional | 5 V tolerant Fm+ capable I/O with analog switch supplied by VDDA; alternate functions TIM1_ETR, I2C2_SCL, USART1_TX and QUADSPI1_BK2_IO3; analog input ADC2_IN5. |
| 23 | PC5 | bidirectional | 3.6 V tolerant I/O (TT) with analog switch supplied by VDDA; alternate functions TIM15_BKIN, SAI1_D3, TIM1_CH4N and USART1_RX; analog inputs ADC2_IN11, OPAMP1_VINM and OPAMP2_VINM; also WKUP5. |
| 24 | PB0 | bidirectional | 3.6 V tolerant I/O (TT) with analog switch supplied by VDDA; alternate functions TIM3_CH3, TIM8_CH2N, TIM1_CH2N, QUADSPI1_BK1_IO1 and UCPD1_FRSTX; analog inputs ADC3_IN12/ADC1_IN15, COMP4_INP, OPAMP2_VINP and OPAMP3_VINP. |
| 25 | PB1 | bidirectional | 3.6 V tolerant I/O (TT) with analog switch supplied by VDDA; alternate functions TIM3_CH4, TIM8_CH3N, TIM1_CH3N, COMP4_OUT, QUADSPI1_BK1_IO0 and LPUART1_RTS_DE; analog inputs ADC3_IN1/ADC1_IN12, COMP1_INP, OPAMP3_VOUT and OPAMP6_VINM. |
| 26 | PB2 | bidirectional | 3.6 V tolerant I/O (TT) with analog switch supplied by VDDA; alternate functions RTC_OUT2, LPTIM1_OUT, TIM5_CH1, TIM20_CH1, I2C3_SMBA and QUADSPI1_BK2_IO1; analog inputs ADC2_IN12, COMP4_INM and OPAMP3_VINM. |
| 27 | VSSA | power_in | Analog ground pin that must be connected to the external ground within the permitted range. |
| 28 | VREF+ | power_in | Positive reference voltage pin (additional function VREFBUF_OUT) that may be internally connected to VDDA depending on the package. |
| 29 | VDDA | power_in | Analog supply of 1.62 V minimum for the ADC, 1.8 V minimum for the DAC, OPAMP and COMP (2.4 V minimum when VREFBUF is used), up to 3.6 V. |
| 30 | PB10 | bidirectional | 3.6 V tolerant I/O (TT) with analog switch supplied by VDDA; alternate functions TIM2_CH3, USART3_TX, LPUART1_RX, QUADSPI1_CLK, TIM1_BKIN and SAI1_SCK_A; analog inputs COMP5_INM, OPAMP3_VINM and OPAMP4_VINM. |
| 31 | VSS | power_in | Ground pin that must be connected to the external ground within the permitted range. |
| 32 | VDD | power_in | Standard operating voltage of 1.71 V to 3.6 V; functionality is guaranteed down to VBOR0 min once RESET is released. |
| 33 | PB11 | bidirectional | 3.6 V tolerant I/O (TT) with analog switch supplied by VDDA; alternate functions TIM2_CH4, USART3_RX, LPUART1_TX and QUADSPI1_BK1_NCS; analog inputs ADC12_IN14, COMP6_INP, OPAMP4_VINP and OPAMP6_VOUT. |
| 34 | PB12 | bidirectional | 3.6 V tolerant I/O (TT) with analog switch supplied by VDDA; alternate functions TIM5_ETR, I2C2_SMBA, SPI2_NSS/I2S2_WS, TIM1_BKIN, USART3_CK, LPUART1_RTS_DE and FDCAN2_RX; analog inputs ADC4_IN3/ADC1_IN11, COMP7_INM, OPAMP4_VOUT and OPAMP6_VINP. |
| 35 | PB13 | bidirectional | 3.6 V tolerant I/O (TT) with analog switch supplied by VDDA; alternate functions SPI2_SCK/I2S2_CK, TIM1_CH1N, USART3_CTS, LPUART1_CTS and FDCAN2_TX; analog inputs ADC3_IN5, COMP5_INP, OPAMP3_VINP, OPAMP4_VINP and OPAMP6_VINP. |
| 36 | PB14 | bidirectional | 3.6 V tolerant I/O (TT) with analog switch supplied by VDDA; alternate functions TIM15_CH1, SPI2_MISO, TIM1_CH2N, USART3_RTS_DE and COMP4_OUT; analog inputs ADC4_IN4/ADC1_IN5, COMP7_INP, OPAMP2_VINP and OPAMP5_VINP. |
| 37 | PB15 | bidirectional | 3.6 V tolerant I/O (TT) with analog switch supplied by VDDA; alternate functions RTC_REFIN, TIM15_CH2, TIM15_CH1N, COMP3_OUT, TIM1_CH3N and SPI2_MOSI/I2S2_SD; analog inputs ADC4_IN5/ADC2_IN15, COMP6_INM and OPAMP5_VINM. |
| 38 | PC6 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f); alternate functions TIM3_CH1, TIM8_CH1, I2S2_MCK, COMP6_OUT and I2C4_SCL. |
| 39 | PC7 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f); alternate functions TIM3_CH2, TIM8_CH2, I2S3_MCK, COMP5_OUT and I2C4_SDA. |
| 40 | PC8 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f); alternate functions TIM3_CH3, TIM8_CH3, TIM20_CH3, COMP7_OUT and I2C3_SCL. |
| 41 | PC9 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f); alternate functions TIM3_CH4, TIM8_CH4, I2SCKIN, TIM8_BKIN2 and I2C3_SDA. |
| 42 | PA8 | bidirectional | 5 V tolerant I/O with analog switch supplied by VDDA; alternate functions MCO, I2C3_SCL, I2C2_SDA, I2S2_MCK, TIM1_CH1, USART1_CK, COMP7_OUT, TIM4_ETR, FDCAN3_RX, SAI1_CK2 and SAI1_SCK_A; analog inputs ADC5_IN1 and OPAMP5_VOUT. |
| 43 | PA9 | bidirectional | 5 V tolerant Fm+ capable I/O with analog switch supplied by VDDA and USB Type-C dead battery function (FT_fda); alternate functions I2C3_SMBA, I2C2_SCL, I2S3_MCK, TIM1_CH2, USART1_TX, TIM15_BKIN and SAI1_FS_A; analog input ADC5_IN2 and UCPD1_DBCC1. |
| 44 | PA10 | bidirectional | 5 V tolerant Fm+ capable I/O with analog switch supplied by VDDA and USB Type-C dead battery function (FT_fda); alternate functions TIM17_BKIN, USB_CRS_SYNC, I2C2_SMBA, SPI2_MISO, TIM1_CH3, USART1_RX, COMP6_OUT and SAI1_SD_A; also UCPD1_DBCC2. |
| 45 | PA11 | bidirectional | 5 V tolerant I/O with USB function (FT_u); alternate functions SPI2_MOSI/I2S2_SD, TIM1_CH1N, USART1_CTS, COMP1_OUT, FDCAN1_RX and TIM1_BKIN2; also USB_DM. |
| 46 | PA12 | bidirectional | 5 V tolerant I/O with USB function (FT_u); alternate functions TIM16_CH1, I2SCKIN, TIM1_CH2N, USART1_RTS_DE, COMP2_OUT, FDCAN1_TX and TIM1_ETR; also USB_DP. |
| 47 | VSS | power_in | Ground pin that must be connected to the external ground within the permitted range. |
| 48 | VDD | power_in | Standard operating voltage of 1.71 V to 3.6 V; functionality is guaranteed down to VBOR0 min once RESET is released. |
| 49 | PA13 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f); after reset it is configured as the SWDIO-JTMS debug function with its internal pull-up activated. |
| 50 | PA14 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f); after reset it is configured as the SWCLK-JTCK debug function with its internal pull-down activated. |
| 51 | PA15 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f); after reset it is configured as the JTDI debug function with its internal pull-up activated. |
| 52 | PC10 | bidirectional | 5 V tolerant I/O (FT); alternate functions TIM8_CH1N, UART4_TX, SPI3_SCK/I2S3_CK and USART3_TX. |
| 53 | PC11 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f); alternate functions TIM8_CH2N, UART4_RX, SPI3_MISO, USART3_RX and I2C3_SDA. |
| 54 | PC12 | bidirectional | 5 V tolerant I/O (FT); alternate functions TIM5_CH2, TIM8_CH3N, UART5_TX, SPI3_MOSI/I2S3_SD, USART3_CK and UCPD1_FRSTX. |
| 55 | PD2 | bidirectional | 5 V tolerant I/O (FT); alternate functions TIM3_ETR, TIM8_BKIN and UART5_RX. |
| 56 | PB3 | bidirectional | 5 V tolerant I/O (FT); after reset it is configured as the JTDO-TRACESWO debug alternate function, with TIM2_CH2, SPI1_SCK, SPI3_SCK/I2S3_CK and USART2_TX also available. |
| 57 | PB4 | bidirectional | 5 V tolerant USB Type-C PD capable I/O (FT_c); after reset it is configured as the JTRST debug function with its internal pull-up activated; also UCPD1_CC2. |
| 58 | PB5 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f); alternate functions TIM16_BKIN, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI/I2S3_SD, USART2_CK, I2C3_SDA and FDCAN2_RX. |
| 59 | PB6 | bidirectional | 5 V tolerant USB Type-C PD capable I/O (FT_c); alternate functions TIM16_CH1N, TIM4_CH1, I2C4_SCL, I2C1_SCL, TIM8_CH1, USART1_TX, COMP4_OUT and FDCAN2_TX; also UCPD1_CC1. |
| 60 | PB7 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f); alternate functions TIM17_CH1N, TIM4_CH2, I2C4_SDA, I2C1_SDA, USART1_RX, COMP3_OUT, LPTIM1_IN2 and FMC_NL; also PVD_IN. |
| 61 | PB8-BOOT0 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f) that shares the BOOT0 function; datasheet recommends setting it to a mode other than analog after startup to limit consumption if left unconnected. |
| 62 | PB9 | bidirectional | 5 V tolerant Fm+ capable I/O (FT_f); alternate functions TIM17_CH1, TIM4_CH4, SAI1_D2, I2C1_SDA, IR_OUT, USART3_TX, COMP2_OUT, FDCAN1_TX and TIM8_CH3. |
| 63 | VSS | power_in | Ground pin that must be connected to the external ground within the permitted range. |
| 64 | VDD | power_in | Standard operating voltage of 1.71 V to 3.6 V; functionality is guaranteed down to VBOR0 min once RESET is released. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
STM32G473RBT6 - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
stm32g473rbt6-etched.step/stm32g473rbt6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32g473rbt6.step/stm32g473rbt6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (223 pp, sha256
f9c3d763b8bef2b7, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).