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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

STM32G431RBT3

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)

STM32G431RBT3 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VBAT	power_in	Backup supply pin for RTC, LSE 32 kHz oscillator and backup registers; operating voltage range 1.55 V to 3.6 V, powers the backup domain when VDD is absent.
2	PC13	bidirectional	5V-tolerant (FT) I/O with alternate functions TIM1_BKIN/TIM1_CH1N/TIM8_CH4N and additional RTC functions WKUP2, RTC_TAMP1, RTC_TS, RTC_OUT1; supplied through the internal power switch, output speed limited to 2 MHz/30 pF and must not be used as a current source.
3	PC14-OSC32_IN	bidirectional	5V-tolerant (FT) I/O that doubles as the 32.768 kHz LSE crystal input (OSC32_IN); supplied through the power switch, output speed limited to 2 MHz/30 pF.
4	PC15-OSC32_OUT	bidirectional	5V-tolerant (FT) I/O that doubles as the 32.768 kHz LSE crystal output (OSC32_OUT); supplied through the power switch, output speed limited to 2 MHz/30 pF.
5	PF0-OSC_IN	bidirectional	FT_fa (5V-tolerant, Fm+ capable) I/O used as the 4-48 MHz HSE crystal input (OSC_IN); alternate functions I2C2_SDA, SPI2_NSS/I2S2_WS, TIM1_CH3N and additional function ADC1_IN10.
6	PF1-OSC_OUT	bidirectional	FT_a (5V-tolerant, analog-switch) I/O used as the HSE crystal output (OSC_OUT); alternate function SPI2_SCK/I2S2_CK and additional functions ADC2_IN10, COMP3_INM.
7	PG10-NRST	bidirectional	Bidirectional reset pin with embedded weak pull-up resistor; FT-tolerant only when configured as PG10 GPIO by option bytes; alternate function MCO available.
8	PC0	bidirectional	FT_a analog-switch I/O with alternate functions LPTIM1_IN1, TIM1_CH1, LPUART1_RX and additional functions ADC12_IN6, COMP3_INM.
9	PC1	bidirectional	TT_a (3.6V-tolerant, analog-switch) I/O with alternate functions LPTIM1_OUT, TIM1_CH2, LPUART1_TX, SAI1_SD_A and additional functions ADC12_IN7, COMP3_INP.
10	PC2	bidirectional	FT_a I/O with alternate functions LPTIM1_IN2, TIM1_CH3, COMP3_OUT and additional function ADC12_IN8.
11	PC3	bidirectional	FT_a I/O with alternate functions LPTIM1_ETR, TIM1_CH4, SAI1_D1, TIM1_BKIN2, SAI1_SD_A and additional function ADC12_IN9.
12	PA0	bidirectional	TT_a I/O with alternate functions TIM2_CH1, USART2_CTS, COMP1_OUT, TIM8_BKIN, TIM8_ETR, TIM2_ETR and additional functions ADC12_IN1, COMP1_INM, COMP3_INP, RTC_TAMP2, WKUP1.
13	PA1	bidirectional	TT_a I/O with alternate functions RTC_REFIN, TIM2_CH2, USART2_RTS_DE, TIM15_CH1N and additional functions ADC12_IN2, COMP1_INP, OPAMP1_VINP, OPAMP3_VINP.
14	PA2	bidirectional	TT_a I/O with alternate functions TIM2_CH3, USART2_TX, COMP2_OUT, TIM15_CH1, LPUART1_TX, UCPD1_FRSTX and additional functions ADC1_IN3, COMP2_INM, OPAMP1_VOUT, WKUP4/LSCO.
15	VSS	power_in	Digital ground.
16	VDD	power_in	Digital supply voltage, standard operating range 1.71 V to 3.6 V.
17	PA3	bidirectional	TT_a I/O with alternate functions TIM2_CH4, SAI1_CK1, USART2_RX, TIM15_CH2, LPUART1_RX, SAI1_MCLK_A and additional functions ADC1_IN4, COMP2_INP, OPAMP1_VINM/OPAMP1_VINP.
18	PA4	bidirectional	TT_a I/O with alternate functions TIM3_CH2, SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, SAI1_FS_B and additional functions ADC2_IN17, DAC1_OUT1, COMP1_INM.
19	PA5	bidirectional	TT_a I/O with alternate functions TIM2_CH1, TIM2_ETR, SPI1_SCK, UCPD1_FRSTX and additional functions ADC2_IN13, DAC1_OUT2, COMP2_INM, OPAMP2_VINM.
20	PA6	bidirectional	TT_a I/O with alternate functions TIM16_CH1, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM1_BKIN, COMP1_OUT, LPUART1_CTS and additional functions ADC2_IN3, OPAMP2_VOUT.
21	PA7	bidirectional	TT_a I/O with alternate functions TIM17_CH1, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM1_CH1N, COMP2_OUT, UCPD1_FRSTX and additional functions ADC2_IN4, COMP2_INP, OPAMP1_VINP, OPAMP2_VINP.
22	PC4	bidirectional	FT_fa Fm+ capable I/O with alternate functions TIM1_ETR, I2C2_SCL, USART1_TX and additional function ADC2_IN5.
23	PC5	bidirectional	TT_a I/O with alternate functions TIM15_BKIN, SAI1_D3, TIM1_CH4N, USART1_RX and additional functions ADC2_IN11, OPAMP1_VINM, OPAMP2_VINM, WKUP5.
24	PB0	bidirectional	TT_a I/O with alternate functions TIM3_CH3, TIM8_CH2N, TIM1_CH2N, UCPD1_FRSTX and additional functions ADC1_IN15, COMP4_INP, OPAMP2_VINP, OPAMP3_VINP.
25	PB1	bidirectional	TT_a I/O with alternate functions TIM3_CH4, TIM8_CH3N, TIM1_CH3N, COMP4_OUT, LPUART1_RTS_DE and additional functions ADC1_IN12, COMP1_INP, OPAMP3_VOUT.
26	PB2	bidirectional	TT_a I/O with alternate functions RTC_OUT2, LPTIM1_OUT, I2C3_SMBA and additional functions ADC2_IN12, COMP4_INM, OPAMP3_VINM.
27	VSSA	power_in	Analog ground.
28	VREF+	power_in	ADC/DAC positive reference voltage input; can also be sourced internally by VREFBUF_OUT at 2.048 V, 2.5 V or 2.9 V.
29	VDDA	power_in	Analog supply voltage; required range depends on the analog peripheral used, from 1.62 V (ADC/COMP) up to 3.6 V, with 2.4 V minimum when VREFBUF is used.
30	PB10	bidirectional	TT_a I/O with alternate functions TIM2_CH3, USART3_TX, LPUART1_RX, TIM1_BKIN, SAI1_SCK_A and additional function OPAMP3_VINM.
31	VSS	power_in	Digital ground.
32	VDD	power_in	Digital supply voltage, standard operating range 1.71 V to 3.6 V.
33	PB11	bidirectional	FT_a I/O with alternate functions TIM2_CH4, USART3_RX, LPUART1_TX and additional function ADC12_IN14.
34	PB12	bidirectional	FT_a I/O with alternate functions I2C2_SMBA, SPI2_NSS/I2S2_WS, TIM1_BKIN, USART3_CK, LPUART1_RTS_DE and additional function ADC1_IN11.
35	PB13	bidirectional	TT_a I/O with alternate functions SPI2_SCK/I2S2_CK, TIM1_CH1N, USART3_CTS, LPUART1_CTS and additional function OPAMP3_VINP.
36	PB14	bidirectional	TT_a I/O with alternate functions TIM15_CH1, SPI2_MISO, TIM1_CH2N, USART3_RTS_DE, COMP4_OUT and additional functions ADC1_IN5, OPAMP2_VINP.
37	PB15	bidirectional	FT_a I/O with alternate functions RTC_REFIN, TIM15_CH2, TIM15_CH1N, COMP3_OUT, TIM1_CH3N, SPI2_MOSI/I2S2_SD and additional function ADC2_IN15.
38	PC6	bidirectional	FT I/O with alternate functions TIM3_CH1, TIM8_CH1, I2S2_MCK.
39	PC7	bidirectional	FT I/O with alternate functions TIM3_CH2, TIM8_CH2, I2S3_MCK.
40	PC8	bidirectional	FT_f Fm+ capable I/O with alternate functions TIM3_CH3, TIM8_CH3, I2C3_SCL.
41	PC9	bidirectional	FT_f Fm+ capable I/O with alternate functions TIM3_CH4, TIM8_CH4, I2SCKIN, TIM8_BKIN2, I2C3_SDA.
42	PA8	bidirectional	FT_f Fm+ capable I/O with alternate functions MCO, I2C3_SCL, I2C2_SDA, I2S2_MCK, TIM1_CH1, USART1_CK, TIM4_ETR, SAI1_CK2, SAI1_SCK_A.
43	PA9	bidirectional	FT_fd I/O with alternate functions I2C3_SMBA, I2C2_SCL, I2S3_MCK, TIM1_CH2, USART1_TX, TIM15_BKIN, TIM2_CH3, SAI1_FS_A and additional function UCPD1_DBCC1 (USB Type-C dead-battery control for PB6/CC1).
44	PA10	bidirectional	FT_d/FT_a I/O with alternate functions TIM17_BKIN, USB_CRS_SYNC, I2C2_SMBA, SPI2_MISO, TIM1_CH3, USART1_RX, TIM2_CH4, TIM8_BKIN, SAI1_D1, SAI1_SD_A and additional function UCPD1_DBCC2 (USB Type-C dead-battery control for PB4/CC2).
45	PA11	bidirectional	FT_u USB-capable I/O with alternate functions SPI2_MOSI/I2S2_SD, TIM1_CH1N, USART1_CTS, COMP1_OUT, FDCAN1_RX, TIM4_CH1, TIM1_CH4, TIM1_BKIN2 and dedicated USB_DM function.
46	PA12	bidirectional	FT_u USB-capable I/O with alternate functions TIM16_CH1, I2SCKIN, TIM1_CH2N, USART1_RTS_DE, COMP2_OUT, FDCAN1_TX, TIM4_CH2, TIM1_ETR and dedicated USB_DP function.
47	VSS	power_in	Digital ground.
48	VDD	power_in	Digital supply voltage, standard operating range 1.71 V to 3.6 V.
49	PA13	bidirectional	FT_f I/O, default SWDIO-JTMS debug function with internal pull-up activated after reset; alternate functions TIM16_CH1N, I2C1_SCL, IR_OUT, USART3_CTS, TIM4_CH3, SAI1_SD_B.
50	PA14	bidirectional	FT_f I/O, default SWCLK-JTCK debug function with internal pull-down activated after reset; alternate functions LPTIM1_OUT, I2C1_SDA, TIM8_CH2, TIM1_BKIN, USART2_TX, SAI1_FS_B.
51	PA15	bidirectional	FT_f I/O, default JTDI debug function with internal pull-up activated after reset; alternate functions TIM2_CH1, TIM8_CH1, I2C1_SCL, SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_RX, UART4_RTS_DE, TIM1_BKIN, TIM2_ETR.
52	PC10	bidirectional	FT I/O with alternate functions TIM8_CH1N, UART4_TX, SPI3_SCK/I2S3_CK, USART3_TX.
53	PC11	bidirectional	FT_f Fm+ capable I/O with alternate functions TIM8_CH2N, UART4_RX, SPI3_MISO, USART3_RX, I2C3_SDA.
54	PC12	bidirectional	FT I/O with alternate functions TIM8_CH3N, SPI3_MOSI/I2S3_SD, USART3_CK, UCPD1_FRSTX.
55	PD2	bidirectional	FT I/O with alternate functions TIM3_ETR, TIM8_BKIN.
56	PB3	bidirectional	FT I/O, default JTDO-TRACESWO debug function with internal pull-up activated after reset; alternate functions TIM2_CH2, TIM4_ETR, USB_CRS_SYNC, TIM8_CH1N, SPI1_SCK, SPI3_SCK/I2S3_CK, USART2_TX, TIM3_ETR, SAI1_SCK_B.
57	PB4	bidirectional	FT_c USB Type-C PD capable I/O, default JTRST debug function with internal pull-up activated after reset; alternate functions TIM16_CH1, TIM3_CH1, TIM8_CH2N, SPI1_MISO, SPI3_MISO, USART2_RX, TIM17_BKIN, SAI1_MCLK_B; implements UCPD1_CC2 with an internal 5.1 kΩ dead-battery pull-down controlled by PA10.
58	PB5	bidirectional	FT_f Fm+ capable I/O with alternate functions TIM16_BKIN, TIM3_CH2, TIM8_CH3N, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI/I2S3_SD, USART2_CK, I2C3_SDA, TIM17_CH1, LPTIM1_IN1, SAI1_SD_B.
59	PB6	bidirectional	FT_c USB Type-C PD capable I/O with alternate functions TIM16_CH1N, TIM4_CH1, TIM8_CH1, TIM8_ETR, USART1_TX, COMP4_OUT, TIM8_BKIN2, LPTIM1_ETR, SAI1_FS_B; implements UCPD1_CC1 with an internal 5.1 kΩ dead-battery pull-down controlled by PA9.
60	PB7	bidirectional	FT_f Fm+ capable I/O with alternate functions TIM17_CH1N, TIM4_CH2, I2C1_SDA, TIM8_BKIN, USART1_RX, COMP3_OUT, TIM3_CH4, LPTIM1_IN2, UART4_CTS and additional function PVD_IN.
61	PB8-BOOT0	bidirectional	FT_f Fm+ capable I/O that is also the dedicated BOOT0 boot-mode selection pin; recommended to be set to a non-analog mode after startup if left unconnected to limit consumption; alternate functions TIM16_CH1, TIM4_CH3, SAI1_CK1, I2C1_SCL, USART3_RX, COMP1_OUT, FDCAN1_RX, TIM8_CH2, TIM1_BKIN, SAI1_MCLK_A.
62	PB9	bidirectional	FT_f Fm+ capable I/O with alternate functions TIM17_CH1, TIM4_CH4, SAI1_D2, I2C1_SDA, IR_OUT, USART3_TX, COMP2_OUT, FDCAN1_TX, TIM8_CH3, TIM1_CH3N, SAI1_FS_A.
63	VSS	power_in	Digital ground.
64	VDD	power_in	Digital supply voltage, standard operating range 1.71 V to 3.6 V.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	LQFP-64(10x10)
Category	Embedded Processors & Controllers
Pins	64

CAD (KiCad official)

Symbol: STM32G431RBT3
Footprint: Package_QFP:LQFP-64_10x10mm_P0.5mm
3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
3D model files: stm32g431rbt3-etched.step / stm32g431rbt3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32g431rbt3.step / stm32g431rbt3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (198 pp, sha256 c2e903e3de4b05c0, retrieved 2026-09-24, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF