component
STM32G071K8T3
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+68@@ -0,0 +1,68 @@+# STM32G071K8T3++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)++STM32G071K8T3 from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | PB9 | bidirectional | 5 V-tolerant FT_f I/O that is Fm+ capable, with alternate functions IR_OUT, UCPD2_FRSTX, TIM17_CH1, USART3_RX, SPI2_NSS, I2C1_SDA and EVENTOUT. |+| 2 | PC14-OSC32_IN | bidirectional | 5 V-tolerant FT I/O supplied through the RTC power switch, which sinks only 3 mA, so output speed must not exceed 2 MHz at 30 pF and it must not source current; it is also the OSC32_IN low-speed oscillator input. |+| 3 | PC15-OSC32_OUT | bidirectional | 5 V-tolerant FT I/O supplied through the RTC power switch, which sinks only 3 mA, so output speed must not exceed 2 MHz at 30 pF and it must not source current; it is also the OSC32_OUT low-speed oscillator output. |+| 4 | VDD/VDDA | power_in | Main supply pin: VDD is 1.7 V to 3.6 V for the regulator, I/Os and system analog, while VDDA is 1.62 V (ADC and COMP), 1.8 V (DAC) or 2.4 V (VREFBUF) up to 3.6 V. |+| 5 | VSS/VSSA | power_in | Ground pin for digital and analog circuitry; all voltages on the device are referenced to VSS. |+| 6 | PF2-NRST | bidirectional | Bidirectional reset pin with an embedded weak pull-up resistor (NRST), which also provides the MCO alternate function. |+| 7 | PA0 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN0, COMP1_INM, TAMP_IN2 and WKUP1 as additional functions and alternate functions including USART2_CTS, TIM2_CH1_ETR and COMP1_OUT. |+| 8 | PA1 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN1 and COMP1_INP, with alternate functions including SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, TIM2_CH2 and I2C1_SMBA. |+| 9 | PA2 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN2, COMP2_INM, WKUP4 and LSCO, with alternate functions including SPI1_MOSI/I2S1_SD, USART2_TX, TIM15_CH1 and LPUART1_TX. |+| 10 | PA3 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN3 and COMP2_INP, with alternate functions including SPI2_MISO, USART2_RX, TIM2_CH4 and LPUART1_RX. |+| 11 | PA4 | bidirectional | 3.6 V-tolerant TT_a I/O with analog switch function, providing ADC_IN4, DAC_OUT1 and RTC_OUT2, with alternate functions including SPI1_NSS/I2S1_WS, SPI2_MOSI, TIM14_CH1 and LPTIM2_OUT. |+| 12 | PA5 | bidirectional | 3.6 V-tolerant TT_a I/O with analog switch function, providing ADC_IN5 and DAC_OUT2, with alternate functions including SPI1_SCK/I2S1_CK, CEC, TIM2_CH1_ETR, USART3_TX and LPTIM2_ETR. |+| 13 | PA6 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN6, with alternate functions including SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, USART3_CTS, TIM16_CH1, LPUART1_CTS and COMP1_OUT. |+| 14 | PA7 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN7, with alternate functions including SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1, UCPD1_FRSTX and COMP2_OUT. |+| 15 | PB0 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN8, with alternate functions including SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N, USART3_RX, LPTIM1_OUT, UCPD1_FRSTX and COMP1_OUT. |+| 16 | PB1 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN9 and COMP1_INM, with alternate functions including TIM14_CH1, TIM3_CH4, TIM1_CH3N, USART3_RTS_DE_CK, LPTIM2_IN1 and LPUART1_RTS_DE. |+| 17 | PB2 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN10 and COMP1_INP, with alternate functions including SPI2_MISO, USART3_TX, LPTIM1_OUT and EVENTOUT. |+| 18 | PA8 | bidirectional | 5 V-tolerant FT_c I/O that is USB Type-C PD capable (UCPD1_CC1), with alternate functions including MCO, SPI2_NSS, TIM1_CH1, LPTIM2_OUT and EVENTOUT; a reset-time pull-down may be present depending on the levels on PB0, PA9, PC6, PA10, PD1 and PD3 and can be disabled by strobing UCPDx_STROBE in SYSCFG_CFGR1 during start-up. |+| 19 | PA9 | bidirectional | 5 V-tolerant FT_fd I/O that is Fm+ capable and USB Type-C PD dead-battery capable (UCPD1_DBCC1), with alternate functions including MCO, USART1_TX, TIM1_CH2, SPI2_MISO, TIM15_BKIN and I2C1_SCL; it can be remapped in place of PA11 via SYSCFG_CFGR1. |+| 20 | PC6 | bidirectional | 5 V-tolerant FT I/O with alternate functions UCPD1_FRSTX, TIM3_CH1 and TIM2_CH3. |+| 21 | PA10 | bidirectional | 5 V-tolerant FT_fd I/O that is Fm+ capable and USB Type-C PD dead-battery capable (UCPD1_DBCC2), with alternate functions including SPI2_MOSI, USART1_RX, TIM1_CH3, TIM17_BKIN and I2C1_SDA; it can be remapped in place of PA12 via SYSCFG_CFGR1. |+| 22 | PA11 [PA9] | bidirectional | 5 V-tolerant FT_f I/O that is Fm+ capable, with alternate functions including SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BKIN2, I2C2_SCL and COMP1_OUT; it is the default function of PA11, with PA9 remap available via SYSCFG_CFGR1. |+| 23 | PA12 [PA10] | bidirectional | 5 V-tolerant FT_f I/O that is Fm+ capable, with alternate functions including SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN, I2C2_SDA and COMP2_OUT; it is the default function of PA12, with PA10 remap available via SYSCFG_CFGR1. |+| 24 | PA13 | bidirectional | 5 V-tolerant FT I/O that resets to the SWDIO debug function with the internal pull-up activated, with IR_OUT and EVENTOUT as alternate functions. |+| 25 | PA14-BOOT0 | bidirectional | 5 V-tolerant FT I/O that resets to the SWCLK debug function with the internal pull-down activated, and doubles as the BOOT0 boot-selection pin when enabled by the boot selector option bit. |+| 26 | PA15 | bidirectional | 5 V-tolerant FT I/O with alternate functions including SPI1_NSS/I2S1_WS, USART2_RX, TIM2_CH1_ETR, USART4_RTS_DE_CK, USART3_RTS_DE_CK and EVENTOUT. |+| 27 | PB3 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function, providing COMP2_INM, with alternate functions including SPI1_SCK/I2S1_CK, TIM1_CH2, TIM2_CH2, USART1_RTS_DE_CK and EVENTOUT. |+| 28 | PB4 | bidirectional | 5 V-tolerant FT_a I/O with analog switch function, providing COMP2_INP, with alternate functions including SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BKIN and EVENTOUT. |+| 29 | PB5 | bidirectional | 5 V-tolerant FT I/O providing WKUP6, with alternate functions including SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, LPTIM1_IN1, I2C1_SMBA and COMP2_OUT. |+| 30 | PB6 | bidirectional | 5 V-tolerant FT_fa I/O that is Fm+ capable with analog switch function, providing COMP2_INP, with alternate functions including USART1_TX, TIM1_CH3, TIM16_CH1N, SPI2_MISO, LPTIM1_ETR, I2C1_SCL and EVENTOUT. |+| 31 | PB7 | bidirectional | 5 V-tolerant FT_fa I/O that is Fm+ capable with analog switch function, providing COMP2_INM and PVD_IN, with alternate functions including USART1_RX, SPI2_MOSI, TIM17_CH1N, USART4_CTS, LPTIM1_IN2, I2C1_SDA and EVENTOUT. |+| 32 | PB8 | bidirectional | 5 V-tolerant FT_f I/O that is Fm+ capable, with alternate functions including CEC, SPI2_SCK, TIM16_CH1, USART3_TX, TIM15_BKIN, I2C1_SCL and EVENTOUT. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-32(7x7) |+| Category | Embedded Processors & Controllers |+| Pins | 32 |++## CAD (KiCad official)++- Symbol: `STM32G071K8T3`+- Footprint: `Package_QFP:LQFP-32_7x7mm_P0.8mm`+- 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)+- 3D model files: `stm32g071k8t3-etched.step` / `stm32g071k8t3-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32g071k8t3.step` / `stm32g071k8t3.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588907820510666752) (133 pp, sha256 `96d7e9ca1500e794`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/stm32g071k8t3-datasheet.pdf)
page.jsonadded+343@@ -0,0 +1,343 @@+{+ "slug": "stm32g071k8t3",+ "version": "0.1.0",+ "type": "component",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "embedded processors & controllers",+ "stm32g071k8t3",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "stm32g071k8t3.kicad_sym",+ "stm32g071k8t3.kicad_mod",+ "stm32g071k8t3.glb",+ "stm32g071k8t3.step",+ "stm32g071k8t3.lbr",+ "docs/hero.png",+ "docs/stm32g071k8t3-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "stm32g071k8t3-hero.glb",+ "stm32g071k8t3-hero.overlay.json"+ ],+ "component": {+ "mpn": "STM32G071K8T3",+ "manufacturer": "STMicroelectronics",+ "package": "LQFP-32(7x7)",+ "pin_count": 32,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588907820510666752",+ "parts": {+ "symbol": "stm32g071k8t3.kicad_sym",+ "footprint": "stm32g071k8t3.kicad_mod",+ "model_3d": "stm32g071k8t3-hero.glb",+ "model_3d_plain": "stm32g071k8t3.glb",+ "model_3d_step": "stm32g071k8t3-etched.step",+ "model_3d_step_plain": "stm32g071k8t3.step",+ "lbr": "stm32g071k8t3.lbr"+ },+ "distributor_links": {+ "lcsc": "C724236",+ "digikey": "497-STM32G071K8T3-ND",+ "mouser": "511-STM32G071K8T3"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T04:19:15Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "497-STM32G071K8T3-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "511-STM32G071K8T3",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "PB9",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_f I/O that is Fm+ capable, with alternate functions IR_OUT, UCPD2_FRSTX, TIM17_CH1, USART3_RX, SPI2_NSS, I2C1_SDA and EVENTOUT."+ },+ {+ "number": "2",+ "name": "PC14-OSC32_IN",+ "type": "bidirectional",+ "description": "5 V-tolerant FT I/O supplied through the RTC power switch, which sinks only 3 mA, so output speed must not exceed 2 MHz at 30 pF and it must not source current; it is also the OSC32_IN low-speed oscillator input."+ },+ {+ "number": "3",+ "name": "PC15-OSC32_OUT",+ "type": "bidirectional",+ "description": "5 V-tolerant FT I/O supplied through the RTC power switch, which sinks only 3 mA, so output speed must not exceed 2 MHz at 30 pF and it must not source current; it is also the OSC32_OUT low-speed oscillator output."+ },+ {+ "number": "4",+ "name": "VDD/VDDA",+ "type": "power_in",+ "description": "Main supply pin: VDD is 1.7 V to 3.6 V for the regulator, I/Os and system analog, while VDDA is 1.62 V (ADC and COMP), 1.8 V (DAC) or 2.4 V (VREFBUF) up to 3.6 V."+ },+ {+ "number": "5",+ "name": "VSS/VSSA",+ "type": "power_in",+ "description": "Ground pin for digital and analog circuitry; all voltages on the device are referenced to VSS."+ },+ {+ "number": "6",+ "name": "PF2-NRST",+ "type": "bidirectional",+ "description": "Bidirectional reset pin with an embedded weak pull-up resistor (NRST), which also provides the MCO alternate function."+ },+ {+ "number": "7",+ "name": "PA0",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN0, COMP1_INM, TAMP_IN2 and WKUP1 as additional functions and alternate functions including USART2_CTS, TIM2_CH1_ETR and COMP1_OUT."+ },+ {+ "number": "8",+ "name": "PA1",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN1 and COMP1_INP, with alternate functions including SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, TIM2_CH2 and I2C1_SMBA."+ },+ {+ "number": "9",+ "name": "PA2",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN2, COMP2_INM, WKUP4 and LSCO, with alternate functions including SPI1_MOSI/I2S1_SD, USART2_TX, TIM15_CH1 and LPUART1_TX."+ },+ {+ "number": "10",+ "name": "PA3",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN3 and COMP2_INP, with alternate functions including SPI2_MISO, USART2_RX, TIM2_CH4 and LPUART1_RX."+ },+ {+ "number": "11",+ "name": "PA4",+ "type": "bidirectional",+ "description": "3.6 V-tolerant TT_a I/O with analog switch function, providing ADC_IN4, DAC_OUT1 and RTC_OUT2, with alternate functions including SPI1_NSS/I2S1_WS, SPI2_MOSI, TIM14_CH1 and LPTIM2_OUT."+ },+ {+ "number": "12",+ "name": "PA5",+ "type": "bidirectional",+ "description": "3.6 V-tolerant TT_a I/O with analog switch function, providing ADC_IN5 and DAC_OUT2, with alternate functions including SPI1_SCK/I2S1_CK, CEC, TIM2_CH1_ETR, USART3_TX and LPTIM2_ETR."+ },+ {+ "number": "13",+ "name": "PA6",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN6, with alternate functions including SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, USART3_CTS, TIM16_CH1, LPUART1_CTS and COMP1_OUT."+ },+ {+ "number": "14",+ "name": "PA7",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN7, with alternate functions including SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1, UCPD1_FRSTX and COMP2_OUT."+ },+ {+ "number": "15",+ "name": "PB0",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN8, with alternate functions including SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N, USART3_RX, LPTIM1_OUT, UCPD1_FRSTX and COMP1_OUT."+ },+ {+ "number": "16",+ "name": "PB1",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN9 and COMP1_INM, with alternate functions including TIM14_CH1, TIM3_CH4, TIM1_CH3N, USART3_RTS_DE_CK, LPTIM2_IN1 and LPUART1_RTS_DE."+ },+ {+ "number": "17",+ "name": "PB2",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN10 and COMP1_INP, with alternate functions including SPI2_MISO, USART3_TX, LPTIM1_OUT and EVENTOUT."+ },+ {+ "number": "18",+ "name": "PA8",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_c I/O that is USB Type-C PD capable (UCPD1_CC1), with alternate functions including MCO, SPI2_NSS, TIM1_CH1, LPTIM2_OUT and EVENTOUT; a reset-time pull-down may be present depending on the levels on PB0, PA9, PC6, PA10, PD1 and PD3 and can be disabled by strobing UCPDx_STROBE in SYSCFG_CFGR1 during start-up."+ },+ {+ "number": "19",+ "name": "PA9",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_fd I/O that is Fm+ capable and USB Type-C PD dead-battery capable (UCPD1_DBCC1), with alternate functions including MCO, USART1_TX, TIM1_CH2, SPI2_MISO, TIM15_BKIN and I2C1_SCL; it can be remapped in place of PA11 via SYSCFG_CFGR1."+ },+ {+ "number": "20",+ "name": "PC6",+ "type": "bidirectional",+ "description": "5 V-tolerant FT I/O with alternate functions UCPD1_FRSTX, TIM3_CH1 and TIM2_CH3."+ },+ {+ "number": "21",+ "name": "PA10",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_fd I/O that is Fm+ capable and USB Type-C PD dead-battery capable (UCPD1_DBCC2), with alternate functions including SPI2_MOSI, USART1_RX, TIM1_CH3, TIM17_BKIN and I2C1_SDA; it can be remapped in place of PA12 via SYSCFG_CFGR1."+ },+ {+ "number": "22",+ "name": "PA11 [PA9]",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_f I/O that is Fm+ capable, with alternate functions including SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BKIN2, I2C2_SCL and COMP1_OUT; it is the default function of PA11, with PA9 remap available via SYSCFG_CFGR1."+ },+ {+ "number": "23",+ "name": "PA12 [PA10]",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_f I/O that is Fm+ capable, with alternate functions including SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN, I2C2_SDA and COMP2_OUT; it is the default function of PA12, with PA10 remap available via SYSCFG_CFGR1."+ },+ {+ "number": "24",+ "name": "PA13",+ "type": "bidirectional",+ "description": "5 V-tolerant FT I/O that resets to the SWDIO debug function with the internal pull-up activated, with IR_OUT and EVENTOUT as alternate functions."+ },+ {+ "number": "25",+ "name": "PA14-BOOT0",+ "type": "bidirectional",+ "description": "5 V-tolerant FT I/O that resets to the SWCLK debug function with the internal pull-down activated, and doubles as the BOOT0 boot-selection pin when enabled by the boot selector option bit."+ },+ {+ "number": "26",+ "name": "PA15",+ "type": "bidirectional",+ "description": "5 V-tolerant FT I/O with alternate functions including SPI1_NSS/I2S1_WS, USART2_RX, TIM2_CH1_ETR, USART4_RTS_DE_CK, USART3_RTS_DE_CK and EVENTOUT."+ },+ {+ "number": "27",+ "name": "PB3",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_a I/O with analog switch function, providing COMP2_INM, with alternate functions including SPI1_SCK/I2S1_CK, TIM1_CH2, TIM2_CH2, USART1_RTS_DE_CK and EVENTOUT."+ },+ {+ "number": "28",+ "name": "PB4",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_a I/O with analog switch function, providing COMP2_INP, with alternate functions including SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BKIN and EVENTOUT."+ },+ {+ "number": "29",+ "name": "PB5",+ "type": "bidirectional",+ "description": "5 V-tolerant FT I/O providing WKUP6, with alternate functions including SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, LPTIM1_IN1, I2C1_SMBA and COMP2_OUT."+ },+ {+ "number": "30",+ "name": "PB6",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_fa I/O that is Fm+ capable with analog switch function, providing COMP2_INP, with alternate functions including USART1_TX, TIM1_CH3, TIM16_CH1N, SPI2_MISO, LPTIM1_ETR, I2C1_SCL and EVENTOUT."+ },+ {+ "number": "31",+ "name": "PB7",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_fa I/O that is Fm+ capable with analog switch function, providing COMP2_INM and PVD_IN, with alternate functions including USART1_RX, SPI2_MOSI, TIM17_CH1N, USART4_CTS, LPTIM1_IN2, I2C1_SDA and EVENTOUT."+ },+ {+ "number": "32",+ "name": "PB8",+ "type": "bidirectional",+ "description": "5 V-tolerant FT_f I/O that is Fm+ capable, with alternate functions including CEC, SPI2_SCK, TIM16_CH1, USART3_TX, TIM15_BKIN, I2C1_SCL and EVENTOUT."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: MPN STM32G071K8T3 has no 'N' suffix, so the GP (single-port USB-C PD) LQFP32 column of Table 12 was ; Pin assignments were taken from the Table 12 cell layout of the text extraction, which is column-shu"+ ],+ "pages_sent": 64,+ "cost_usd": 0.2984,+ "at": "2026-10-08T04:18:56"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588907820510666752",+ "pages": 133,+ "sha256": "96d7e9ca1500e794",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 32,+ "described": 32,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "stm32g071k8t3.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "be0e412f1c66fee70039b0e109e0cc7c823161dda97593718afa97569bc61ce3",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "stm32g071k8t3-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "18f1c34addfbf5c4e1e20787a60be5e51b3708d2c7079940a5db420879a1de9f",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}