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Contents

README

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STM32G071K8T3

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)

STM32G071K8T3 from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PB9 bidirectional 5 V-tolerant FT_f I/O that is Fm+ capable, with alternate functions IR_OUT, UCPD2_FRSTX, TIM17_CH1, USART3_RX, SPI2_NSS, I2C1_SDA and EVENTOUT.
2 PC14-OSC32_IN bidirectional 5 V-tolerant FT I/O supplied through the RTC power switch, which sinks only 3 mA, so output speed must not exceed 2 MHz at 30 pF and it must not source current; it is also the OSC32_IN low-speed oscillator input.
3 PC15-OSC32_OUT bidirectional 5 V-tolerant FT I/O supplied through the RTC power switch, which sinks only 3 mA, so output speed must not exceed 2 MHz at 30 pF and it must not source current; it is also the OSC32_OUT low-speed oscillator output.
4 VDD/VDDA power_in Main supply pin: VDD is 1.7 V to 3.6 V for the regulator, I/Os and system analog, while VDDA is 1.62 V (ADC and COMP), 1.8 V (DAC) or 2.4 V (VREFBUF) up to 3.6 V.
5 VSS/VSSA power_in Ground pin for digital and analog circuitry; all voltages on the device are referenced to VSS.
6 PF2-NRST bidirectional Bidirectional reset pin with an embedded weak pull-up resistor (NRST), which also provides the MCO alternate function.
7 PA0 bidirectional 5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN0, COMP1_INM, TAMP_IN2 and WKUP1 as additional functions and alternate functions including USART2_CTS, TIM2_CH1_ETR and COMP1_OUT.
8 PA1 bidirectional 5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN1 and COMP1_INP, with alternate functions including SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, TIM2_CH2 and I2C1_SMBA.
9 PA2 bidirectional 5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN2, COMP2_INM, WKUP4 and LSCO, with alternate functions including SPI1_MOSI/I2S1_SD, USART2_TX, TIM15_CH1 and LPUART1_TX.
10 PA3 bidirectional 5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN3 and COMP2_INP, with alternate functions including SPI2_MISO, USART2_RX, TIM2_CH4 and LPUART1_RX.
11 PA4 bidirectional 3.6 V-tolerant TT_a I/O with analog switch function, providing ADC_IN4, DAC_OUT1 and RTC_OUT2, with alternate functions including SPI1_NSS/I2S1_WS, SPI2_MOSI, TIM14_CH1 and LPTIM2_OUT.
12 PA5 bidirectional 3.6 V-tolerant TT_a I/O with analog switch function, providing ADC_IN5 and DAC_OUT2, with alternate functions including SPI1_SCK/I2S1_CK, CEC, TIM2_CH1_ETR, USART3_TX and LPTIM2_ETR.
13 PA6 bidirectional 5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN6, with alternate functions including SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, USART3_CTS, TIM16_CH1, LPUART1_CTS and COMP1_OUT.
14 PA7 bidirectional 5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN7, with alternate functions including SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1, UCPD1_FRSTX and COMP2_OUT.
15 PB0 bidirectional 5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN8, with alternate functions including SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N, USART3_RX, LPTIM1_OUT, UCPD1_FRSTX and COMP1_OUT.
16 PB1 bidirectional 5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN9 and COMP1_INM, with alternate functions including TIM14_CH1, TIM3_CH4, TIM1_CH3N, USART3_RTS_DE_CK, LPTIM2_IN1 and LPUART1_RTS_DE.
17 PB2 bidirectional 5 V-tolerant FT_a I/O with analog switch function, providing ADC_IN10 and COMP1_INP, with alternate functions including SPI2_MISO, USART3_TX, LPTIM1_OUT and EVENTOUT.
18 PA8 bidirectional 5 V-tolerant FT_c I/O that is USB Type-C PD capable (UCPD1_CC1), with alternate functions including MCO, SPI2_NSS, TIM1_CH1, LPTIM2_OUT and EVENTOUT; a reset-time pull-down may be present depending on the levels on PB0, PA9, PC6, PA10, PD1 and PD3 and can be disabled by strobing UCPDx_STROBE in SYSCFG_CFGR1 during start-up.
19 PA9 bidirectional 5 V-tolerant FT_fd I/O that is Fm+ capable and USB Type-C PD dead-battery capable (UCPD1_DBCC1), with alternate functions including MCO, USART1_TX, TIM1_CH2, SPI2_MISO, TIM15_BKIN and I2C1_SCL; it can be remapped in place of PA11 via SYSCFG_CFGR1.
20 PC6 bidirectional 5 V-tolerant FT I/O with alternate functions UCPD1_FRSTX, TIM3_CH1 and TIM2_CH3.
21 PA10 bidirectional 5 V-tolerant FT_fd I/O that is Fm+ capable and USB Type-C PD dead-battery capable (UCPD1_DBCC2), with alternate functions including SPI2_MOSI, USART1_RX, TIM1_CH3, TIM17_BKIN and I2C1_SDA; it can be remapped in place of PA12 via SYSCFG_CFGR1.
22 PA11 [PA9] bidirectional 5 V-tolerant FT_f I/O that is Fm+ capable, with alternate functions including SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BKIN2, I2C2_SCL and COMP1_OUT; it is the default function of PA11, with PA9 remap available via SYSCFG_CFGR1.
23 PA12 [PA10] bidirectional 5 V-tolerant FT_f I/O that is Fm+ capable, with alternate functions including SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN, I2C2_SDA and COMP2_OUT; it is the default function of PA12, with PA10 remap available via SYSCFG_CFGR1.
24 PA13 bidirectional 5 V-tolerant FT I/O that resets to the SWDIO debug function with the internal pull-up activated, with IR_OUT and EVENTOUT as alternate functions.
25 PA14-BOOT0 bidirectional 5 V-tolerant FT I/O that resets to the SWCLK debug function with the internal pull-down activated, and doubles as the BOOT0 boot-selection pin when enabled by the boot selector option bit.
26 PA15 bidirectional 5 V-tolerant FT I/O with alternate functions including SPI1_NSS/I2S1_WS, USART2_RX, TIM2_CH1_ETR, USART4_RTS_DE_CK, USART3_RTS_DE_CK and EVENTOUT.
27 PB3 bidirectional 5 V-tolerant FT_a I/O with analog switch function, providing COMP2_INM, with alternate functions including SPI1_SCK/I2S1_CK, TIM1_CH2, TIM2_CH2, USART1_RTS_DE_CK and EVENTOUT.
28 PB4 bidirectional 5 V-tolerant FT_a I/O with analog switch function, providing COMP2_INP, with alternate functions including SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BKIN and EVENTOUT.
29 PB5 bidirectional 5 V-tolerant FT I/O providing WKUP6, with alternate functions including SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, LPTIM1_IN1, I2C1_SMBA and COMP2_OUT.
30 PB6 bidirectional 5 V-tolerant FT_fa I/O that is Fm+ capable with analog switch function, providing COMP2_INP, with alternate functions including USART1_TX, TIM1_CH3, TIM16_CH1N, SPI2_MISO, LPTIM1_ETR, I2C1_SCL and EVENTOUT.
31 PB7 bidirectional 5 V-tolerant FT_fa I/O that is Fm+ capable with analog switch function, providing COMP2_INM and PVD_IN, with alternate functions including USART1_RX, SPI2_MOSI, TIM17_CH1N, USART4_CTS, LPTIM1_IN2, I2C1_SDA and EVENTOUT.
32 PB8 bidirectional 5 V-tolerant FT_f I/O that is Fm+ capable, with alternate functions including CEC, SPI2_SCK, TIM16_CH1, USART3_TX, TIM15_BKIN, I2C1_SCL and EVENTOUT.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-32(7x7)
Category Embedded Processors & Controllers
Pins 32

CAD (KiCad official)

  • Symbol: STM32G071K8T3
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32g071k8t3-etched.step / stm32g071k8t3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32g071k8t3.step / stm32g071k8t3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (133 pp, sha256 96d7e9ca1500e794, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF