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STM32G070KBT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32G070KBT6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)
STM32G070KBT6 from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB9 | bidirectional | 5 V-tolerant GPIO with Fm+ output drive capability; alternate functions: IR_OUT, TIM17_CH1, USART3_RX, SPI2_NSS, I2C1_SDA, EVENTOUT. |
| 2 | PC14-OSC32_IN | bidirectional | 5 V-tolerant GPIO supplied through RTC-domain power switch (max 2 MHz / 30 pF in output mode, not to be used as current source); alternate functions: TIM1_BKIN2; additional: OSC32_IN, OSC_IN. |
| 3 | PC15-OSC32_OUT | bidirectional | 5 V-tolerant GPIO supplied through RTC-domain power switch (max 2 MHz / 30 pF in output mode); alternate functions: OSC32_EN, OSC_EN, TIM15_BKIN; additional: OSC32_OUT. |
| 4 | VDD/VDDA | power_in | Main digital and analog power supply, 2.0 V to 3.6 V; also serves as VDDA for the ADC and VDDIO1 for the I/O ring; must be decoupled with 100 nF + 4.7 µF ceramic capacitors. |
| 5 | VSS/VSSA | power_in | Ground reference for digital core and analog (VSSA) circuits; all voltages are referenced to this pin. |
| 6 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor (RPU = 25-55 kΩ typ 40 kΩ); pulses shorter than 70 ns are filtered; minimum effective reset pulse is 350 ns at 2.0 V ≤ VDD ≤ 3.6 V. |
| 7 | PA0 | bidirectional | 5 V-tolerant GPIO with analog switch (FT_a); alternate functions: SPI2_SCK, USART2_CTS, USART4_TX; additional: ADC_IN0 (0 V to VREF+), TAMP_IN2, WKUP1. |
| 8 | PA1 | bidirectional | 5 V-tolerant GPIO with analog switch (FT_a); alternate functions: SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, USART4_RX, TIM15_CH1N, I2C1_SMBA, EVENTOUT; additional: ADC_IN1. |
| 9 | PA2 | bidirectional | 5 V-tolerant GPIO with analog switch (FT_a); alternate functions: SPI1_MOSI/I2S1_SD, USART2_TX, TIM15_CH1; additional: ADC_IN2, WKUP4, LSCO. |
| 10 | PA3 | bidirectional | 5 V-tolerant GPIO with analog switch (FT_a); alternate functions: SPI2_MISO, USART2_RX, TIM15_CH2, EVENTOUT; additional: ADC_IN3. |
| 11 | PA4 | bidirectional | 3.6 V-tolerant GPIO with analog switch (TT_a); alternate functions: SPI1_NSS/I2S1_WS, SPI2_MOSI, TIM14_CH1, EVENTOUT; additional: ADC_IN4, TAMP_IN1, RTC_TS, RTC_OUT1, WKUP2. |
| 12 | PA5 | bidirectional | 3.6 V-tolerant GPIO with analog switch (TT_a); alternate functions: SPI1_SCK/I2S1_CK, USART3_TX, EVENTOUT; additional: ADC_IN5. |
| 13 | PA6 | bidirectional | 5 V-tolerant GPIO with analog switch (FT_a); alternate functions: SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, USART3_CTS, TIM16_CH1; additional: ADC_IN6. |
| 14 | PA7 | bidirectional | 5 V-tolerant GPIO with analog switch (FT_a); alternate functions: SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1; additional: ADC_IN7. |
| 15 | PB0 | bidirectional | 5 V-tolerant GPIO with analog switch (FT_a); a pull-down may be present at reset until SYSCFG_CFGR1 UCPD_STROBE is set; alternate functions: SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N, USART3_RX; additional: ADC_IN8. |
| 16 | PB1 | bidirectional | 5 V-tolerant GPIO with analog switch (FT_a); alternate functions: TIM14_CH1, TIM3_CH4, TIM1_CH3N, USART3_RTS_DE_CK, EVENTOUT; additional: ADC_IN9. |
| 17 | PB2 | bidirectional | 5 V-tolerant GPIO with analog switch (FT_a); alternate functions: SPI2_MISO, USART3_TX, EVENTOUT; additional: ADC_IN10. |
| 18 | PA8 | bidirectional | 5 V-tolerant GPIO with specific electrical characteristics (FT_c); pull-down may be present at reset; alternate functions: MCO, SPI2_NSS, TIM1_CH1, EVENTOUT. |
| 19 | PA9 | bidirectional | 5 V-tolerant GPIO with Fm+ output drive and specific characteristics (FT_fd); pull-down may be present at reset; alternate functions: MCO, USART1_TX, TIM1_CH2, SPI2_MISO, TIM15_BKIN, I2C1_SCL, EVENTOUT. |
| 20 | PC6 | bidirectional | 5 V-tolerant GPIO (FT); pull-down may be present at reset depending on PA9 voltage level until SYSCFG_CFGR1 UCPD_STROBE is set; alternate functions: TIM3_CH1. |
| 21 | PA10 | bidirectional | 5 V-tolerant GPIO with Fm+ output drive and specific characteristics (FT_fd); pull-down may be present at reset; alternate functions: SPI2_MOSI, USART1_RX, TIM1_CH3, TIM17_BKIN, I2C1_SDA, EVENTOUT. |
| 22 | PA11 | bidirectional | 5 V-tolerant GPIO with Fm+ output drive (FT_f); default mapping PA11, remappable to PA9 via SYSCFG_CFGR1; alternate functions: SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BKIN2, I2C2_SCL. |
| 23 | PA12 | bidirectional | 5 V-tolerant GPIO with Fm+ output drive (FT_f); default mapping PA12, remappable to PA10 via SYSCFG_CFGR1; alternate functions: SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN, I2C2_SDA. |
| 24 | PA13 | bidirectional | 5 V-tolerant GPIO (FT); reset default is SWDIO with internal pull-up activated; alternate functions: SWDIO, IR_OUT, EVENTOUT. |
| 25 | PA14-BOOT0 | bidirectional | 5 V-tolerant GPIO (FT); reset default is SWCLK with internal pull-down activated; doubles as BOOT0 boot-mode selector when enabled by option byte; alternate functions: SWCLK, USART2_TX, EVENTOUT. |
| 26 | PA15 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions: SPI1_NSS/I2S1_WS, USART2_RX, USART4_RTS_DE_CK, USART3_RTS_DE_CK, EVENTOUT. |
| 27 | PB3 | bidirectional | 5 V-tolerant GPIO with analog switch (FT_a); alternate functions: SPI1_SCK/I2S1_CK, TIM1_CH2, USART1_RTS_DE_CK, EVENTOUT. |
| 28 | PB4 | bidirectional | 5 V-tolerant GPIO with analog switch (FT_a); alternate functions: SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BKIN, EVENTOUT. |
| 29 | PB5 | bidirectional | 5 V-tolerant GPIO (FT); alternate functions: SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, I2C1_SMBA; additional: WKUP6. |
| 30 | PB6 | bidirectional | 5 V-tolerant GPIO with Fm+ output drive (FT_fa); alternate functions: USART1_TX, TIM1_CH3, TIM16_CH1N, SPI2_MISO, I2C1_SCL, EVENTOUT. |
| 31 | PB7 | bidirectional | 5 V-tolerant GPIO with Fm+ output drive (FT_fa); alternate functions: USART1_RX, SPI2_MOSI, TIM17_CH1N, USART4_CTS, I2C1_SDA, EVENTOUT. |
| 32 | PB8 | bidirectional | 5 V-tolerant GPIO with Fm+ output drive (FT_f); alternate functions: SPI2_SCK, TIM16_CH1, USART3_TX, TIM15_BKIN, I2C1_SCL, EVENTOUT. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
CAD (KiCad official)
- Symbol:
STM32G070KBT6 - Footprint:
Package_QFP:LQFP-32_7x7mm_P0.8mm - 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32g070kbt6-etched.step/stm32g070kbt6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32g070kbt6.step/stm32g070kbt6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (93 pp, sha256
29c4b367c493f973, retrieved 2026-09-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).