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STM32G051K8T6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32G051K8T6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)
STM32G051K8T6 from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB9 | bidirectional | 5 V-tolerant Fm+-capable I/O (FT_f) with alternate functions IR_OUT, TIM17_CH1, SPI2_NSS, I2C1_SDA and EVENTOUT. |
| 2 | PC14-OSC32_IN | bidirectional | 5 V-tolerant I/O (FT) supplied through the power switch, so it sinks only 3 mA and must not exceed 2 MHz at 30 pF or be used as a current source; it also serves as the OSC32_IN low-speed oscillator input. |
| 3 | PC15-OSC32_OUT | bidirectional | 5 V-tolerant I/O (FT) supplied through the power switch, so it sinks only 3 mA and must not exceed 2 MHz at 30 pF or be used as a current source; it also serves as the OSC32_OUT low-speed oscillator output, with OSC32_EN, OSC_EN and TIM15_BKIN alternate functions. |
| 4 | VDD/VDDA | power_in | Power supply pin: VDD is 1.7 V to 3.6 V for the internal regulator and system analog, and VDDA is 1.62 V (ADC and COMP), 1.8 V (DAC) or 2.4 V (VREFBUF) to 3.6 V for the analog peripherals. |
| 5 | VSS/VSSA | power_in | Ground pin for the digital and analog supplies; all voltages are referenced to VSS. |
| 6 | PF2-NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up whose default function is NRST, with MCO as alternate function, and other I/Os connected to this pin need particular configuration care if it is used as a GPIO. |
| 7 | PA0 | bidirectional | 5 V-tolerant I/O (FT_a) with alternate functions SPI2_SCK, USART2_CTS, TIM2_CH1_ETR, LPTIM1_OUT and COMP1_OUT, and additional functions COMP1_INM8, ADC_IN0, TAMP_IN2 and WKUP1. |
| 8 | PA1 | bidirectional | 5 V-tolerant I/O (FT_ea) with alternate functions SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, TIM2_CH2, TIM15_CH1N, I2C1_SMBA and EVENTOUT, and additional functions COMP1_INP2 and ADC_IN1. |
| 9 | PA2 | bidirectional | 5 V-tolerant I/O (FT_a) with alternate functions SPI1_MOSI/I2S1_SD, USART2_TX, TIM2_CH3, TIM15_CH1, LPUART1_TX and COMP2_OUT, and additional functions COMP2_INM8, ADC_IN2, WKUP4 and LSCO. |
| 10 | PA3 | bidirectional | 5 V-tolerant I/O (FT_ea) with alternate functions SPI2_MISO, USART2_RX, TIM2_CH4, TIM15_CH2, LPUART1_RX and EVENTOUT, and additional functions COMP2_INP2 and ADC_IN3. |
| 11 | PA4 | bidirectional | 5 V-tolerant I/O (FT_a) with alternate functions SPI1_NSS/I2S1_WS, SPI2_MOSI, TIM14_CH1, LPTIM2_OUT and EVENTOUT, and additional functions ADC_IN4, DAC1_OUT1, TAMP_IN1, RTC_TS, RTC_OUT1 and WKUP2. |
| 12 | PA5 | bidirectional | 5 V-tolerant I/O (FT_ea) with alternate functions SPI1_SCK/I2S1_CK, TIM2_CH1_ETR, LPTIM2_ETR and EVENTOUT, and additional functions ADC_IN5 and DAC1_OUT2. |
| 13 | PA6 | bidirectional | 5 V-tolerant I/O (FT_ea) with alternate functions SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1, LPUART1_CTS and COMP1_OUT, and additional function ADC_IN6. |
| 14 | PA7 | bidirectional | 5 V-tolerant I/O (FT_a) with alternate functions SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1 and COMP2_OUT, and additional function ADC_IN7. |
| 15 | PB0 | bidirectional | 5 V-tolerant I/O (FT_ea) with alternate functions SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N, LPTIM1_OUT and COMP1_OUT, and additional function ADC_IN8. |
| 16 | PB1 | bidirectional | 5 V-tolerant I/O (FT_ea) with alternate functions TIM14_CH1, TIM3_CH4, TIM1_CH3N, LPTIM2_IN1, LPUART1_RTS_DE and EVENTOUT, and additional functions COMP1_INM6 and ADC_IN9. |
| 17 | PB2 | bidirectional | 5 V-tolerant I/O (FT_ea) with alternate functions SPI2_MISO, LPTIM1_OUT and EVENTOUT, and additional functions COMP1_INP1 and ADC_IN10. |
| 18 | PA8 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions MCO, SPI2_NSS, TIM1_CH1, LPTIM2_OUT and EVENTOUT. |
| 19 | PA9 | bidirectional | 5 V-tolerant Fm+-capable I/O (FT_f) with alternate functions MCO, USART1_TX, TIM1_CH2, SPI2_MISO, TIM15_BKIN, I2C1_SCL and EVENTOUT, and it can be remapped in place of PA11 through SYSCFG_CFGR1. |
| 20 | PC6 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM3_CH1 and TIM2_CH3. |
| 21 | PA10 | bidirectional | 5 V-tolerant Fm+-capable I/O (FT_f) with alternate functions SPI2_MOSI, USART1_RX, TIM1_CH3, TIM17_BKIN, I2C1_SDA and EVENTOUT, and it can be remapped in place of PA12 through SYSCFG_CFGR1. |
| 22 | PA11 [PA9] | bidirectional | 5 V-tolerant Fm+-capable analog-switch I/O (FT_fa) with alternate functions SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BKIN2, I2C2_SCL and COMP1_OUT, and additional function ADC_IN15. |
| 23 | PA12 [PA10] | bidirectional | 5 V-tolerant Fm+-capable analog-switch I/O (FT_fa) with alternate functions SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN, I2C2_SDA and COMP2_OUT, and additional function ADC_IN16. |
| 24 | PA13 | bidirectional | 5 V-tolerant I/O (FT_ea) that defaults to the SWDIO function at reset with an internal pull-up enabled, with alternate functions IR_OUT and EVENTOUT, and additional function ADC_IN17. |
| 25 | PA14-BOOT0 | bidirectional | 5 V-tolerant I/O (FT_a) that defaults to the SWCLK function at reset with an internal pull-down enabled, with alternate functions USART2_TX and EVENTOUT, and additional functions ADC_IN18 and BOOT0 (boot-mode selection pin). |
| 26 | PA15 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI1_NSS/I2S1_WS, USART2_RX, TIM2_CH1_ETR and EVENTOUT. |
| 27 | PB3 | bidirectional | 5 V-tolerant I/O (FT_a) with alternate functions SPI1_SCK/I2S1_CK, TIM1_CH2, TIM2_CH2, USART1_RTS_DE_CK and EVENTOUT, and additional function COMP2_INM6. |
| 28 | PB4 | bidirectional | 5 V-tolerant I/O (FT_a) with alternate functions SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BKIN and EVENTOUT, and additional function COMP2_INP0. |
| 29 | PB5 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, LPTIM1_IN1, I2C1_SMBA and COMP2_OUT, and additional function WKUP6. |
| 30 | PB6 | bidirectional | 5 V-tolerant Fm+-capable analog-switch I/O (FT_fa) with alternate functions USART1_TX, TIM1_CH3, TIM16_CH1N, SPI2_MISO, LPTIM1_ETR, I2C1_SCL and EVENTOUT, and additional function COMP2_INP1. |
| 31 | PB7 | bidirectional | 5 V-tolerant Fm+-capable analog-switch I/O (FT_fa) with alternate functions USART1_RX, SPI2_MOSI, TIM17_CH1N, LPTIM1_IN2, I2C1_SDA and EVENTOUT, and additional functions COMP2_INM7, ADC_IN11 and PVD_IN. |
| 32 | PB8 | bidirectional | 5 V-tolerant Fm+-capable I/O (FT_f) with alternate functions SPI2_SCK, TIM16_CH1, TIM15_BKIN, I2C1_SCL and EVENTOUT. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
CAD (KiCad official)
- Symbol:
STM32G051K8T6 - Footprint:
Package_QFP:LQFP-32_7x7mm_P0.8mm - 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32g051k8t6-etched.step/stm32g051k8t6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32g051k8t6.step/stm32g051k8t6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (126 pp, sha256
773ba84c25c7d2f3, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).