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STM32G031K8T6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
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STM32G031K8T6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)
STM32G031K8T6 from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB9 | bidirectional | FT_f 5 V-tolerant I/O with AF IR_OUT, TIM17_CH1, SPI2_NSS, I2C1_SDA, EVENTOUT. |
| 2 | PC14-OSC32_IN | bidirectional | FT I/O (PC14 at reset) with alternate TIM1_BK2 and additional functions OSC32_IN, OSC_IN. |
| 3 | PC15-OSC32_OUT | bidirectional | FT I/O (PC15 at reset) with alternate OSC32_EN, OSC_EN and additional function OSC32_OUT. |
| 4 | VDD/VDDA | power_in | Supply pin for the regulator, analog, I/Os and ADC; 1.7 V to 3.6 V operating range, VBAT and VREF+ are internally connected to it on this package. |
| 5 | VSS/VSSA | power_in | Ground pin for digital and analog supplies, to be decoupled together with VDD/VDDA. |
| 6 | PF2-NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up; also PF2 with MCO alternate function. |
| 7 | PA0 | bidirectional | FT_a I/O with SPI2_SCK, USART2_CTS, TIM2_CH1_ETR, LPTIM1_OUT and additional ADC_IN0, TAMP_IN2, WKUP1. |
| 8 | PA1 | bidirectional | FT_ea I/O with SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, TIM2_CH2, I2C1_SMBA, EVENTOUT and additional ADC_IN1. |
| 9 | PA2 | bidirectional | FT_a I/O with SPI1_MOSI/I2S1_SD, USART2_TX, TIM2_CH3, LPUART1_TX and additional ADC_IN2, WKUP4, LSCO. |
| 10 | PA3 | bidirectional | FT_ea I/O with SPI2_MISO, USART2_RX, TIM2_CH4, LPUART1_RX, EVENTOUT and additional ADC_IN3. |
| 11 | PA4 | bidirectional | FT_a I/O with SPI1_NSS/I2S1_WS, SPI2_MOSI, TIM14_CH1, LPTIM2_OUT, EVENTOUT and additional ADC_IN4, TAMP_IN1, RTC_TS, RTC_OUT1, WKUP2. |
| 12 | PA5 | bidirectional | FT_ea I/O with SPI1_SCK/I2S1_CK, TIM2_CH1_ETR, LPTIM2_ETR, EVENTOUT and additional ADC_IN5. |
| 13 | PA6 | bidirectional | FT_ea I/O with SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BK, TIM16_CH1, LPUART1_CTS and additional ADC_IN6. |
| 14 | PA7 | bidirectional | FT_a I/O with SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1 and additional ADC_IN7. |
| 15 | PB0 | bidirectional | FT_ea I/O with SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N, LPTIM1_OUT and additional ADC_IN8. |
| 16 | PB1 | bidirectional | FT_ea I/O with TIM14_CH1, TIM3_CH4, TIM1_CH3N, LPTIM2_IN1, LPUART1_RTS_DE, EVENTOUT and additional ADC_IN9. |
| 17 | PB2 | bidirectional | FT_ea I/O with SPI2_MISO, LPTIM1_OUT, EVENTOUT and additional ADC_IN10. |
| 18 | PA8 | bidirectional | FT I/O with MCO, SPI2_NSS, TIM1_CH1, LPTIM2_OUT, EVENTOUT. |
| 19 | PA9 | bidirectional | FT_f (Fm+ capable) I/O with MCO, USART1_TX, TIM1_CH2, SPI2_MISO, I2C1_SCL, EVENTOUT. |
| 20 | PC6 | bidirectional | FT I/O with TIM3_CH1, TIM2_CH3. |
| 21 | PA10 | bidirectional | FT_f (Fm+ capable) I/O with SPI2_MOSI, USART1_RX, TIM1_CH3, TIM17_BK, I2C1_SDA, EVENTOUT. |
| 22 | PA11 [PA9] | bidirectional | FT_fa I/O (remappable as PA9) with SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BK2, I2C2_SCL and additional ADC_IN15. |
| 23 | PA12 [PA10] | bidirectional | FT_fa I/O (remappable as PA10) with SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN, I2C2_SDA and additional ADC_IN16. |
| 24 | PA13 | bidirectional | FT_ea I/O with SWDIO, IR_OUT, EVENTOUT and additional ADC_IN17. |
| 25 | PA14-BOOT0 | bidirectional | FT_a I/O with SWCLK, USART2_TX, EVENTOUT and additional ADC_IN18, BOOT0. |
| 26 | PA15 | bidirectional | FT I/O with SPI1_NSS/I2S1_WS, USART2_RX, TIM2_CH1_ETR, EVENTOUT. |
| 27 | PB3 | bidirectional | FT I/O with SPI1_SCK/I2S1_CK, TIM1_CH2, TIM2_CH2, USART1_RTS_DE_CK, EVENTOUT. |
| 28 | PB4 | bidirectional | FT I/O with SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BK, EVENTOUT. |
| 29 | PB5 | bidirectional | FT I/O with SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BK, LPTIM1_IN1, I2C1_SMBA and additional WKUP6. |
| 30 | PB6 | bidirectional | FT_f (Fm+ capable) I/O with USART1_TX, TIM1_CH3, TIM16_CH1N, SPI2_MISO, LPTIM1_ETR, I2C1_SCL, EVENTOUT. |
| 31 | PB7 | bidirectional | FT_fa I/O with USART1_RX, SPI2_MOSI, TIM17_CH1N, LPTIM1_IN2, I2C1_SDA, EVENTOUT and additional ADC_IN11, PVD_IN. |
| 32 | PB8 | bidirectional | FT_f (Fm+ capable) I/O with SPI2_SCK, TIM16_CH1, I2C1_SCL, EVENTOUT. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
CAD (KiCad official)
- Symbol:
STM32G031K8T6 - Footprint:
Package_QFP:LQFP-32_7x7mm_P0.8mm - 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files:
stm32g031k8t6-etched.step/stm32g031k8t6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32g031k8t6.step/stm32g031k8t6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (117 pp, sha256
95ae804dbf135590, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# STM32G031K8T6
**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)
STM32G031K8T6 from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB9 | bidirectional | FT_f 5 V-tolerant I/O with AF IR_OUT, TIM17_CH1, SPI2_NSS, I2C1_SDA, EVENTOUT. |
| 2 | PC14-OSC32_IN | bidirectional | FT I/O (PC14 at reset) with alternate TIM1_BK2 and additional functions OSC32_IN, OSC_IN. |
| 3 | PC15-OSC32_OUT | bidirectional | FT I/O (PC15 at reset) with alternate OSC32_EN, OSC_EN and additional function OSC32_OUT. |
| 4 | VDD/VDDA | power_in | Supply pin for the regulator, analog, I/Os and ADC; 1.7 V to 3.6 V operating range, VBAT and VREF+ are internally connected to it on this package. |
| 5 | VSS/VSSA | power_in | Ground pin for digital and analog supplies, to be decoupled together with VDD/VDDA. |
| 6 | PF2-NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up; also PF2 with MCO alternate function. |
| 7 | PA0 | bidirectional | FT_a I/O with SPI2_SCK, USART2_CTS, TIM2_CH1_ETR, LPTIM1_OUT and additional ADC_IN0, TAMP_IN2, WKUP1. |
| 8 | PA1 | bidirectional | FT_ea I/O with SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, TIM2_CH2, I2C1_SMBA, EVENTOUT and additional ADC_IN1. |
| 9 | PA2 | bidirectional | FT_a I/O with SPI1_MOSI/I2S1_SD, USART2_TX, TIM2_CH3, LPUART1_TX and additional ADC_IN2, WKUP4, LSCO. |
| 10 | PA3 | bidirectional | FT_ea I/O with SPI2_MISO, USART2_RX, TIM2_CH4, LPUART1_RX, EVENTOUT and additional ADC_IN3. |
| 11 | PA4 | bidirectional | FT_a I/O with SPI1_NSS/I2S1_WS, SPI2_MOSI, TIM14_CH1, LPTIM2_OUT, EVENTOUT and additional ADC_IN4, TAMP_IN1, RTC_TS, RTC_OUT1, WKUP2. |
| 12 | PA5 | bidirectional | FT_ea I/O with SPI1_SCK/I2S1_CK, TIM2_CH1_ETR, LPTIM2_ETR, EVENTOUT and additional ADC_IN5. |
| 13 | PA6 | bidirectional | FT_ea I/O with SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BK, TIM16_CH1, LPUART1_CTS and additional ADC_IN6. |
| 14 | PA7 | bidirectional | FT_a I/O with SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1 and additional ADC_IN7. |
| 15 | PB0 | bidirectional | FT_ea I/O with SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N, LPTIM1_OUT and additional ADC_IN8. |
| 16 | PB1 | bidirectional | FT_ea I/O with TIM14_CH1, TIM3_CH4, TIM1_CH3N, LPTIM2_IN1, LPUART1_RTS_DE, EVENTOUT and additional ADC_IN9. |
| 17 | PB2 | bidirectional | FT_ea I/O with SPI2_MISO, LPTIM1_OUT, EVENTOUT and additional ADC_IN10. |
| 18 | PA8 | bidirectional | FT I/O with MCO, SPI2_NSS, TIM1_CH1, LPTIM2_OUT, EVENTOUT. |
| 19 | PA9 | bidirectional | FT_f (Fm+ capable) I/O with MCO, USART1_TX, TIM1_CH2, SPI2_MISO, I2C1_SCL, EVENTOUT. |
| 20 | PC6 | bidirectional | FT I/O with TIM3_CH1, TIM2_CH3. |
| 21 | PA10 | bidirectional | FT_f (Fm+ capable) I/O with SPI2_MOSI, USART1_RX, TIM1_CH3, TIM17_BK, I2C1_SDA, EVENTOUT. |
| 22 | PA11 [PA9] | bidirectional | FT_fa I/O (remappable as PA9) with SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BK2, I2C2_SCL and additional ADC_IN15. |
| 23 | PA12 [PA10] | bidirectional | FT_fa I/O (remappable as PA10) with SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN, I2C2_SDA and additional ADC_IN16. |
| 24 | PA13 | bidirectional | FT_ea I/O with SWDIO, IR_OUT, EVENTOUT and additional ADC_IN17. |
| 25 | PA14-BOOT0 | bidirectional | FT_a I/O with SWCLK, USART2_TX, EVENTOUT and additional ADC_IN18, BOOT0. |
| 26 | PA15 | bidirectional | FT I/O with SPI1_NSS/I2S1_WS, USART2_RX, TIM2_CH1_ETR, EVENTOUT. |
| 27 | PB3 | bidirectional | FT I/O with SPI1_SCK/I2S1_CK, TIM1_CH2, TIM2_CH2, USART1_RTS_DE_CK, EVENTOUT. |
| 28 | PB4 | bidirectional | FT I/O with SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BK, EVENTOUT. |
| 29 | PB5 | bidirectional | FT I/O with SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BK, LPTIM1_IN1, I2C1_SMBA and additional WKUP6. |
| 30 | PB6 | bidirectional | FT_f (Fm+ capable) I/O with USART1_TX, TIM1_CH3, TIM16_CH1N, SPI2_MISO, LPTIM1_ETR, I2C1_SCL, EVENTOUT. |
| 31 | PB7 | bidirectional | FT_fa I/O with USART1_RX, SPI2_MOSI, TIM17_CH1N, LPTIM1_IN2, I2C1_SDA, EVENTOUT and additional ADC_IN11, PVD_IN. |
| 32 | PB8 | bidirectional | FT_f (Fm+ capable) I/O with SPI2_SCK, TIM16_CH1, I2C1_SCL, EVENTOUT. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
## CAD (KiCad official)
- Symbol: `STM32G031K8T6`
- Footprint: `Package_QFP:LQFP-32_7x7mm_P0.8mm`
- 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files: `stm32g031k8t6-etched.step` / `stm32g031k8t6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32g031k8t6.step` / `stm32g031k8t6.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884713612726272) (117 pp, sha256 `95ae804dbf135590`, retrieved 2026-10-07, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/stm32g031k8t6-datasheet.pdf)