# STM32G031F6P6TR

**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · TSSOP-20

STM32G031F6P6TR from STMicroelectronics, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB7/PB8 | bidirectional | Shared package pad: PB7 is a 5 V-tolerant Fm+-capable I/O (FT_fa) with analog switch, ADC_IN11 and PVD_IN, and PB8 is a 5 V-tolerant Fm+-capable I/O (FT_f) with TIM16_CH1 and I2C1_SCL; the datasheet does not state which of the two is bonded to this package. |
| 2 | PB9/PC14-OSC32_IN | bidirectional | Shared package pad: PB9 is a 5 V-tolerant Fm+-capable I/O (FT_f) with I2C1_SDA, IR_OUT and TIM17_CH1, and PC14 is a 5 V-tolerant I/O (FT) supplied through the power switch that carries OSC32_IN; the datasheet does not state which of the two is bonded to this package. |
| 3 | PC15-OSC32_OUT | bidirectional | 5 V-tolerant I/O (FT) supplied through the power switch, which sinks only 3 mA, so in output mode it must not exceed 2 MHz with a 30 pF load and must not be used as a current source; it carries OSC32_OUT. |
| 4 | VDD/VDDA | power_in | Power supply: VDD is 1.7 V to 3.6 V for the core and I/Os, and VDDA is 1.62 V (ADC) or 2.4 V (VREFBUF) to 3.6 V for the analog circuits. |
| 5 | VSS/VSSA | power_in | Ground reference for the digital and analog supplies; all voltages in the datasheet are referenced to VSS. |
| 6 | PF2-NRST | bidirectional | Active-low reset pin with embedded weak pull-up resistor, which also serves as the PF2 I/O with MCO alternate function. |
| 7 | PA0 | bidirectional | 5 V-tolerant I/O (FT_a) with analog switch function, also providing ADC_IN0, TAMP_IN2 and WKUP1. |
| 8 | PA1 | bidirectional | 5 V-tolerant I/O (FT_ea) with switchable diode to VDD and analog switch function, also providing ADC_IN1. |
| 9 | PA2 | bidirectional | 5 V-tolerant I/O (FT_a) with analog switch function, also providing ADC_IN2, WKUP4 and LSCO. |
| 10 | PA3 | bidirectional | 5 V-tolerant I/O (FT_ea) with switchable diode to VDD and analog switch function, also providing ADC_IN3. |
| 11 | PA4 | bidirectional | 5 V-tolerant I/O (FT_a) with analog switch function, also providing ADC_IN4, TAMP_IN1, RTC_TS, RTC_OUT1 and WKUP2. |
| 12 | PA5 | bidirectional | 5 V-tolerant I/O (FT_ea) with switchable diode to VDD and analog switch function, also providing ADC_IN5. |
| 13 | PA6 | bidirectional | 5 V-tolerant I/O (FT_ea) with switchable diode to VDD and analog switch function, also providing ADC_IN6. |
| 14 | PA7 | bidirectional | 5 V-tolerant I/O (FT_a) with analog switch function, also providing ADC_IN7. |
| 15 | PB0/PB1/PB2/PA8 | bidirectional | Shared package pad: PB0 (FT_ea, ADC_IN8), PB1 (FT_ea, ADC_IN9), PB2 (FT_ea, ADC_IN10) and PA8 (FT) are all listed against this pin; the datasheet does not state which of them is bonded to this package. |
| 16 | PA11[PA9] | bidirectional | 5 V-tolerant Fm+-capable I/O (FT_fa) with analog switch function and ADC_IN15; its default function is PA11, and PA9 can be remapped onto this pin through the SYSCFG_CFGR1 register. |
| 17 | PA12[PA10] | bidirectional | 5 V-tolerant Fm+-capable I/O (FT_fa) with analog switch function and ADC_IN16; its default function is PA12, and PA10 can be remapped onto this pin through the SYSCFG_CFGR1 register. |
| 18 | PA13 | bidirectional | 5 V-tolerant I/O (FT_ea) with switchable diode to VDD; upon reset it is configured as SWDIO with an internal pull-up activated, and it also provides IR_OUT, EVENTOUT and ADC_IN17. |
| 19 | PA15/PA14-BOOT0 | bidirectional | Shared package pad: PA15 is a 5 V-tolerant I/O (FT) and PA14-BOOT0 is a 5 V-tolerant I/O (FT_a) that is configured as SWCLK with an internal pull-down activated upon reset and also provides BOOT0 and ADC_IN18; the datasheet does not state which of the two is bonded to this package. |
| 20 | PB3/PB4/PB5/PB6 | bidirectional | Shared package pad: PB3 (FT), PB4 (FT), PB5 (FT, WKUP6) and PB6 (FT_f, Fm+-capable, with I2C1_SCL and USART1_TX) are all listed against this pin; the datasheet does not state which of them is bonded to this package. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TSSOP-20 |
| Category | Embedded Processors & Controllers |
| Pins | 20 |

## CAD (KiCad official)

- Symbol: `STM32G031F6P6TR`
- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`
- 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files: `stm32g031f6p6tr-etched.step` / `stm32g031f6p6tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32g031f6p6tr.step` / `stm32g031f6p6tr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588908513066160128) (117 pp, sha256 `0fc5e46abdba3d02`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stm32g031f6p6tr-datasheet.pdf)