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STM32G031F6P6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), TSSOP-20. Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32G031F6P6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · TSSOP-20
STM32G031F6P6 from STMicroelectronics, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB7/PB8 | bidirectional | 5V-tolerant FT_fa GPIO package pin bonding die pads PB7 (AF: USART1_RX, SPI2_MOSI, TIM17_CH1N, LPTIM1_IN2, I2C1_SDA, EVENTOUT; additional ADC_IN11, PVD_IN) and PB8 (AF: SPI2_SCK, TIM16_CH1, I2C1_SCL, EVENTOUT) onto the same TSSOP20 pin. |
| 2 | PC14-OSC32_IN/PB9 | bidirectional | 5V-tolerant FT GPIO package pin bonding die pads PC14 (LSE 32.768 kHz oscillator input OSC32_IN, also usable as OSC_IN, AF TIM1_BK2) and PB9 (AF: IR_OUT, TIM17_CH1, SPI2_NSS, I2C1_SDA, EVENTOUT) onto the same TSSOP20 pin. |
| 3 | PC15-OSC32_OUT | bidirectional | 5V-tolerant FT GPIO pin PC15 that provides the LSE 32.768 kHz oscillator output (OSC32_OUT) with OSC32_EN/OSC_EN alternate function. |
| 4 | VDD/VDDA | power_in | Combined external digital and analog power supply input, 1.7 V (1.6 V min power-on release) to 3.6 V, also supplying the VDDIO1 I/O domain and VDDA analog domain (ADC, voltage reference buffer). |
| 5 | VSS/VSSA | power_in | Combined digital and analog ground reference pin for the device. |
| 6 | PF2-NRST | bidirectional | Bidirectional GPIO PF2 pin with embedded weak pull-up (typ. 40 kΩ) that also functions as the NRST reset input (device reset when held low; filtered pulses under 70 ns are ignored, pulses over 350 ns guarantee reset) and MCO alternate output. |
| 7 | PA0 | bidirectional | 5V-tolerant FT_a GPIO pin with alternate functions SPI2_SCK, USART2_CTS, TIM2_CH1_ETR, LPTIM1_OUT and additional functions ADC_IN0, TAMP_IN2, WKUP1. |
| 8 | PA1 | bidirectional | 5V-tolerant FT_ea (Fm+/analog-switch capable) GPIO pin with alternate functions SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, TIM2_CH2, I2C1_SMBA, EVENTOUT and additional function ADC_IN1. |
| 9 | PA2 | bidirectional | 5V-tolerant FT_a GPIO pin with alternate functions SPI1_MOSI/I2S1_SD, USART2_TX, TIM2_CH3, LPUART1_TX and additional functions ADC_IN2, WKUP4, LSCO. |
| 10 | PA3 | bidirectional | 5V-tolerant FT_ea GPIO pin with alternate functions SPI2_MISO, USART2_RX, TIM2_CH4, LPUART1_RX, EVENTOUT and additional function ADC_IN3. |
| 11 | PA4 | bidirectional | 5V-tolerant FT_a GPIO pin with alternate functions SPI1_NSS/I2S1_WS, SPI2_MOSI, TIM14_CH1, LPTIM2_OUT, EVENTOUT and additional functions ADC_IN4, TAMP_IN1, RTC_TS, RTC_OUT1, WKUP2. |
| 12 | PA5 | bidirectional | 5V-tolerant FT_ea GPIO pin with alternate functions SPI1_SCK/I2S1_CK, TIM2_CH1_ETR, LPTIM2_ETR, EVENTOUT and additional function ADC_IN5. |
| 13 | PA6 | bidirectional | 5V-tolerant FT_ea GPIO pin with alternate functions SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BK, TIM16_CH1, LPUART1_CTS and additional function ADC_IN6. |
| 14 | PA7 | bidirectional | 5V-tolerant FT_a GPIO pin with alternate functions SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1 and additional function ADC_IN7. |
| 15 | PB0/PB1/PB2/PA8 | bidirectional | 5V-tolerant GPIO package pin bonding die pads PB0 (FT_ea; SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N, LPTIM1_OUT; ADC_IN8), PB1 (FT_ea; TIM14_CH1, TIM3_CH4, TIM1_CH3N, LPTIM2_IN1, LPUART1_RTS_DE, EVENTOUT; ADC_IN9), PB2 (FT_ea; SPI2_MISO, LPTIM1_OUT, EVENTOUT; ADC_IN10) and PA8 (FT; MCO, SPI2_NSS, TIM1_CH1, LPTIM2_OUT, EVENTOUT) onto the same TSSOP20 pin. |
| 16 | PA11[PA9] | bidirectional | 5V-tolerant FT_fa (Fm+ capable) GPIO pin, default PA11 remappable to the PA9 function via SYSCFG_CFGR1, with alternate functions SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BK2, I2C2_SCL and additional function ADC_IN15. |
| 17 | PA12[PA10] | bidirectional | 5V-tolerant FT_fa (Fm+ capable) GPIO pin, default PA12 remappable to the PA10 function via SYSCFG_CFGR1, with alternate functions SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN, I2C2_SDA and additional function ADC_IN16. |
| 18 | PA13 | bidirectional | 5V-tolerant FT_ea GPIO pin configured by default at reset as the SWDIO debug data pin (internal pull-up active), with alternate functions IR_OUT, EVENTOUT and additional function ADC_IN17. |
| 19 | PA15/PA14-BOOT0 | bidirectional | 5V-tolerant GPIO package pin bonding die pads PA14-BOOT0 (FT_a, default SWCLK debug clock at reset with internal pull-down active; AF USART2_TX, EVENTOUT; additional ADC_IN18 and BOOT0 boot-mode selection) and PA15 (FT; AF SPI1_NSS/I2S1_WS, USART2_RX, TIM2_CH1_ETR, EVENTOUT) onto the same TSSOP20 pin. |
| 20 | PB3/PB4/PB5/PB6 | bidirectional | 5V-tolerant GPIO package pin bonding die pads PB3 (FT; SPI1_SCK/I2S1_CK, TIM1_CH2, TIM2_CH2, USART1_RTS_DE_CK, EVENTOUT), PB4 (FT; SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BK, EVENTOUT), PB5 (FT; SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BK, LPTIM1_IN1, I2C1_SMBA; WKUP6) and PB6 (FT_f, Fm+ capable; USART1_TX, TIM1_CH3, TIM16_CH1N, SPI2_MISO, LPTIM1_ETR, I2C1_SCL, EVENTOUT) onto the same TSSOP20 pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | TSSOP-20 |
| Category | Embedded Processors & Controllers |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
STM32G031F6P6 - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
stm32g031f6p6-etched.step/stm32g031f6p6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32g031f6p6.step/stm32g031f6p6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (117 pp, sha256
0fc5e46abdba3d02, retrieved 2026-09-24, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).