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Contents

README

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STM32G031C8T6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)

STM32G031C8T6 from STMicroelectronics, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PC13 bidirectional 5V-tolerant general-purpose I/O also usable as TIM1_BK break input, TAMP_IN1 tamper input, RTC_TS timestamp input, RTC_OUT1 calendar output, or WKUP2 wakeup source.
2 PC14-OSC32_IN bidirectional 5V-tolerant I/O that defaults to PC14 and can be configured as TIM1_BK2 break input or as OSC32_IN input for the 32.768 kHz LSE crystal oscillator.
3 PC15-OSC32_OUT bidirectional 5V-tolerant I/O that can be configured as OSC32_EN/OSC_EN oscillator enable or as OSC32_OUT output for the 32.768 kHz LSE crystal oscillator.
4 VBAT power_in Backup battery supply input for the RTC, LSE oscillator and backup registers, accepting 1.55 V to 3.6 V when VDD is not present.
5 VREF+ power_in Positive reference voltage pin for the ADC, or output of the internal VREFBUF reference buffer (2.048 V or 2.5 V); must equal VDDA when VDDA < 2 V or be between 2 V and VDDA when VDDA ≥ 2 V.
6 VDD/VDDA power_in Main digital and analog supply input, requiring 1.7 V (1.6 V minimum) to 3.6 V for VDD and 1.62 V to 3.6 V for VDDA ADC operation.
7 VSS/VSSA power_in Common digital and analog ground reference pin.
8 PF0-OSC_IN bidirectional 5V-tolerant I/O that defaults to PF0 and can be configured as TIM14_CH1 or as OSC_IN input for the 4-48 MHz HSE crystal oscillator.
9 PF1-OSC_OUT bidirectional 5V-tolerant I/O that can be configured as OSC_EN oscillator enable or as OSC_OUT output for the 4-48 MHz HSE crystal oscillator.
10 PF2-NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor, also usable as MCO clock output, driven low (VIL(NRST) ≤0.3×VDDIO1) to reset the device.
11 PA0 bidirectional 5V-tolerant fast I/O (FT_a) usable as SPI2_SCK, USART2_CTS, TIM2_CH1_ETR, LPTIM1_OUT, ADC_IN0 analog input, TAMP_IN2 tamper input, or WKUP1 wakeup source.
12 PA1 bidirectional 5V-tolerant I/O (FT_ea, Fm+/analog-switch capable) usable as SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, TIM2_CH2, I2C1_SMBA, EVENTOUT, or ADC_IN1 analog input.
13 PA2 bidirectional 5V-tolerant fast I/O (FT_a) usable as SPI1_MOSI/I2S1_SD, USART2_TX, TIM2_CH3, LPUART1_TX, ADC_IN2 analog input, WKUP4 wakeup source, or LSCO low-speed clock output.
14 PA3 bidirectional 5V-tolerant I/O (FT_ea) usable as SPI2_MISO, USART2_RX, TIM2_CH4, LPUART1_RX, EVENTOUT, or ADC_IN3 analog input.
15 PA4 bidirectional 5V-tolerant fast I/O (FT_a) usable as SPI1_NSS/I2S1_WS, SPI2_MOSI, TIM14_CH1, LPTIM2_OUT, EVENTOUT, ADC_IN4 analog input, or RTC_OUT2 calendar output.
16 PA5 bidirectional 5V-tolerant I/O (FT_ea) usable as SPI1_SCK/I2S1_CK, TIM2_CH1_ETR, LPTIM2_ETR, EVENTOUT, or ADC_IN5 analog input.
17 PA6 bidirectional 5V-tolerant I/O (FT_ea) usable as SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BK, TIM16_CH1, LPUART1_CTS, or ADC_IN6 analog input.
18 PA7 bidirectional 5V-tolerant fast I/O (FT_a) usable as SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1, or ADC_IN7 analog input.
19 PB0 bidirectional 5V-tolerant I/O (FT_ea) usable as SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N, LPTIM1_OUT, or ADC_IN8 analog input.
20 PB1 bidirectional 5V-tolerant I/O (FT_ea) usable as TIM14_CH1, TIM3_CH4, TIM1_CH3N, LPTIM2_IN1, LPUART1_RTS_DE, EVENTOUT, or ADC_IN9 analog input.
21 PB2 bidirectional 5V-tolerant I/O (FT_ea) usable as SPI2_MISO, LPTIM1_OUT, EVENTOUT, or ADC_IN10 analog input.
22 PB10 bidirectional 5V-tolerant Fm+ I/O (FT_fa) usable as LPUART1_RX, TIM2_CH3, SPI2_SCK, I2C2_SCL, or ADC_IN11 analog input.
23 PB11 bidirectional 5V-tolerant Fm+ I/O (FT_fa) usable as SPI2_MOSI, LPUART1_TX, TIM2_CH4, I2C2_SDA, or ADC_IN15 analog input.
24 PB12 bidirectional 5V-tolerant fast I/O (FT_a) usable as SPI2_NSS, LPUART1_RTS_DE, TIM1_BK, EVENTOUT, or ADC_IN16 analog input.
25 PB13 bidirectional 5V-tolerant Fm+ I/O (FT_f) usable as SPI2_SCK, LPUART1_CTS, TIM1_CH1N, I2C2_SCL, or EVENTOUT.
26 PB14 bidirectional 5V-tolerant Fm+ I/O (FT_f) usable as SPI2_MISO, TIM1_CH2N, I2C2_SDA, or EVENTOUT.
27 PB15 bidirectional 5V-tolerant I/O usable as SPI2_MOSI, TIM1_CH3N, EVENTOUT, or RTC_REFIN reference clock input for calendar calibration.
28 PA8 bidirectional 5V-tolerant I/O usable as MCO clock output, SPI2_NSS, TIM1_CH1, LPTIM2_OUT, or EVENTOUT.
29 PA9 bidirectional 5V-tolerant Fm+ I/O (FT_f) usable as MCO clock output, USART1_TX, TIM1_CH2, SPI2_MISO, I2C1_SCL, or EVENTOUT.
30 PC6 bidirectional 5V-tolerant I/O usable as TIM3_CH1 or TIM2_CH3 timer input capture/output compare.
31 PC7 bidirectional 5V-tolerant I/O usable as TIM3_CH2 or TIM2_CH4 timer input capture/output compare.
32 PA10 bidirectional 5V-tolerant Fm+ I/O (FT_f) usable as SPI2_MOSI, USART1_RX, TIM1_CH3, TIM17_BK, I2C1_SDA, or EVENTOUT.
33 PA11 [PA9] bidirectional 5V-tolerant Fm+ I/O (FT_f, remappable to PA9) usable as SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BK2, or I2C2_SCL.
34 PA12 [PA10] bidirectional 5V-tolerant Fm+ I/O (FT_f, remappable to PA10) usable as SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN, or I2C2_SDA.
35 PA13 bidirectional 5V-tolerant I/O (FT_ea) usable as SWDIO serial-wire debug data, IR_OUT, EVENTOUT, or ADC_IN17 analog input.
36 PA14-BOOT0 bidirectional 5V-tolerant fast I/O (FT_a) usable as SWCLK serial-wire debug clock, USART2_TX, EVENTOUT, ADC_IN18 analog input, or BOOT0 boot-mode selection.
37 PA15 bidirectional 5V-tolerant I/O usable as SPI1_NSS/I2S1_WS, USART2_RX, TIM2_CH1_ETR, or EVENTOUT.
38 PD0 bidirectional 5V-tolerant I/O usable as EVENTOUT, SPI2_NSS, or TIM16_CH1.
39 PD1 bidirectional 5V-tolerant I/O usable as EVENTOUT, SPI2_SCK, or TIM17_CH1.
40 PD2 bidirectional 5V-tolerant I/O usable as TIM3_ETR or TIM1_CH1N.
41 PD3 bidirectional 5V-tolerant I/O usable as USART2_CTS, SPI2_MISO, or TIM1_CH2N.
42 PB3 bidirectional 5V-tolerant I/O usable as SPI1_SCK/I2S1_CK, TIM1_CH2, TIM2_CH2, USART1_RTS_DE_CK, or EVENTOUT.
43 PB4 bidirectional 5V-tolerant I/O usable as SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BK, or EVENTOUT.
44 PB5 bidirectional 5V-tolerant I/O usable as SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BK, LPTIM1_IN1, I2C1_SMBA, or WKUP6 wakeup source.
45 PB6 bidirectional 5V-tolerant Fm+ I/O (FT_f) usable as USART1_TX, TIM1_CH3, TIM16_CH1N, SPI2_MISO, LPTIM1_ETR, I2C1_SCL, or EVENTOUT.
46 PB7 bidirectional 5V-tolerant Fm+ I/O (FT_f) usable as USART1_RX, SPI2_MOSI, TIM17_CH1N, LPTIM1_IN2, I2C1_SDA, EVENTOUT, or PVD_IN programmable voltage detector input.
47 PB8 bidirectional 5V-tolerant Fm+ I/O (FT_f) usable as SPI2_SCK, TIM16_CH1, I2C1_SCL, or EVENTOUT.
48 PB9 bidirectional 5V-tolerant Fm+ I/O (FT_f) usable as IR_OUT, TIM17_CH1, SPI2_NSS, I2C1_SDA, or EVENTOUT.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-48(7x7)
Category Embedded Processors & Controllers
Pins 48

CAD (KiCad official)

  • Symbol: STM32G031C8T6
  • Footprint: Package_QFP:LQFP-48_7x7mm_P0.5mm
  • 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32g031c8t6-etched.step / stm32g031c8t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32g031c8t6.step / stm32g031c8t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (117 pp, sha256 95ae804dbf135590, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF