# STM32F767VGT7

**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32F767VGT7 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | 5 V tolerant I/O (FT); alternate functions include TRACECLK, SPI4_SCK, SAI1_MCLK_A, QUADSPI_BK1_IO2, ETH_MII_TXD3 and FMC_A23. |
| 2 | PE3 | bidirectional | 5 V tolerant I/O (FT); alternate functions include TRACED0, SAI1_SD_B and FMC_A19. |
| 3 | PE4 | bidirectional | 5 V tolerant I/O (FT); alternate functions include TRACED1, SPI4_NSS, SAI1_FS_A, DCMI_D4 and FMC_A20. |
| 4 | PE5 | bidirectional | 5 V tolerant I/O (FT); alternate functions include TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A and FMC_A21. |
| 5 | PE6 | bidirectional | 5 V tolerant I/O (FT); alternate functions include TRACED3, TIM1_BKIN2, SPI4_MOSI, SAI1_SD_A and FMC_A22. |
| 6 | VBAT | power_in | Backup supply for the RTC, the 32x32-bit backup registers and the 4 Kbytes backup SRAM when VDD is not present. |
| 7 | PC13 | bidirectional | Supplied through the power switch (3 mA sink limit): in output mode keep speed at or below 2 MHz with 30 pF load and do not use as a current source; also RTC_TAMP1/RTC_TS/RTC_OUT/WKUP4. |
| 8 | PC14-OSC32_IN | bidirectional | Power-switch-supplied I/O (FT, not 5 V tolerant in oscillator mode) with the 32 kHz oscillator input OSC32_IN; output use limited to 2 MHz with 30 pF load. |
| 9 | PC15-OSC32_OUT | bidirectional | Power-switch-supplied I/O (FT, not 5 V tolerant in oscillator mode) with the 32 kHz oscillator output OSC32_OUT; output use limited to 2 MHz with 30 pF load. |
| 10 | VSS | power_in | Ground reference pin; all voltages are referenced to VSS. |
| 11 | VDD | power_in | Application supply and I/O supply, 1.7 V to 3.6 V. |
| 12 | PH0-OSC_IN | bidirectional | FT I/O in oscillator mode; OSC_IN is the input of the 4-26 MHz external crystal oscillator. |
| 13 | PH1-OSC_OUT | bidirectional | FT I/O in oscillator mode; OSC_OUT is the output of the 4-26 MHz external crystal oscillator. |
| 14 | NRST | bidirectional | Bidirectional reset pin with weak pull-up resistor. |
| 15 | PC0 | bidirectional | 5 V tolerant I/O (FT); also ADC1_IN10, ADC2_IN10, ADC3_IN10, DFSDM1_CKIN0 and FMC_SDNWE. |
| 16 | PC1 | bidirectional | 5 V tolerant I/O (FT); also ADC1_IN11, ADC2_IN11, ADC3_IN11, RTC_TAMP3/WKUP3, ETH_MDC and TRACED0. |
| 17 | PC2 | bidirectional | 5 V tolerant I/O (FT); also ADC1_IN12, ADC2_IN12, ADC3_IN12, SPI2_MISO, OTG_HS_ULPI_DIR and FMC_SDNE0. |
| 18 | PC3 | bidirectional | 5 V tolerant I/O (FT); also ADC1_IN13, ADC2_IN13, ADC3_IN13, SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT and FMC_SDCKE0. |
| 19 | VSSA | power_in | Analog ground pin. |
| 20 | VREF+ | power_in | Positive reference voltage pin for the ADC and DAC. |
| 21 | VDDA | power_in | Analog supply pin for the ADC, DAC and analog blocks. |
| 22 | PA0-WKUP | bidirectional | FT I/O for wakeup input WKUP1; also ADC1_IN0, TIM2_CH1/TIM2_ETR, USART2_CTS and UART4_TX; if BYPASS_REG is tied to VDD (regulator OFF/internal reset ON) this pin is the active-low internal reset. |
| 23 | PA1 | bidirectional | 5 V tolerant I/O (FT); also ADC1_IN1, TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX and LCD_R2. |
| 24 | PA2 | bidirectional | 5 V tolerant I/O (FT); also ADC1_IN2, WKUP2, TIM2_CH3, TIM9_CH1, USART2_TX and ETH_MDIO. |
| 25 | PA3 | bidirectional | 5 V tolerant I/O (FT); also ADC1_IN3, TIM2_CH4, TIM9_CH2, USART2_RX and OTG_HS_ULPI_D0. |
| 26 | VSS | power_in | Ground reference pin; all voltages are referenced to VSS. |
| 27 | VDD | power_in | Application supply and I/O supply, 1.7 V to 3.6 V. |
| 28 | PA4 | bidirectional | 3.3 V tolerant I/O directly connected to ADC (TTa); also ADC1_IN4, ADC2_IN4, DAC_OUT1, SPI1_NSS/I2S1_WS and USART2_CK. |
| 29 | PA5 | bidirectional | 3.3 V tolerant I/O directly connected to ADC (TTa); also ADC1_IN5, ADC2_IN5, DAC_OUT2, TIM2_CH1/TIM2_ETR and SPI1_SCK/I2S1_CK. |
| 30 | PA6 | bidirectional | 5 V tolerant I/O (FT); also ADC1_IN6, ADC2_IN6, TIM1_BKIN, TIM3_CH1, SPI1_MISO and DCMI_PIXCLK. |
| 31 | PA7 | bidirectional | 5 V tolerant I/O (FT); also ADC1_IN7, ADC2_IN7, TIM1_CH1N, TIM3_CH2, SPI1_MOSI/I2S1_SD and ETH_MII_RX_DV/ETH_RMII_CRS_DV. |
| 32 | PC4 | bidirectional | 5 V tolerant I/O (FT); also ADC1_IN14, ADC2_IN14, DFSDM1_CKIN2, I2S1_MCK, SPDIF_RX2 and ETH_MII_RXD0/ETH_RMII_RXD0. |
| 33 | PC5 | bidirectional | 5 V tolerant I/O (FT); also ADC1_IN15, ADC2_IN15, DFSDM1_DATIN2, SPDIF_RX3 and ETH_MII_RXD1/ETH_RMII_RXD1. |
| 34 | PB0 | bidirectional | 5 V tolerant I/O (FT); also ADC1_IN8, ADC2_IN8, TIM1_CH2N, TIM3_CH3, UART4_CTS, OTG_HS_ULPI_D1 and ETH_MII_RXD2. |
| 35 | PB1 | bidirectional | 5 V tolerant I/O (FT); also ADC1_IN9, ADC2_IN9, TIM1_CH3N, TIM3_CH4, OTG_HS_ULPI_D2 and ETH_MII_RXD3. |
| 36 | PB2 | bidirectional | 5 V tolerant I/O (FT); also SAI1_SD_A, SPI3_MOSI/I2S3_SD, QUADSPI_CLK and DFSDM1_CKIN1. |
| 37 | PE7 | bidirectional | 5 V tolerant I/O (FT); also TIM1_ETR, DFSDM1_DATIN2, UART7_RX, QUADSPI_BK2_IO0 and FMC_D4. |
| 38 | PE8 | bidirectional | 5 V tolerant I/O (FT); also TIM1_CH1N, DFSDM1_CKIN2, UART7_TX, QUADSPI_BK2_IO1 and FMC_D5. |
| 39 | PE9 | bidirectional | 5 V tolerant I/O (FT); also TIM1_CH1, DFSDM1_CKOUT, UART7_RTS, QUADSPI_BK2_IO2 and FMC_D6. |
| 40 | PE10 | bidirectional | 5 V tolerant I/O (FT); also TIM1_CH2N, DFSDM1_DATIN4, UART7_CTS, QUADSPI_BK2_IO3 and FMC_D7. |
| 41 | PE11 | bidirectional | 5 V tolerant I/O (FT); also TIM1_CH2, SPI4_NSS, DFSDM1_CKIN4, SAI2_SD_B, FMC_D8 and LCD_G3. |
| 42 | PE12 | bidirectional | 5 V tolerant I/O (FT); also TIM1_CH3N, SPI4_SCK, DFSDM1_DATIN5, SAI2_SCK_B, FMC_D9 and LCD_B4. |
| 43 | PE13 | bidirectional | 5 V tolerant I/O (FT); also TIM1_CH3, SPI4_MISO, DFSDM1_CKIN5, SAI2_FS_B, FMC_D10 and LCD_DE. |
| 44 | PE14 | bidirectional | 5 V tolerant I/O (FT); also TIM1_CH4, SPI4_MOSI, SAI2_MCLK_B, FMC_D11 and LCD_CLK. |
| 45 | PE15 | bidirectional | 5 V tolerant I/O (FT); also TIM1_BKIN, FMC_D12 and LCD_R7. |
| 46 | PB10 | bidirectional | 5 V tolerant I/O (FT); also TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, USART3_TX, QUADSPI_BK1_NCS, OTG_HS_ULPI_D3 and ETH_MII_RX_ER. |
| 47 | PB11 | bidirectional | 5 V tolerant I/O (FT); also TIM2_CH4, I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN/ETH_RMII_TX_EN and DSI_TE. |
| 48 | VCAP_1 | power_out | Connection for the external decoupling capacitor of the internal voltage regulator (VCAP1). |
| 49 | VSS | power_in | Ground reference pin; all voltages are referenced to VSS. |
| 50 | VDD | power_in | Application supply and I/O supply, 1.7 V to 3.6 V. |
| 51 | PB12 | bidirectional | 5 V tolerant I/O (FT); also TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5 and OTG_HS_ID. |
| 52 | PB13 | bidirectional | 5 V tolerant I/O (FT); also TIM1_CH1N, SPI2_SCK/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1/ETH_RMII_TXD1 and OTG_HS_VBUS. |
| 53 | PB14 | bidirectional | 5 V tolerant I/O (FT); also TIM1_CH2N, USART1_TX, SPI2_MISO, USART3_RTS, SDMMC2_D0 and OTG_HS_DM. |
| 54 | PB15 | bidirectional | 5 V tolerant I/O (FT); also RTC_REFIN, TIM1_CH3N, USART1_RX, SPI2_MOSI/I2S2_SD, SDMMC2_D1 and OTG_HS_DP. |
| 55 | PD8 | bidirectional | 5 V tolerant I/O (FT); also USART3_TX, FMC_D13, DFSDM1_CKIN3 and SPDIF_RX1. |
| 56 | PD9 | bidirectional | 5 V tolerant I/O (FT); also USART3_RX, FMC_D14 and DFSDM1_DATIN3. |
| 57 | PD10 | bidirectional | 5 V tolerant I/O (FT); also USART3_CK, FMC_D15, LCD_B3 and DFSDM1_CKOUT. |
| 58 | PD11 | bidirectional | 5 V tolerant I/O (FT); also I2C4_SMBA, USART3_CTS, QUADSPI_BK1_IO0, SAI2_SD_A and FMC_A16/FMC_CLE. |
| 59 | PD12 | bidirectional | 5 V tolerant I/O (FT); also TIM4_CH1, LPTIM1_IN1, I2C4_SCL, USART3_RTS, QUADSPI_BK1_IO1 and FMC_A17/FMC_ALE. |
| 60 | PD13 | bidirectional | 5 V tolerant I/O (FT); also TIM4_CH2, LPTIM1_OUT, I2C4_SDA, QUADSPI_BK1_IO3 and FMC_A18. |
| 61 | PD14 | bidirectional | 5 V tolerant I/O (FT); also TIM4_CH3, UART8_CTS and FMC_D0. |
| 62 | PD15 | bidirectional | 5 V tolerant I/O (FT); also TIM4_CH4, UART8_RTS and FMC_D1. |
| 63 | PC6 | bidirectional | 5 V tolerant I/O (FT); also TIM3_CH1, TIM8_CH1, I2S2_MCK, USART6_TX, FMC_NWAIT, SDMMC2_D6, DCMI_D0 and LCD_HSYNC. |
| 64 | PC7 | bidirectional | 5 V tolerant I/O (FT); also TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, FMC_NE1, SDMMC2_D7, DCMI_D1 and LCD_G6. |
| 65 | PC8 | bidirectional | 5 V tolerant I/O (FT); also TRACED1, TIM3_CH3, TIM8_CH3, UART5_RTS, USART6_CK, FMC_NE2/FMC_NCE and DCMI_D2. |
| 66 | PC9 | bidirectional | 5 V tolerant I/O (FT); also MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, UART5_CTS, QUADSPI_BK1_IO0, SDMMC1_D1 and DCMI_D3. |
| 67 | PA8 | bidirectional | 5 V tolerant I/O (FT); also MCO1, TIM1_CH1, I2C3_SCL, USART1_CK, OTG_FS_SOF, CAN3_RX and UART7_RX. |
| 68 | PA9 | bidirectional | 5 V tolerant I/O (FT); also TIM1_CH2, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX, DCMI_D0 and OTG_FS_VBUS. |
| 69 | PA10 | bidirectional | 5 V tolerant I/O (FT); also TIM1_CH3, USART1_RX, OTG_FS_ID, MDIOS_MDIO and DCMI_D1. |
| 70 | PA11 | bidirectional | 5 V tolerant I/O (FT); also TIM1_CH4, SPI2_NSS/I2S2_WS, UART4_RX, USART1_CTS, CAN1_RX and OTG_FS_DM. |
| 71 | PA12 | bidirectional | 5 V tolerant I/O (FT); also TIM1_ETR, SPI2_SCK/I2S2_CK, UART4_TX, USART1_RTS, SAI2_FS_B, CAN1_TX and OTG_FS_DP. |
| 72 | PA13(JTMS-SWDIO) | bidirectional | 5 V tolerant I/O (FT); debug function JTMS-SWDIO. |
| 73 | VCAP_2 | power_out | Connection for the external decoupling capacitor of the internal voltage regulator (VCAP2). |
| 74 | VSS | power_in | Ground reference pin; all voltages are referenced to VSS. |
| 75 | VDD | power_in | Application supply and I/O supply, 1.7 V to 3.6 V. |
| 76 | PA14(JTCK-SWCLK) | bidirectional | 5 V tolerant I/O (FT); debug function JTCK-SWCLK. |
| 77 | PA15(JTDI) | bidirectional | 5 V tolerant I/O (FT); debug function JTDI; also TIM2_CH1/TIM2_ETR, HDMI_CEC, SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, UART4_RTS and CAN3_TX. |
| 78 | PC10 | bidirectional | 5 V tolerant I/O (FT); also DFSDM1_CKIN5, SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDMMC1_D2 and DCMI_D8. |
| 79 | PC11 | bidirectional | 5 V tolerant I/O (FT); also DFSDM1_DATIN5, SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDMMC1_D3 and DCMI_D4. |
| 80 | PC12 | bidirectional | 5 V tolerant I/O (FT); also TRACED3, SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, SDMMC1_CK and DCMI_D9. |
| 81 | PD0 | bidirectional | 5 V tolerant I/O (FT); also DFSDM1_CKIN6, DFSDM1_DATIN7, UART4_RX, CAN1_RX and FMC_D2. |
| 82 | PD1 | bidirectional | 5 V tolerant I/O (FT); also DFSDM1_DATIN6, DFSDM1_CKIN7, UART4_TX, CAN1_TX and FMC_D3. |
| 83 | PD2 | bidirectional | 5 V tolerant I/O (FT); also TRACED2, TIM3_ETR, UART5_RX, SDMMC1_CMD and DCMI_D11. |
| 84 | PD3 | bidirectional | 5 V tolerant I/O (FT); also DFSDM1_CKOUT, SPI2_SCK/I2S2_CK, DFSDM1_DATIN0, USART2_CTS, FMC_CLK, DCMI_D5 and LCD_G7. |
| 85 | PD4 | bidirectional | 5 V tolerant I/O (FT); also DFSDM1_CKIN0, USART2_RTS and FMC_NOE. |
| 86 | PD5 | bidirectional | 5 V tolerant I/O (FT); also USART2_TX and FMC_NWE. |
| 87 | PD6 | bidirectional | 5 V tolerant I/O (FT); also DFSDM1_CKIN4, SPI3_MOSI/I2S3_SD, SAI1_SD_A, USART2_RX, SDMMC2_CK, FMC_NWAIT, DCMI_D10 and LCD_B2. |
| 88 | PD7 | bidirectional | 5 V tolerant I/O (FT); also DFSDM1_DATIN4, SPI1_MOSI/I2S1_SD, DFSDM1_CKIN1, USART2_CK, SPDIF_RX0, SDMMC2_CMD and FMC_NE1. |
| 89 | PB3(JTDO/TRACESWO) | bidirectional | 5 V tolerant I/O (FT); debug function JTDO/TRACESWO; also TIM2_CH2, SPI1_SCK/I2S1_CK, SPI3_SCK/I2S3_CK, SDMMC2_D2, CAN3_RX and UART7_RX. |
| 90 | PB4(NJTRST) | bidirectional | 5 V tolerant I/O (FT); debug function NJTRST; also TIM3_CH1, SPI1_MISO, SPI3_MISO, SPI2_NSS/I2S2_WS, SDMMC2_D3, CAN3_TX and UART7_TX. |
| 91 | PB5 | bidirectional | 5 V tolerant I/O (FT); also UART5_RX, TIM3_CH2, I2C1_SMBA, SPI1_MOSI/I2S1_SD, SPI3_MOSI/I2S3_SD, CAN2_RX, OTG_HS_ULPI_D7, FMC_SDCKE1, DCMI_D10 and LCD_G7. |
| 92 | PB6 | bidirectional | 5 V tolerant I/O (FT); also UART5_TX, TIM4_CH1, HDMI-CEC, I2C1_SCL, USART1_TX, CAN2_TX, QUADSPI_BK1_NCS, FMC_SDNE1 and DCMI_D5. |
| 93 | PB7 | bidirectional | 5 V tolerant I/O (FT); also TIM4_CH2, I2C1_SDA, USART1_RX, I2C4_SDA, FMC_NL and DCMI_VSYNC. |
| 94 | BOOT0 | input | Dedicated boot-mode selection pin, also used as VPP for Flash programming. |
| 95 | PB8 | bidirectional | 5 V tolerant I/O (FT); also I2C4_SCL, TIM4_CH3, TIM10_CH1, I2C1_SCL, UART5_RX, CAN1_RX, SDMMC2_D4, DCMI_D6 and LCD_B6. |
| 96 | PB9 | bidirectional | 5 V tolerant I/O (FT); also I2C4_SDA, TIM4_CH4, TIM11_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, UART5_TX, CAN1_TX, SDMMC2_D5, DCMI_D7 and LCD_B7. |
| 97 | PE0 | bidirectional | 5 V tolerant I/O (FT); also TIM4_ETR, LPTIM1_ETR, UART8_RX, SAI2_MCLK_A, FMC_NBL0 and DCMI_D2. |
| 98 | PE1 | bidirectional | 5 V tolerant I/O (FT); also LPTIM1_IN2, UART8_TX, FMC_NBL1 and DCMI_D3. |
| 99 | VSS | power_in | Ground reference pin; all voltages are referenced to VSS. |
| 100 | VDD | power_in | Application supply and I/O supply, 1.7 V to 3.6 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-100(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |

## CAD (KiCad official)

- Symbol: `STM32F767VGT7`
- Footprint: `Package_QFP:LQFP-100_14x14mm_P0.5mm`
- 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files: `stm32f767vgt7-etched.step` / `stm32f767vgt7-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f767vgt7.step` / `stm32f767vgt7.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588923444386287616) (252 pp, sha256 `d6d6bcfada50d758`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stm32f767vgt7-datasheet.pdf)