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STM32F767VGT6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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STM32F767VGT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32F767VGT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5 V tolerant (FT) GPIO, floating input after reset; alternate functions TRACECLK, SPI4_SCK, SAI1_MCLK_A, QUADSPI_BK1_IO2, ETH_MII_TXD3, FMC_A23, EVENTOUT.
2 PE3 bidirectional 5 V tolerant (FT) GPIO; alternate functions TRACED0, SAI1_SD_B, FMC_A19, EVENTOUT.
3 PE4 bidirectional 5 V tolerant (FT) GPIO; alternate functions TRACED1, SPI4_NSS, SAI1_FS_A, DFSDM1_DATIN3, FMC_A20, DCMI_D4, LCD_B0, EVENTOUT.
4 PE5 bidirectional 5 V tolerant (FT) GPIO; alternate functions TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A, DFSDM1_CKIN3, FMC_A21, DCMI_D6, LCD_G0, EVENTOUT.
5 PE6 bidirectional 5 V tolerant (FT) GPIO; alternate functions TRACED3, TIM1_BKIN2, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, SAI2_MCLK_B, FMC_A22, DCMI_D7, LCD_G1, EVENTOUT.
6 VBAT power_in Backup supply for the RTC and 32 backup registers; the backup switch takes power from VBAT when VDD is not present.
7 PC13 bidirectional 5 V tolerant (FT) GPIO supplied through the power switch, which sinks only 3 mA, so use at no more than 2 MHz with 30 pF load and never as a current source; additional functions RTC_TAMP1/RTC_TS/RTC_OUT/WKUP4.
8 PC14-OSC32_IN bidirectional Power-switch limits as PC13 (2 MHz max, 30 pF max, no current source); FT except in oscillator mode; additional function OSC32_IN for the 32.768 kHz LSE oscillator.
9 PC15-OSC32_OUT bidirectional Power-switch limits as PC13 (2 MHz max, 30 pF max, no current source); FT except in oscillator mode; additional function OSC32_OUT for the 32.768 kHz LSE oscillator.
10 VSS power_in Ground pin.
11 VDD power_in Digital supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V.
12 PH0-OSC_IN bidirectional FT except in oscillator mode; additional function OSC_IN, the input of the 4-to-26 MHz crystal oscillator.
13 PH1-OSC_OUT bidirectional FT except in oscillator mode; additional function OSC_OUT, the output of the 4-to-26 MHz crystal oscillator.
14 NRST bidirectional Bidirectional reset pin with weak pull-up resistor.
15 PC0 bidirectional 5 V tolerant (FT) GPIO; alternate functions DFSDM1_CKIN0, DFSDM1_DATIN4, SAI2_FS_B, OTG_HS_ULPI_STP, FMC_SDNWE, LCD_R5, EVENTOUT; additional ADC1_IN10, ADC2_IN10, ADC3_IN10.
16 PC1 bidirectional 5 V tolerant (FT) GPIO; alternate functions TRACED0, DFSDM1_DATIN0, SPI2_MOSI/I2S2_SD, SAI1_SD_A, DFSDM1_CKIN4, ETH_MDC, MDIOS_MDC, EVENTOUT; additional ADC1_IN11, ADC2_IN11, ADC3_IN11, RTC_TAMP3/WKUP3.
17 PC2 bidirectional 5 V tolerant (FT) GPIO; alternate functions DFSDM1_CKIN1, SPI2_MISO, DFSDM1_CKOUT, OTG_HS_ULPI_DIR, ETH_MII_TXD2, FMC_SDNE0, EVENTOUT; additional ADC1_IN12, ADC2_IN12, ADC3_IN12.
18 PC3 bidirectional 5 V tolerant (FT) GPIO; alternate functions DFSDM1_DATIN1, SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, FMC_SDCKE0, EVENTOUT; additional ADC1_IN13, ADC2_IN13, ADC3_IN13.
19 VSSA power_in Analog ground pin for the ADC and DAC.
20 VREF+ power_in Positive reference voltage input for the ADC and DAC; decoupling depends on whether VREF+ is connected to VDDA (see Section 5.3.27).
21 VDDA power_in Analog supply pin for the ADC and DAC; no voltage range is stated in the pin table.
22 PA0-WKUP bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, SAI2_SD_B, ETH_MII_CRS, EVENTOUT; additional ADC1_IN0, ADC2_IN0, ADC3_IN0, WKUP1.
23 PA1 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3, SAI2_MCLK_B, ETH_MII_RX_CLK/ETH_RMII_REF_CLK, LCD_R2, EVENTOUT; additional ADC1_IN1, ADC2_IN1, ADC3_IN1.
24 PA2 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, SAI2_SCK_B, ETH_MDIO, MDIOS_MDIO, LCD_R1, EVENTOUT; additional ADC1_IN2, ADC2_IN2, ADC3_IN2, WKUP2.
25 PA3 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, LCD_B2, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5, EVENTOUT; additional ADC1_IN3, ADC2_IN3, ADC3_IN3.
26 VSS power_in Ground pin.
27 VDD power_in Digital supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V.
28 PA4 bidirectional 3.3 V tolerant I/O directly connected to the ADC; alternate functions SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, USART2_CK, SPI6_NSS, OTG_HS_SOF, DCMI_HSYNC, LCD_VSYNC, EVENTOUT; additional ADC1_IN4, ADC2_IN4, DAC_OUT1.
29 PA5 bidirectional 3.3 V tolerant I/O directly connected to the ADC; alternate functions TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK/I2S1_CK, SPI6_SCK, OTG_HS_ULPI_CK, LCD_R4, EVENTOUT; additional ADC1_IN5, ADC2_IN5, DAC_OUT2.
30 PA6 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, SPI6_MISO, TIM13_CH1, MDIOS_MDC, DCMI_PIXCLK, LCD_G2, EVENTOUT; additional ADC1_IN6, ADC2_IN6.
31 PA7 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI/I2S1_SD, SPI6_MOSI, TIM14_CH1, ETH_MII_RX_DV/ETH_RMII_CRS_DV, FMC_SDNWE, EVENTOUT; additional ADC1_IN7, ADC2_IN7.
32 PC4 bidirectional 5 V tolerant (FT) GPIO; alternate functions DFSDM1_CKIN2, I2S1_MCK, SPDIF_RX2, ETH_MII_RXD0/ETH_RMII_RXD0, FMC_SDNE0, EVENTOUT; additional ADC1_IN14, ADC2_IN14.
33 PC5 bidirectional 5 V tolerant (FT) GPIO; alternate functions DFSDM1_DATIN2, SPDIF_RX3, ETH_MII_RXD1/ETH_RMII_RXD1, FMC_SDCKE0, EVENTOUT; additional ADC1_IN15, ADC2_IN15.
34 PB0 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_CH2N, TIM3_CH3, TIM8_CH2N, DFSDM1_CKOUT, UART4_CTS, LCD_R3, OTG_HS_ULPI_D1, ETH_MII_RXD2, LCD_G1, EVENTOUT; additional ADC1_IN8, ADC2_IN8.
35 PB1 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_CH3N, TIM3_CH4, TIM8_CH3N, DFSDM1_DATIN1, LCD_R6, OTG_HS_ULPI_D2, ETH_MII_RXD3, LCD_G0, EVENTOUT; additional ADC1_IN9, ADC2_IN9.
36 PB2 bidirectional 5 V tolerant (FT) GPIO; alternate functions SAI1_SD_A, SPI3_MOSI/I2S3_SD, QUADSPI_CLK, DFSDM1_CKIN1, EVENTOUT.
37 PE7 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_ETR, DFSDM1_DATIN2, UART7_RX, QUADSPI_BK2_IO0, FMC_D4, EVENTOUT.
38 PE8 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_CH1N, DFSDM1_CKIN2, UART7_TX, QUADSPI_BK2_IO1, FMC_D5, EVENTOUT.
39 PE9 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_CH1, DFSDM1_CKOUT, UART7_RTS, QUADSPI_BK2_IO2, FMC_D6, EVENTOUT.
40 PE10 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_CH2N, DFSDM1_DATIN4, UART7_CTS, QUADSPI_BK2_IO3, FMC_D7, EVENTOUT.
41 PE11 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_CH2, SPI4_NSS, DFSDM1_CKIN4, SAI2_SD_B, FMC_D8, LCD_G3, EVENTOUT.
42 PE12 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_CH3N, SPI4_SCK, DFSDM1_DATIN5, SAI2_SCK_B, FMC_D9, LCD_B4, EVENTOUT.
43 PE13 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_CH3, SPI4_MISO, DFSDM1_CKIN5, SAI2_FS_B, FMC_D10, LCD_DE, EVENTOUT.
44 PE14 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_CH4, SPI4_MOSI, SAI2_MCLK_B, FMC_D11, LCD_CLK, EVENTOUT.
45 PE15 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_BKIN, FMC_D12, LCD_R7, EVENTOUT.
46 PB10 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, DFSDM1_DATIN7, USART3_TX, QUADSPI_BK1_NCS, OTG_HS_ULPI_D3, ETH_MII_RX_ER, LCD_G4, EVENTOUT.
47 PB11 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM2_CH4, I2C2_SDA, DFSDM1_CKIN7, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN/ETH_RMII_TX_EN, DSI_TE, LCD_G5, EVENTOUT.
48 VCAP_1 power_out Connection for the external VCAP1 capacitor of the internal voltage regulator (see Section 5.3.2).
49 VSS power_in Ground pin.
50 VDD power_in Digital supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V.
51 PB12 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, DFSDM1_DATIN1, USART3_CK, UART5_RX, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0, OTG_HS_ID, EVENTOUT.
52 PB13 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_CH1N, SPI2_SCK/I2S2_CK, DFSDM1_CKIN1, USART3_CTS, UART5_TX, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1/ETH_RMII_TXD1, EVENTOUT; additional OTG_HS_VBUS.
53 PB14 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_CH2N, TIM8_CH2N, USART1_TX, SPI2_MISO, DFSDM1_DATIN2, USART3_RTS, UART4_RTS, TIM12_CH1, SDMMC2_D0, OTG_HS_DM, EVENTOUT.
54 PB15 bidirectional 5 V tolerant (FT) GPIO; alternate functions RTC_REFIN, TIM1_CH3N, TIM8_CH3N, USART1_RX, SPI2_MOSI/I2S2_SD, DFSDM1_CKIN2, UART4_CTS, TIM12_CH2, SDMMC2_D1, OTG_HS_DP, EVENTOUT.
55 PD8 bidirectional 5 V tolerant (FT) GPIO; alternate functions DFSDM1_CKIN3, USART3_TX, SPDIF_RX1, FMC_D13, EVENTOUT.
56 PD9 bidirectional 5 V tolerant (FT) GPIO; alternate functions DFSDM1_DATIN3, USART3_RX, FMC_D14, EVENTOUT.
57 PD10 bidirectional 5 V tolerant (FT) GPIO; alternate functions DFSDM1_CKOUT, USART3_CK, FMC_D15, LCD_B3, EVENTOUT.
58 PD11 bidirectional 5 V tolerant (FT) GPIO; alternate functions I2C4_SMBA, USART3_CTS, QUADSPI_BK1_IO0, SAI2_SD_A, FMC_A16/FMC_CLE, EVENTOUT.
59 PD12 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM4_CH1, LPTIM1_IN1, I2C4_SCL, USART3_RTS, QUADSPI_BK1_IO1, SAI2_FS_A, FMC_A17/FMC_ALE, EVENTOUT.
60 PD13 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM4_CH2, LPTIM1_OUT, I2C4_SDA, QUADSPI_BK1_IO3, SAI2_SCK_A, FMC_A18, EVENTOUT.
61 PD14 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM4_CH3, UART8_CTS, FMC_D0, EVENTOUT.
62 PD15 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM4_CH4, UART8_RTS, FMC_D1, EVENTOUT.
63 PC6 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM3_CH1, TIM8_CH1, I2S2_MCK, DFSDM1_CKIN3, USART6_TX, FMC_NWAIT, SDMMC2_D6, SDMMC1_D6, DCMI_D0, LCD_HSYNC, EVENTOUT.
64 PC7 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM3_CH2, TIM8_CH2, I2S3_MCK, DFSDM1_DATIN3, USART6_RX, FMC_NE1, SDMMC2_D7, SDMMC1_D7, DCMI_D1, LCD_G6, EVENTOUT.
65 PC8 bidirectional 5 V tolerant (FT) GPIO; alternate functions TRACED1, TIM3_CH3, TIM8_CH3, UART5_RTS, USART6_CK, FMC_NE2/FMC_NCE, SDMMC1_D0, DCMI_D2, EVENTOUT.
66 PC9 bidirectional 5 V tolerant (FT) GPIO; alternate functions MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, UART5_CTS, QUADSPI_BK1_IO0, LCD_G3, SDMMC1_D1, DCMI_D3, LCD_B2, EVENTOUT.
67 PA8 bidirectional 5 V tolerant (FT) GPIO; alternate functions MCO1, TIM1_CH1, TIM8_BKIN2, I2C3_SCL, USART1_CK, OTG_FS_SOF, CAN3_RX, UART7_RX, LCD_B3, LCD_R6, EVENTOUT.
68 PA9 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_CH2, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX, DCMI_D0, LCD_R5, EVENTOUT; additional OTG_FS_VBUS.
69 PA10 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_CH3, USART1_RX, LCD_B4, OTG_FS_ID, MDIOS_MDIO, DCMI_D1, LCD_B1, EVENTOUT.
70 PA11 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_CH4, SPI2_NSS/I2S2_WS, UART4_RX, USART1_CTS, CAN1_RX, OTG_FS_DM, LCD_R4, EVENTOUT.
71 PA12 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM1_ETR, SPI2_SCK/I2S2_CK, UART4_TX, USART1_RTS, SAI2_FS_B, CAN1_TX, OTG_FS_DP, LCD_R5, EVENTOUT.
72 PA13(JTMS-SWDIO) bidirectional 5 V tolerant (FT) GPIO; alternate functions JTMS-SWDIO (serial wire debug data I/O) and EVENTOUT.
73 VCAP_2 power_out Connection for the external VCAP2 capacitor of the internal voltage regulator (see Section 5.3.2).
74 VSS power_in Ground pin.
75 VDD power_in Digital supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V.
76 PA14(JTCK-SWCLK) bidirectional 5 V tolerant (FT) GPIO; alternate functions JTCK-SWCLK (serial wire debug clock) and EVENTOUT.
77 PA15(JTDI) bidirectional 5 V tolerant (FT) GPIO; alternate functions JTDI, TIM2_CH1/TIM2_ETR, HDMI_CEC, SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, SPI6_NSS, UART4_RTS, CAN3_TX, UART7_TX, EVENTOUT.
78 PC10 bidirectional 5 V tolerant (FT) GPIO; alternate functions DFSDM1_CKIN5, SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDMMC1_D2, DCMI_D8, LCD_R2, EVENTOUT.
79 PC11 bidirectional 5 V tolerant (FT) GPIO; alternate functions DFSDM1_DATIN5, SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDMMC1_D3, DCMI_D4, EVENTOUT.
80 PC12 bidirectional 5 V tolerant (FT) GPIO; alternate functions TRACED3, SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, SDMMC1_CK, DCMI_D9, EVENTOUT.
81 PD0 bidirectional 5 V tolerant (FT) GPIO; alternate functions DFSDM1_CKIN6, DFSDM1_DATIN7, UART4_RX, CAN1_RX, FMC_D2, EVENTOUT.
82 PD1 bidirectional 5 V tolerant (FT) GPIO; alternate functions DFSDM1_DATIN6, DFSDM1_CKIN7, UART4_TX, CAN1_TX, FMC_D3, EVENTOUT.
83 PD2 bidirectional 5 V tolerant (FT) GPIO; alternate functions TRACED2, TIM3_ETR, UART5_RX, SDMMC1_CMD, DCMI_D11, EVENTOUT.
84 PD3 bidirectional 5 V tolerant (FT) GPIO; alternate functions DFSDM1_CKOUT, SPI2_SCK/I2S2_CK, DFSDM1_DATIN0, USART2_CTS, FMC_CLK, DCMI_D5, LCD_G7, EVENTOUT.
85 PD4 bidirectional 5 V tolerant (FT) GPIO; alternate functions DFSDM1_CKIN0, USART2_RTS, FMC_NOE, EVENTOUT.
86 PD5 bidirectional 5 V tolerant (FT) GPIO; alternate functions USART2_TX, FMC_NWE, EVENTOUT.
87 PD6 bidirectional 5 V tolerant (FT) GPIO; alternate functions DFSDM1_CKIN4, SPI3_MOSI/I2S3_SD, SAI1_SD_A, USART2_RX, DFSDM1_DATIN1, SDMMC2_CK, FMC_NWAIT, DCMI_D10, LCD_B2, EVENTOUT.
88 PD7 bidirectional 5 V tolerant (FT) GPIO; alternate functions DFSDM1_DATIN4, SPI1_MOSI/I2S1_SD, DFSDM1_CKIN1, USART2_CK, SPDIF_RX0, SDMMC2_CMD, FMC_NE1, EVENTOUT.
89 PB3(JTDO/TRACESWO) bidirectional 5 V tolerant (FT) GPIO; alternate functions JTDO/TRACESWO, TIM2_CH2, SPI1_SCK/I2S1_CK, SPI3_SCK/I2S3_CK, SPI6_SCK, SDMMC2_D2, CAN3_RX, UART7_RX, EVENTOUT.
90 PB4(NJTRST) bidirectional 5 V tolerant (FT) GPIO; alternate functions NJTRST, TIM3_CH1, SPI1_MISO, SPI3_MISO, SPI2_NSS/I2S2_WS, SPI6_MISO, SDMMC2_D3, CAN3_TX, UART7_TX, EVENTOUT.
91 PB5 bidirectional 5 V tolerant (FT) GPIO; alternate functions UART5_RX, TIM3_CH2, I2C1_SMBA, SPI1_MOSI/I2S1_SD, SPI3_MOSI/I2S3_SD, SPI6_MOSI, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1, DCMI_D10, LCD_G7, EVENTOUT.
92 PB6 bidirectional 5 V tolerant (FT) GPIO; alternate functions UART5_TX, TIM4_CH1, HDMI-CEC, I2C1_SCL, DFSDM1_DATIN5, USART1_TX, CAN2_TX, QUADSPI_BK1_NCS, I2C4_SCL, FMC_SDNE1, DCMI_D5, EVENTOUT.
93 PB7 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM4_CH2, I2C1_SDA, DFSDM1_CKIN5, USART1_RX, I2C4_SDA, FMC_NL, DCMI_VSYNC, EVENTOUT.
94 BOOT0 input Dedicated BOOT0 pin (input-only, boot pin structure) that selects the boot mode; additional function VPP.
95 PB8 bidirectional 5 V tolerant (FT) GPIO; alternate functions I2C4_SCL, TIM4_CH3, TIM10_CH1, I2C1_SCL, DFSDM1_CKIN7, UART5_RX, CAN1_RX, SDMMC2_D4, ETH_MII_TXD3, SDMMC1_D4, DCMI_D6, LCD_B6, EVENTOUT.
96 PB9 bidirectional 5 V tolerant (FT) GPIO; alternate functions I2C4_SDA, TIM4_CH4, TIM11_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, DFSDM1_DATIN7, UART5_TX, CAN1_TX, SDMMC2_D5, I2C4_SMBA, SDMMC1_D5, DCMI_D7, LCD_B7, EVENTOUT.
97 PE0 bidirectional 5 V tolerant (FT) GPIO; alternate functions TIM4_ETR, LPTIM1_ETR, UART8_RX, SAI2_MCLK_A, FMC_NBL0, DCMI_D2, EVENTOUT.
98 PE1 bidirectional 5 V tolerant (FT) GPIO; alternate functions LPTIM1_IN2, UART8_TX, FMC_NBL1, DCMI_D3, EVENTOUT.
99 VSS power_in Ground pin.
100 VDD power_in Digital supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32F767VGT6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32f767vgt6-etched.step / stm32f767vgt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f767vgt6.step / stm32f767vgt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (255 pp, sha256 6ed07ca1dc9c1c0f, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF