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STM32F469VGT6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32f469vgt6factory-2.0.0extractor-text
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Contents

README

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STM32F469VGT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32F469VGT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5 V-tolerant I/O (FT), floating input after reset; alternate functions include TRACECLK, SPI4_SCK, SAI1_MCLK_A, QUADSPI_BK1_IO2, ETH_MII_TXD3 and FMC_A23.
2 VSS power_in Ground supply pin of the device (VSS).
3 VBAT power_in Backup-domain supply pin for the RTC, the 20x32-bit backup registers and the optional 4 KB backup SRAM.
4 PC13 bidirectional Power-switch supplied I/O: sink limited to 3 mA, speed not above 2 MHz at 30 pF, must not be used as a current source; additional functions RTC_TAMP1/RTC_TS/RTC_OUT.
5 PC14 bidirectional Power-switch supplied I/O (3 mA sink limit, not above 2 MHz at 30 pF) that doubles as OSC32_IN in oscillator mode.
6 PC15 bidirectional Power-switch supplied I/O (3 mA sink limit, not above 2 MHz at 30 pF) that doubles as OSC32_OUT in oscillator mode.
7 VSS power_in Ground supply pin of the device (VSS).
8 VDD power_in Application supply pin of the device, operating in the 1.7 V to 3.6 V range.
9 PH0 bidirectional 5 V-tolerant I/O except in oscillator mode, used as OSC_IN for the 4 to 26 MHz crystal oscillator; alternate function EVENTOUT.
10 PH1 bidirectional I/O (5 V-tolerant except in oscillator mode) used as OSC_OUT of the 4 to 26 MHz crystal oscillator; alternate function EVENTOUT.
11 NRST bidirectional Bidirectional reset pin with weak pull-up resistor.
12 PC0 bidirectional 5 V-tolerant I/O; alternate functions include OTG_HS_ULPI_STP, FMC_SDNWE, LCD_R5 and EVENTOUT, additional function ADC123_IN10.
13 PC1 bidirectional 5 V-tolerant I/O; alternate functions include TRACED0, SPI2_MOSI/I2S2_SD, SAI1_SD_A and ETH_MDC, additional function ADC123_IN11.
14 PC2 bidirectional 5 V-tolerant I/O; alternate functions include SPI2_MISO, I2S2ext_SD, OTG_HS_ULPI_DIR, ETH_MII_TXD2 and FMC_SDNE0, additional function ADC123_IN12.
15 PC3 bidirectional 5 V-tolerant I/O; alternate functions include SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK and FMC_SDCKE0, additional function ADC123_IN13.
16 VSSA power_in Analog ground supply pin (VSSA).
17 VREF+ power_in Positive reference voltage supply pin (VREF+).
18 VDDA power_in Analog supply pin (VDDA).
19 PA0 bidirectional 5 V-tolerant I/O with wake-up function WKUP; alternate functions include TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX and ETH_MII_CRS, additional function ADC123_IN0.
20 PA1 bidirectional 5 V-tolerant I/O; alternate functions include TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3 and ETH_MII_RX_CLK/ETH_RMII_REF_CLK, additional function ADC123_IN1.
21 PA2 bidirectional 5 V-tolerant I/O; alternate functions include TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, ETH_MDIO and LCD_R1, additional function ADC123_IN2.
22 PA3 bidirectional 5 V-tolerant I/O; alternate functions include TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, LCD_B2, OTG_HS_ULPI_D0 and ETH_MII_COL, additional function ADC123_IN3.
23 VSS power_in Ground supply pin of the device (VSS).
24 VDD power_in Application supply pin of the device, operating in the 1.7 V to 3.6 V range.
25 PA4 bidirectional 3.3 V-tolerant I/O (TTa) directly connected to analog parts; alternate functions include SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, OTG_HS_SOF, DCMI_HSYNC and LCD_VSYNC, additional functions ADC12_IN4 and DAC_OUT1.
26 PA5 bidirectional 3.3 V-tolerant I/O (TTa) directly connected to analog parts; alternate functions include TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK, OTG_HS_ULPI_CK and LCD_R4, additional functions ADC12_IN5 and DAC_OUT2.
27 PA6 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM13_CH1, DCMI_PIXCLK and LCD_G2, additional function ADC12_IN6.
28 PA7 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM14_CH1, QUADSPI_CLK, ETH_MII_RX_DV/ETH_RMII_CRS_DV and FMC_SDNWE, additional function ADC12_IN7.
29 PB0 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_CH2N, TIM3_CH3, TIM8_CH2N, LCD_R3, OTG_HS_ULPI_D1 and ETH_MII_RXD2, additional function ADC12_IN8.
30 PB1 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_CH3N, TIM3_CH4, TIM8_CH3N, LCD_R6, OTG_HS_ULPI_D2 and ETH_MII_RXD3, additional function ADC12_IN9.
31 PB2 bidirectional 5 V-tolerant I/O multiplexed with the BOOT1 pin function; alternate function EVENTOUT.
32 PE7 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_ETR, UART7_Rx, QUADSPI_BK2_IO0 and FMC_D4.
33 PE8 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_CH1N, UART7_Tx, QUADSPI_BK2_IO1 and FMC_D5.
34 PE9 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_CH1, QUADSPI_BK2_IO2 and FMC_D6.
35 PE10 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_CH2N, QUADSPI_BK2_IO3 and FMC_D7.
36 PE11 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_CH2, SPI4_NSS, FMC_D8 and LCD_G3.
37 PE12 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_CH3N, SPI4_SCK, FMC_D9 and LCD_B4.
38 PE13 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_CH3, SPI4_MISO, FMC_D10 and LCD_DE.
39 PE14 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_CH4, SPI4_MOSI, FMC_D11 and LCD_CLK.
40 PE15 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_BKIN, FMC_D12 and LCD_R7.
41 PB10 bidirectional 5 V-tolerant I/O; alternate functions include TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, USART3_TX, QUADSPI_BK1_NCS, OTG_HS_ULPI_D3 and ETH_MII_RX_ER.
42 PB11 bidirectional 5 V-tolerant I/O; alternate functions include TIM2_CH4, I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN/ETH_RMII_TX_EN and DSIHOST_TE.
43 VCAP1 power_in Regulator-output capacitor connection pin VCAP1, which must be connected to an external capacitor as described in the VCAP1/VCAP2 operating conditions.
44 VSS power_in Ground supply pin of the device (VSS).
45 VDD power_in Application supply pin of the device, operating in the 1.7 V to 3.6 V range.
46 PB12 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0 and OTG_HS_ID.
47 PB13 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_CH1N, SPI2_SCK/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6 and ETH_MII_TXD1/ETH_RMII_TXD1, additional function OTG_HS_VBUS.
48 PB14 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_CH2N, TIM8_CH2N, SPI2_MISO, I2S2ext_SD, USART3_RTS, TIM12_CH1 and OTG_HS_DM.
49 PB15 bidirectional 5 V-tolerant I/O; alternate functions include RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI/I2S2_SD, TIM12_CH2 and OTG_HS_DP.
50 PD8 bidirectional 5 V-tolerant I/O; alternate functions include USART3_TX and FMC_D13.
51 PD9 bidirectional 5 V-tolerant I/O; alternate functions include USART3_RX and FMC_D14.
52 PD10 bidirectional 5 V-tolerant I/O; alternate functions include USART3_CK, FMC_D15 and LCD_B3.
53 PD14 bidirectional 5 V-tolerant I/O; alternate functions include TIM4_CH3 and FMC_D0.
54 PD15 bidirectional 5 V-tolerant I/O; alternate functions include TIM4_CH4 and FMC_D1.
55 VDDDSI power_in Supply pin of the DSI (MIPI D-PHY) block (VDDDSI).
56 VCAPDSI power_in Capacitor connection pin of the DSI block (VCAPDSI).
57 DSIHOST_D0P bidirectional MIPI DSI data lane 0 positive differential line (DSIHOST_D0P).
58 DSIHOST_D0N bidirectional MIPI DSI data lane 0 negative differential line (DSIHOST_D0N).
59 VSSDSI power_in Ground pin of the DSI (MIPI D-PHY) block (VSSDSI).
60 DSIHOST_CKP bidirectional MIPI DSI clock lane positive differential line (DSIHOST_CKP).
61 DSIHOST_CKN bidirectional MIPI DSI clock lane negative differential line (DSIHOST_CKN).
62 VDD12DSI power_in DSI block supply pin (VDD12DSI).
63 DSIHOST_D1P bidirectional MIPI DSI data lane 1 positive differential line (DSIHOST_D1P).
64 DSIHOST_D1N bidirectional MIPI DSI data lane 1 negative differential line (DSIHOST_D1N).
65 VDDUSB power_in Dedicated USB power rail that lets the on-chip USB PHYs operate across the entire MCU supply range (VDDUSB).
66 PC6 bidirectional 5 V-tolerant I/O; alternate functions include TIM3_CH1, TIM8_CH1, I2S2_MCK, USART6_TX, SDIO_D6, DCMI_D0 and LCD_HSYNC.
67 PC7 bidirectional 5 V-tolerant I/O; alternate functions include TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, SDIO_D7, DCMI_D1 and LCD_G6.
68 PC8 bidirectional 5 V-tolerant I/O; alternate functions include TRACED1, TIM3_CH3, TIM8_CH3, USART6_CK, SDIO_D0 and DCMI_D2.
69 PC9 bidirectional 5 V-tolerant I/O; alternate functions include MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, QUADSPI_BK1_IO0, SDIO_D1 and DCMI_D3.
70 PA8 bidirectional 5 V-tolerant I/O; alternate functions include MCO1, TIM1_CH1, I2C3_SCL, USART1_CK, OTG_FS_SOF and LCD_R6.
71 PA9 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_CH2, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX and DCMI_D0, additional function OTG_FS_VBUS.
72 PA10 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_CH3, USART1_RX, OTG_FS_ID and DCMI_D1.
73 PA11 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_CH4, USART1_CTS, CAN1_RX, OTG_FS_DM and LCD_R4.
74 PA12 bidirectional 5 V-tolerant I/O; alternate functions include TIM1_ETR, USART1_RTS, CAN1_TX, OTG_FS_DP and LCD_R5.
75 PA13 bidirectional 5 V-tolerant I/O whose pin function is JTMS-SWDIO; alternate function EVENTOUT.
76 VCAP2 power_in Regulator-output capacitor connection pin VCAP2, which must be connected to an external capacitor as described in the VCAP1/VCAP2 operating conditions.
77 VDD power_in Application supply pin of the device, operating in the 1.7 V to 3.6 V range.
78 VSS power_in Ground supply pin of the device (VSS).
79 PA14 bidirectional 5 V-tolerant I/O whose pin function is JTCK-SWCLK; alternate function EVENTOUT.
80 PA15 bidirectional 5 V-tolerant I/O whose pin function is JTDI; alternate functions include TIM2_CH1/TIM2_ETR, SPI1_NSS and SPI3_NSS/I2S3_WS.
81 PC10 bidirectional 5 V-tolerant I/O; alternate functions include SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDIO_D2, DCMI_D8 and LCD_R2.
82 PC11 bidirectional 5 V-tolerant I/O; alternate functions include I2S3ext_SD, SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDIO_D3 and DCMI_D4.
83 PC12 bidirectional 5 V-tolerant I/O; alternate functions include TRACED3, SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, SDIO_CK and DCMI_D9.
84 PD0 bidirectional 5 V-tolerant I/O; alternate functions include CAN1_RX and FMC_D2.
85 PD1 bidirectional 5 V-tolerant I/O; alternate functions include CAN1_TX and FMC_D3.
86 PD2 bidirectional 5 V-tolerant I/O; alternate functions include TRACED2, TIM3_ETR, UART5_RX, SDIO_CMD and DCMI_D11.
87 PD3 bidirectional 5 V-tolerant I/O; alternate functions include SPI2_SCK/I2S2_CK, USART2_CTS, FMC_CLK, DCMI_D5 and LCD_G7.
88 PD4 bidirectional 5 V-tolerant I/O; alternate functions include USART2_RTS and FMC_NOE.
89 PD5 bidirectional 5 V-tolerant I/O; alternate functions include USART2_TX and FMC_NWE.
90 PD6 bidirectional 5 V-tolerant I/O; alternate functions include SPI3_MOSI/I2S3_SD, SAI1_SD_A, USART2_RX, FMC_NWAIT, DCMI_D10 and LCD_B2.
91 PD7 bidirectional 5 V-tolerant I/O; alternate functions include USART2_CK and FMC_NE1.
92 PB3 bidirectional 5 V-tolerant I/O whose pin function is JTDO/TRACESWO; alternate functions include TIM2_CH2, SPI1_SCK and SPI3_SCK/I2S3_CK.
93 PB4 bidirectional 5 V-tolerant I/O whose pin function is NJTRST; alternate functions include TIM3_CH1, SPI1_MISO, SPI3_MISO and I2S3ext_SD.
94 PB5 bidirectional 5 V-tolerant I/O; alternate functions include TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI/I2S3_SD, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1 and DCMI_D10.
95 PB6 bidirectional 5 V-tolerant I/O; alternate functions include TIM4_CH1, I2C1_SCL, USART1_TX, CAN2_TX, QUADSPI_BK1_NCS, FMC_SDNE1 and DCMI_D5.
96 PB7 bidirectional 5 V-tolerant I/O; alternate functions include TIM4_CH2, I2C1_SDA, USART1_RX, FMC_NL and DCMI_VSYNC.
97 BOOT0 input Dedicated BOOT0 pin (input) used for boot-mode selection; the table also lists it as the VPP function.
98 PB8 bidirectional 5 V-tolerant I/O; alternate functions include TIM4_CH3, TIM10_CH1, I2C1_SCL, CAN1_RX, ETH_MII_TXD3, SDIO_D4, DCMI_D6 and LCD_B6.
99 PB9 bidirectional 5 V-tolerant I/O; alternate functions include TIM4_CH4, TIM11_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, CAN1_TX, SDIO_D5, DCMI_D7 and LCD_B7.
100 VDD power_in Application supply pin of the device, operating in the 1.7 V to 3.6 V range.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32F469VGT6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32f469vgt6-etched.step / stm32f469vgt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f469vgt6.step / stm32f469vgt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (219 pp, sha256 cc24f20cdd444905, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF