component
STM32F446VCT6TR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
← Commit history
Publish 0.1.1
5 files changed
+285−283
README.md+65−65@@ -21,7 +21,7 @@ STM32F446VCT6TR from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin de | 11 | VDD | power_in | Supply input pin, accepts 1.7 to 3.6 V for main digital I/O supply. | | 12 | PH0-OSC_IN | bidirectional | GPIO port H pin 0 with 5V tolerant I/O configured for main oscillator input with 4 to 26 MHz crystal capability. | | 13 | PH1-OSC_OUT | bidirectional | GPIO port H pin 1 with 5V tolerant I/O configured for main oscillator output. |-| 14 | NRST | bidirectional | System reset input/output pin with weak pull-up resistor, detects external reset signals and triggers device reset. |+| 14 | NRST | input | System reset input/output pin with weak pull-up resistor, detects external reset signals and triggers device reset. | | 15 | PC0 | bidirectional | GPIO port C pin 0 with 5V tolerant I/O supporting SAI1_MCLK_B, OTG_HS_ULPI_STP, and FMC_SDNWE alternate functions. | | 16 | PC1 | bidirectional | GPIO port C pin 1 with 5V tolerant I/O supporting SPI3/I2S3_SD, SAI1_SD_A, SPI2/I2S2_SD alternate functions. | | 17 | PC2 | bidirectional | GPIO port C pin 2 with 5V tolerant I/O supporting SPI2_MISO, OTG_HS_ULPI_DIR, and FMC_SDNE0 alternate functions. |@@ -44,70 +44,70 @@ STM32F446VCT6TR from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin de | 34 | PC5 | bidirectional | GPIO port C pin 5 with 5V tolerant I/O supporting USART3_RX, SPDIFRX_IN3, and FMC_SDCKE0 alternate functions. | | 35 | PB0 | bidirectional | GPIO port B pin 0 with 5V tolerant I/O supporting TIM1/TIM3/TIM8, SPI3/I2S3_SD, UART4_CTS, OTG_HS_ULPI_D1, and SDIO_D1 alternate functions. | | 36 | PB1 | bidirectional | GPIO port B pin 1 with 5V tolerant I/O supporting TIM1/TIM3/TIM8, OTG_HS_ULPI_D2, and SDIO_D2 alternate functions. |-| 37 | PB2-BOOT1 | input | Dedicated BOOT1 pin for selecting boot mode during power-up or reset, also GPIO with 5V tolerant I/O supporting TIM2_CH4, SAI1_SD_A, SPI3/I2S3_SD, and QUADSPI_CLK alternate functions. |-| 38 | PF11 | bidirectional | GPIO port F pin 11 with 5V tolerant I/O supporting SAI2_SD_B, FMC_SDNRAS, and DCMI_D12 alternate functions. |-| 39 | PF12 | bidirectional | GPIO port F pin 12 with 5V tolerant I/O supporting FMC_A6 alternate function. |-| 40 | VSS | power_in | Ground supply pin, reference potential for all circuits. |-| 41 | VDD | power_in | Supply input pin, accepts 1.7 to 3.6 V for main digital I/O supply. |-| 42 | PF13 | bidirectional | GPIO port F pin 13 with 5V tolerant I/O supporting FMPI2C1_SMBA and FMC_A7 alternate functions. |-| 43 | PF14 | bidirectional | GPIO port F pin 14 with 5V tolerant I/O and I2C FM+ option supporting FMPI2C1_SCL and FMC_A8 alternate functions. |-| 44 | PF15 | bidirectional | GPIO port F pin 15 with 5V tolerant I/O and I2C FM+ option supporting FMPI2C1_SDA and FMC_A9 alternate functions. |-| 45 | PG0 | bidirectional | GPIO port G pin 0 with 5V tolerant I/O supporting FMC_A10 alternate function. |-| 46 | PG1 | bidirectional | GPIO port G pin 1 with 5V tolerant I/O supporting FMC_A11 alternate function. |-| 47 | PE7 | bidirectional | GPIO port E pin 7 with 5V tolerant I/O supporting TIM1_ETR, UART5_RX, QUADSPI_BK2_IO0, and FMC_D4 alternate functions. |-| 48 | PE8 | bidirectional | GPIO port E pin 8 with 5V tolerant I/O supporting TIM1_CH1N, UART5_TX, QUADSPI_BK2_IO1, and FMC_D5 alternate functions. |-| 49 | PE9 | bidirectional | GPIO port E pin 9 with 5V tolerant I/O supporting TIM1_CH1, QUADSPI_BK2_IO2, and FMC_D6 alternate functions. |-| 50 | VSS | power_in | Ground supply pin, reference potential for all circuits. |-| 51 | VDD | power_in | Supply input pin, accepts 1.7 to 3.6 V for main digital I/O supply. |-| 52 | PE10 | bidirectional | GPIO port E pin 10 with 5V tolerant I/O supporting TIM1_CH2N, QUADSPI_BK2_IO3, and FMC_D7 alternate functions. |-| 53 | PE11 | bidirectional | GPIO port E pin 11 with 5V tolerant I/O supporting TIM1_CH2, SPI4_NSS, SAI2_SD_B, and FMC_D8 alternate functions. |-| 54 | PE12 | bidirectional | GPIO port E pin 12 with 5V tolerant I/O supporting TIM1_CH3N, SPI4_SCK, SAI2_SCK_B, and FMC_D9 alternate functions. |-| 55 | PE13 | bidirectional | GPIO port E pin 13 with 5V tolerant I/O supporting TIM1_CH3, SPI4_MISO, SAI2_FS_B, and FMC_D10 alternate functions. |-| 56 | PE14 | bidirectional | GPIO port E pin 14 with 5V tolerant I/O supporting TIM1_CH4, SPI4_MOSI, SAI2_MCLK_B, and FMC_D11 alternate functions. |-| 57 | PE15 | bidirectional | GPIO port E pin 15 with 5V tolerant I/O supporting TIM1_BKIN and FMC_D12 alternate functions. |-| 58 | PB10 | bidirectional | GPIO port B pin 10 with 5V tolerant I/O supporting TIM2_CH3, I2C2_SCL, SPI2/I2S2_CK, SAI1_SCK_A, USART3_TX, and OTG_HS_ULPI_D3 alternate functions. |-| 59 | PB11 | bidirectional | GPIO port B pin 11 with 5V tolerant I/O supporting TIM2_CH4, I2C2_SDA, USART3_RX, and SAI2_SD_A alternate functions. |-| 60 | VCAP_1 | passive | Capacitor connection pin for internal voltage regulator, connect 100 nF capacitor between VCAP_1 and ground. |-| 61 | VSS | power_in | Ground supply pin, reference potential for all circuits. |-| 62 | VDD | power_in | Supply input pin, accepts 1.7 to 3.6 V for main digital I/O supply. |-| 63 | PB12 | bidirectional | GPIO port B pin 12 with 5V tolerant I/O supporting TIM1_BKIN, I2C2_SMBA, SPI2/I2S2_WS, SAI1_SCK_B, USART3_CK, CAN2_RX, and OTG_HS_ULPI_D5/OTG_HS_ID alternate functions. |-| 64 | PB13 | bidirectional | GPIO port B pin 13 with 5V tolerant I/O supporting TIM1_CH1N, SPI2/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6 alternate functions and OTG_HS_VBUS input. |-| 65 | PB14 | bidirectional | GPIO port B pin 14 with 5V tolerant I/O powered by VDDUSB, supporting TIM1/TIM8_CH2N, SPI2_MISO, USART3_RTS, TIM12_CH1, and OTG_HS_DM alternate functions. |-| 66 | PB15 | bidirectional | GPIO port B pin 15 with 5V tolerant I/O powered by VDDUSB, supporting RTC_REFIN, TIM1/TIM8_CH3N, SPI2/I2S2_SD, TIM12_CH2, and OTG_HS_DP alternate functions. |-| 67 | PD8 | bidirectional | GPIO port D pin 8 with 5V tolerant I/O supporting USART3_TX, SPDIFRX_IN1, and FMC_D13 alternate functions. |-| 68 | PD9 | bidirectional | GPIO port D pin 9 with 5V tolerant I/O supporting USART3_RX and FMC_D14 alternate functions. |-| 69 | PD10 | bidirectional | GPIO port D pin 10 with 5V tolerant I/O supporting USART3_CK and FMC_D15 alternate functions. |-| 70 | PD11 | bidirectional | GPIO port D pin 11 with 5V tolerant I/O supporting FMPI2C1_SMBA, USART3_CTS, QUADSPI_BK1_IO0, SAI2_SD_A, and FMC_A16 alternate functions. |-| 71 | PD12 | bidirectional | GPIO port D pin 12 with 5V tolerant I/O and I2C FM+ option supporting TIM4_CH1, FMPI2C1_SCL, USART3_RTS, QUADSPI_BK1_IO1, SAI2_FS_A, and FMC_A17 alternate functions. |-| 72 | PD13 | bidirectional | GPIO port D pin 13 with 5V tolerant I/O and I2C FM+ option supporting TIM4_CH2, FMPI2C1_SDA, QUADSPI_BK1_IO3, SAI2_SCK_A, and FMC_A18 alternate functions. |-| 73 | VSS | power_in | Ground supply pin, reference potential for all circuits. |-| 74 | VDD | power_in | Supply input pin, accepts 1.7 to 3.6 V for main digital I/O supply. |-| 75 | PD14 | bidirectional | GPIO port D pin 14 with 5V tolerant I/O and I2C FM+ option supporting TIM4_CH3, FMPI2C1_SCL, SAI2_SCK_A, and FMC_D0 alternate functions. |-| 76 | PD15 | bidirectional | GPIO port D pin 15 with 5V tolerant I/O and I2C FM+ option supporting TIM4_CH4, FMPI2C1_SDA, and FMC_D1 alternate functions. |-| 77 | PG2 | bidirectional | GPIO port G pin 2 with 5V tolerant I/O supporting FMC_A12 alternate function. |-| 78 | PG3 | bidirectional | GPIO port G pin 3 with 5V tolerant I/O supporting FMC_A13 alternate function. |-| 79 | PG4 | bidirectional | GPIO port G pin 4 with 5V tolerant I/O supporting FMC_A14/FMC_BA0 alternate function. |-| 80 | PG5 | bidirectional | GPIO port G pin 5 with 5V tolerant I/O supporting FMC_A15/FMC_BA1 alternate function. |-| 81 | PG6 | bidirectional | GPIO port G pin 6 with 5V tolerant I/O supporting QUADSPI_BK1_NCS and DCMI_D12 alternate functions. |-| 82 | PG7 | bidirectional | GPIO port G pin 7 with 5V tolerant I/O supporting USART6_CK, FMC_INT, and DCMI_D13 alternate functions. |-| 83 | PG8 | bidirectional | GPIO port G pin 8 with 5V tolerant I/O supporting SPDIFRX_IN2, USART6_RTS, and FMC_SDCLK alternate functions. |-| 84 | VSS | power_in | Ground supply pin, reference potential for all circuits. |-| 85 | VDDUSB | power_in | USB supply input pin accepting 3.3 V or 3.0 V, provides power for USB OTG interfaces and pins PA11/PA12/PB14/PB15. |-| 86 | PC6 | bidirectional | GPIO port C pin 6 with 5V tolerant I/O and I2C FM+ option supporting TIM3/TIM8_CH1, FMPI2C1_SCL, I2S2_MCK, USART6_TX, SDIO_D6, and DCMI_D0 alternate functions. |-| 87 | PC7 | bidirectional | GPIO port C pin 7 with 5V tolerant I/O and I2C FM+ option supporting TIM3/TIM8_CH2, FMPI2C1_SDA, SPI2/I2S2_CK, I2S3_MCK, SPDIFRX_IN1, USART6_RX, SDIO_D7, and DCMI_D1 alternate functions. |-| 88 | PC8 | bidirectional | GPIO port C pin 8 with 5V tolerant I/O supporting TRACED0, TIM3/TIM8_CH3, UART5_RTS, USART6_CK, SDIO_D0, and DCMI_D2 alternate functions. |-| 89 | PC9 | bidirectional | GPIO port C pin 9 with 5V tolerant I/O supporting MCO2, TIM3/TIM8_CH4, I2C3_SDA, I2S_CKIN, UART5_CTS, QUADSPI_BK1_IO0, SDIO_D1, and DCMI_D3 alternate functions. |-| 90 | PA8 | bidirectional | GPIO port A pin 8 with 5V tolerant I/O supporting MCO1, TIM1_CH1, I2C3_SCL, USART1_CK, and OTG_FS_SOF alternate functions. |-| 91 | PA9 | bidirectional | GPIO port A pin 9 with 5V tolerant I/O supporting TIM1_CH2, I2C3_SMBA, SPI2/I2S2_CK, SAI1_SD_B, USART1_TX, DCMI_D0 alternate functions and OTG_FS_VBUS input. |-| 92 | PA10 | bidirectional | GPIO port A pin 10 with 5V tolerant I/O supporting TIM1_CH3, USART1_RX, OTG_FS_ID, and DCMI_D1 alternate functions. |-| 93 | PA11 | bidirectional | GPIO port A pin 11 with 5V tolerant I/O powered by VDDUSB, supporting TIM1_CH4, USART1_CTS, CAN1_RX, and OTG_FS_DM alternate functions. |-| 94 | PA12 | bidirectional | GPIO port A pin 12 with 5V tolerant I/O powered by VDDUSB, supporting TIM1_ETR, USART1_RTS, SAI2_FS_B, CAN1_TX, and OTG_FS_DP alternate functions. |-| 95 | PA13 | bidirectional | GPIO port A pin 13 with 5V tolerant I/O, reserved for JTAG test mode select (JTMS) and serial wire debug input/output (SWDIO) functions. |-| 96 | VCAP_2 | passive | Capacitor connection pin for internal voltage regulator, connect 100 nF capacitor between VCAP_2 and ground. |-| 97 | VSS | power_in | Ground supply pin, reference potential for all circuits. |-| 98 | VDD | power_in | Supply input pin, accepts 1.7 to 3.6 V for main digital I/O supply. |-| 99 | PA14 | bidirectional | GPIO port A pin 14 with 5V tolerant I/O, reserved for JTAG test clock (JTCK) and serial wire debug clock (SWCLK) functions. |-| 100 | PA15 | bidirectional | GPIO port A pin 15 with 5V tolerant I/O supporting JTDI, TIM2/TIM2_ETR, HDMI_CEC, SPI1/SPI3_NSS and I2S functions, UART4_RTS alternate functions. |+| 37 | PB2 | bidirectional | Dedicated BOOT1 pin for selecting boot mode during power-up or reset, also GPIO with 5V tolerant I/O supporting TIM2_CH4, SAI1_SD_A, SPI3/I2S3_SD, and QUADSPI_CLK alternate functions. |+| 38 | PE7 | bidirectional | GPIO port E pin 7 with 5V tolerant I/O supporting TIM1_ETR, UART5_RX, QUADSPI_BK2_IO0, and FMC_D4 alternate functions. |+| 39 | PE8 | bidirectional | GPIO port E pin 8 with 5V tolerant I/O supporting TIM1_CH1N, UART5_TX, QUADSPI_BK2_IO1, and FMC_D5 alternate functions. |+| 40 | PE9 | bidirectional | GPIO port E pin 9 with 5V tolerant I/O supporting TIM1_CH1, QUADSPI_BK2_IO2, and FMC_D6 alternate functions. |+| 41 | PE10 | bidirectional | GPIO port E pin 10 with 5V tolerant I/O supporting TIM1_CH2N, QUADSPI_BK2_IO3, and FMC_D7 alternate functions. |+| 42 | PE11 | bidirectional | GPIO port E pin 11 with 5V tolerant I/O supporting TIM1_CH2, SPI4_NSS, SAI2_SD_B, and FMC_D8 alternate functions. |+| 43 | PE12 | bidirectional | GPIO port E pin 12 with 5V tolerant I/O supporting TIM1_CH3N, SPI4_SCK, SAI2_SCK_B, and FMC_D9 alternate functions. |+| 44 | PE13 | bidirectional | GPIO port E pin 13 with 5V tolerant I/O supporting TIM1_CH3, SPI4_MISO, SAI2_FS_B, and FMC_D10 alternate functions. |+| 45 | PE14 | bidirectional | GPIO port E pin 14 with 5V tolerant I/O supporting TIM1_CH4, SPI4_MOSI, SAI2_MCLK_B, and FMC_D11 alternate functions. |+| 46 | PE15 | bidirectional | GPIO port E pin 15 with 5V tolerant I/O supporting TIM1_BKIN and FMC_D12 alternate functions. |+| 47 | PB10 | bidirectional | GPIO port B pin 10 with 5V tolerant I/O supporting TIM2_CH3, I2C2_SCL, SPI2/I2S2_CK, SAI1_SCK_A, USART3_TX, and OTG_HS_ULPI_D3 alternate functions. |+| 48 | VCAP_1 | power_in | Capacitor connection pin for internal voltage regulator, connect 100 nF capacitor between VCAP_1 and ground. |+| 49 | VSS | power_in | Ground supply pin, reference potential for all circuits. |+| 50 | VDD | power_in | Supply input pin, accepts 1.7 to 3.6 V for main digital I/O supply. |+| 51 | PB12 | bidirectional | GPIO port B pin 12 with 5V tolerant I/O supporting TIM1_BKIN, I2C2_SMBA, SPI2/I2S2_WS, SAI1_SCK_B, USART3_CK, CAN2_RX, and OTG_HS_ULPI_D5/OTG_HS_ID alternate functions. |+| 52 | PB13 | bidirectional | GPIO port B pin 13 with 5V tolerant I/O supporting TIM1_CH1N, SPI2/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6 alternate functions and OTG_HS_VBUS input. |+| 53 | PB14 | bidirectional | GPIO port B pin 14 with 5V tolerant I/O powered by VDDUSB, supporting TIM1/TIM8_CH2N, SPI2_MISO, USART3_RTS, TIM12_CH1, and OTG_HS_DM alternate functions. |+| 54 | PB15 | bidirectional | GPIO port B pin 15 with 5V tolerant I/O powered by VDDUSB, supporting RTC_REFIN, TIM1/TIM8_CH3N, SPI2/I2S2_SD, TIM12_CH2, and OTG_HS_DP alternate functions. |+| 55 | PD8 | bidirectional | GPIO port D pin 8 with 5V tolerant I/O supporting USART3_TX, SPDIFRX_IN1, and FMC_D13 alternate functions. |+| 56 | PD9 | bidirectional | GPIO port D pin 9 with 5V tolerant I/O supporting USART3_RX and FMC_D14 alternate functions. |+| 57 | PD10 | bidirectional | GPIO port D pin 10 with 5V tolerant I/O supporting USART3_CK and FMC_D15 alternate functions. |+| 58 | PD11 | bidirectional | GPIO port D pin 11 with 5V tolerant I/O supporting FMPI2C1_SMBA, USART3_CTS, QUADSPI_BK1_IO0, SAI2_SD_A, and FMC_A16 alternate functions. |+| 59 | PD12 | bidirectional | GPIO port D pin 12 with 5V tolerant I/O and I2C FM+ option supporting TIM4_CH1, FMPI2C1_SCL, USART3_RTS, QUADSPI_BK1_IO1, SAI2_FS_A, and FMC_A17 alternate functions. |+| 60 | PD13 | bidirectional | GPIO port D pin 13 with 5V tolerant I/O and I2C FM+ option supporting TIM4_CH2, FMPI2C1_SDA, QUADSPI_BK1_IO3, SAI2_SCK_A, and FMC_A18 alternate functions. |+| 61 | PD14 | bidirectional | GPIO port D pin 14 with 5V tolerant I/O and I2C FM+ option supporting TIM4_CH3, FMPI2C1_SCL, SAI2_SCK_A, and FMC_D0 alternate functions. |+| 62 | PD15 | bidirectional | GPIO port D pin 15 with 5V tolerant I/O and I2C FM+ option supporting TIM4_CH4, FMPI2C1_SDA, and FMC_D1 alternate functions. |+| 63 | PC6 | bidirectional | GPIO port C pin 6 with 5V tolerant I/O and I2C FM+ option supporting TIM3/TIM8_CH1, FMPI2C1_SCL, I2S2_MCK, USART6_TX, SDIO_D6, and DCMI_D0 alternate functions. |+| 64 | PC7 | bidirectional | GPIO port C pin 7 with 5V tolerant I/O and I2C FM+ option supporting TIM3/TIM8_CH2, FMPI2C1_SDA, SPI2/I2S2_CK, I2S3_MCK, SPDIFRX_IN1, USART6_RX, SDIO_D7, and DCMI_D1 alternate functions. |+| 65 | PC8 | bidirectional | GPIO port C pin 8 with 5V tolerant I/O supporting TRACED0, TIM3/TIM8_CH3, UART5_RTS, USART6_CK, SDIO_D0, and DCMI_D2 alternate functions. |+| 66 | PC9 | bidirectional | GPIO port C pin 9 with 5V tolerant I/O supporting MCO2, TIM3/TIM8_CH4, I2C3_SDA, I2S_CKIN, UART5_CTS, QUADSPI_BK1_IO0, SDIO_D1, and DCMI_D3 alternate functions. |+| 67 | PA8 | bidirectional | GPIO port A pin 8 with 5V tolerant I/O supporting MCO1, TIM1_CH1, I2C3_SCL, USART1_CK, and OTG_FS_SOF alternate functions. |+| 68 | PA9 | bidirectional | GPIO port A pin 9 with 5V tolerant I/O supporting TIM1_CH2, I2C3_SMBA, SPI2/I2S2_CK, SAI1_SD_B, USART1_TX, DCMI_D0 alternate functions and OTG_FS_VBUS input. |+| 69 | PA10 | bidirectional | GPIO port A pin 10 with 5V tolerant I/O supporting TIM1_CH3, USART1_RX, OTG_FS_ID, and DCMI_D1 alternate functions. |+| 70 | PA11 | bidirectional | GPIO port A pin 11 with 5V tolerant I/O powered by VDDUSB, supporting TIM1_CH4, USART1_CTS, CAN1_RX, and OTG_FS_DM alternate functions. |+| 71 | PA12 | bidirectional | GPIO port A pin 12 with 5V tolerant I/O powered by VDDUSB, supporting TIM1_ETR, USART1_RTS, SAI2_FS_B, CAN1_TX, and OTG_FS_DP alternate functions. |+| 72 | PA13 | bidirectional | GPIO port A pin 13 with 5V tolerant I/O, reserved for JTAG test mode select (JTMS) and serial wire debug input/output (SWDIO) functions. |+| 73 | VCAP_2 | power_in | Capacitor connection pin for internal voltage regulator, connect 100 nF capacitor between VCAP_2 and ground. |+| 74 | VSS | power_in | Ground supply pin, reference potential for all circuits. |+| 75 | VDD | power_in | Supply input pin, accepts 1.7 to 3.6 V for main digital I/O supply. |+| 76 | PA14 | bidirectional | GPIO port A pin 14 with 5V tolerant I/O, reserved for JTAG test clock (JTCK) and serial wire debug clock (SWCLK) functions. |+| 77 | PA15 | bidirectional | GPIO port A pin 15 with 5V tolerant I/O supporting JTDI, TIM2/TIM2_ETR, HDMI_CEC, SPI1/SPI3_NSS and I2S functions, UART4_RTS alternate functions. |+| 78 | PC10 | bidirectional | |+| 79 | PC11 | bidirectional | |+| 80 | PC12 | bidirectional | |+| 81 | PD0 | bidirectional | |+| 82 | PD1 | bidirectional | |+| 83 | PD2 | bidirectional | |+| 84 | PD3 | bidirectional | |+| 85 | PD4 | bidirectional | |+| 86 | PD5 | bidirectional | |+| 87 | PD6 | bidirectional | |+| 88 | PD7 | bidirectional | |+| 89 | PB3 | bidirectional | |+| 90 | PB4 | bidirectional | |+| 91 | PB5 | bidirectional | |+| 92 | PB6 | bidirectional | |+| 93 | PB7 | bidirectional | |+| 94 | BOOT0 | input | |+| 95 | PB8 | bidirectional | |+| 96 | PB9 | bidirectional | |+| 97 | PE0 | bidirectional | |+| 98 | PE1 | bidirectional | |+| 99 | VSS | power_in | Ground supply pin, reference potential for all circuits. |+| 100 | VDD | power_in | Supply input pin, accepts 1.7 to 3.6 V for main digital I/O supply. | ## Key specifications
package.json+2−2@@ -1,6 +1,6 @@ { "slug": "stm32f446vct6tr",- "version": "0.1.0",+ "version": "0.1.1", "type": "component", "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.", "tags": [@@ -685,4 +685,4 @@ "footprint": "viewers/footprint.html" } }-}+}
page.json+4−4@@ -4,7 +4,7 @@ "slug": "stm32f446vct6tr", "title": "STM32F446VCT6TR", "brief": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.1.1", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -712,7 +712,7 @@ "viewers/symbol.html", "viewers/footprint.html" ],- "visibility": {- "public": true- }+ "visibility": "public",+ "description": "STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.",+ "org": "adom" }
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direction="pwr" rot="R180"/>+ <pin name="PB2" x="-17.78" y="-30.48" length="middle" direction="io"/>+ <pin name="PE7" x="-17.78" y="-33.02" length="middle" direction="io"/>+ <pin name="PE8" x="-17.78" y="-35.56" length="middle" direction="io"/>+ <pin name="PE9" x="-17.78" y="-38.1" length="middle" direction="io"/>+ <pin name="PE10" x="-17.78" y="-40.64" length="middle" direction="io"/>+ <pin name="PE11" x="-17.78" y="-43.18" length="middle" direction="io"/>+ <pin name="PE12" x="-17.78" y="-45.72" length="middle" direction="io"/>+ <pin name="PE13" x="-17.78" y="-48.26" length="middle" direction="io"/>+ <pin name="PE14" x="-17.78" y="-50.8" length="middle" direction="io"/>+ <pin name="PE15" x="-17.78" y="-53.34" length="middle" direction="io"/>+ <pin name="PB10" x="-17.78" y="-55.88" length="middle" direction="io"/>+ <pin name="VCAP_1" x="-17.78" y="-58.42" length="middle" direction="pwr"/>+ <pin name="VSS@3" x="-17.78" y="-60.96" length="middle" direction="pwr"/>+ <pin name="VDD@4" x="-17.78" y="-63.5" length="middle" direction="pwr"/>+ <pin name="VDD@5" x="17.78" y="60.96" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@4" x="17.78" y="58.42" length="middle" direction="pwr" rot="R180"/>+ <pin name="PE1" x="17.78" y="55.88" length="middle" direction="io" rot="R180"/>+ <pin name="PE0" x="17.78" y="53.34" length="middle" direction="io" rot="R180"/>+ <pin name="PB9" x="17.78" y="50.8" length="middle" direction="io" rot="R180"/>+ <pin name="PB8" x="17.78" y="48.26" length="middle" direction="io" rot="R180"/>+ <pin name="BOOT0" x="17.78" y="45.72" length="middle" direction="in" rot="R180"/>+ <pin name="PB7" x="17.78" y="43.18" length="middle" direction="io" rot="R180"/>+ <pin name="PB6" x="17.78" y="40.64" length="middle" direction="io" rot="R180"/>+ <pin name="PB5" x="17.78" y="38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PB4" x="17.78" y="35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PB3" x="17.78" y="33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PD7" x="17.78" y="30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PD6" x="17.78" y="27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PD5" x="17.78" y="25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PD4" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PD3" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PD2" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PD1" x="17.78" y="15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PD0" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PC12" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PC11" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>+ <pin name="PC10" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>+ <pin name="PA15" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>+ <pin name="PA14" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+ <pin name="VDD@6" x="17.78" y="-2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="VSS@5" x="17.78" y="-5.08" length="middle" direction="pwr" rot="R180"/>+ <pin name="VCAP_2" x="17.78" y="-7.62" length="middle" direction="pwr" rot="R180"/>+ <pin name="PA13" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+ <pin name="PA12" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>+ <pin name="PA11" x="17.78" y="-15.24" length="middle" direction="io" rot="R180"/>+ <pin name="PA10" x="17.78" y="-17.78" length="middle" direction="io" rot="R180"/>+ <pin name="PA9" x="17.78" y="-20.32" length="middle" direction="io" rot="R180"/>+ <pin name="PA8" x="17.78" y="-22.86" length="middle" direction="io" rot="R180"/>+ <pin name="PC9" x="17.78" y="-25.4" length="middle" direction="io" rot="R180"/>+ <pin name="PC8" x="17.78" y="-27.94" length="middle" direction="io" rot="R180"/>+ <pin name="PC7" x="17.78" y="-30.48" length="middle" direction="io" rot="R180"/>+ <pin name="PC6" x="17.78" y="-33.02" length="middle" direction="io" rot="R180"/>+ <pin name="PD15" x="17.78" y="-35.56" length="middle" direction="io" rot="R180"/>+ <pin name="PD14" x="17.78" y="-38.1" length="middle" direction="io" rot="R180"/>+ <pin name="PD13" x="17.78" y="-40.64" length="middle" direction="io" rot="R180"/>+ <pin name="PD12" x="17.78" y="-43.18" length="middle" direction="io" rot="R180"/>+ <pin name="PD11" x="17.78" y="-45.72" length="middle" direction="io" rot="R180"/>+ <pin name="PD10" x="17.78" y="-48.26" length="middle" direction="io" rot="R180"/>+ <pin name="PD9" x="17.78" y="-50.8" length="middle" direction="io" rot="R180"/>+ <pin name="PD8" x="17.78" y="-53.34" length="middle" direction="io" rot="R180"/>+ <pin name="PB15" x="17.78" y="-55.88" length="middle" direction="io" rot="R180"/>+ <pin name="PB14" x="17.78" y="-58.42" length="middle" direction="io" rot="R180"/>+ <pin name="PB13" x="17.78" y="-60.96" length="middle" direction="io" rot="R180"/>+ <pin name="PB12" x="17.78" y="-63.5" length="middle" direction="io" rot="R180"/> </symbol> </symbols> <devicesets>@@ -334,70 +334,70 @@ <connect gate="G$1" pin="PC5" pad="34"/> <connect gate="G$1" pin="PB0" pad="35"/> <connect gate="G$1" pin="PB1" pad="36"/>- <connect gate="G$1" pin="PB2-BOOT1" pad="37"/>- <connect gate="G$1" pin="PF11" pad="38"/>- <connect gate="G$1" pin="PF12" pad="39"/>- <connect gate="G$1" pin="VSS@3" pad="40"/>- <connect gate="G$1" pin="VDD@4" pad="41"/>- <connect gate="G$1" pin="PF13" pad="42"/>- <connect gate="G$1" pin="PF14" pad="43"/>- <connect gate="G$1" pin="PF15" pad="44"/>- <connect gate="G$1" pin="PG0" pad="45"/>- <connect gate="G$1" pin="PG1" pad="46"/>- <connect gate="G$1" pin="PE7" pad="47"/>- <connect gate="G$1" pin="PE8" pad="48"/>- <connect gate="G$1" pin="PE9" pad="49"/>- <connect gate="G$1" pin="VSS@4" pad="50"/>- <connect gate="G$1" pin="PA15" pad="100"/>- <connect gate="G$1" pin="PA14" pad="99"/>- <connect gate="G$1" pin="VDD@5" pad="98"/>- <connect gate="G$1" pin="VSS@5" pad="97"/>- <connect gate="G$1" pin="VCAP_2" pad="96"/>- <connect gate="G$1" pin="PA13" pad="95"/>- <connect gate="G$1" pin="PA12" pad="94"/>- <connect gate="G$1" pin="PA11" pad="93"/>- <connect gate="G$1" pin="PA10" pad="92"/>- <connect gate="G$1" pin="PA9" pad="91"/>- <connect gate="G$1" pin="PA8" pad="90"/>- <connect gate="G$1" pin="PC9" pad="89"/>- <connect gate="G$1" pin="PC8" pad="88"/>- <connect gate="G$1" pin="PC7" pad="87"/>- <connect gate="G$1" pin="PC6" pad="86"/>- <connect gate="G$1" pin="VDDUSB" pad="85"/>- <connect gate="G$1" pin="VSS@6" pad="84"/>- <connect gate="G$1" pin="PG8" pad="83"/>- <connect gate="G$1" pin="PG7" pad="82"/>- <connect gate="G$1" pin="PG6" pad="81"/>- <connect gate="G$1" pin="PG5" pad="80"/>- <connect gate="G$1" pin="PG4" pad="79"/>- <connect gate="G$1" pin="PG3" pad="78"/>- <connect gate="G$1" pin="PG2" pad="77"/>- <connect gate="G$1" pin="PD15" pad="76"/>- <connect gate="G$1" pin="PD14" pad="75"/>- <connect gate="G$1" pin="VDD@6" pad="74"/>- <connect gate="G$1" pin="VSS@7" pad="73"/>- <connect gate="G$1" pin="PD13" pad="72"/>- <connect gate="G$1" pin="PD12" pad="71"/>- <connect gate="G$1" pin="PD11" pad="70"/>- <connect gate="G$1" pin="PD10" pad="69"/>- <connect gate="G$1" pin="PD9" pad="68"/>- <connect gate="G$1" pin="PD8" pad="67"/>- <connect gate="G$1" pin="PB15" pad="66"/>- <connect gate="G$1" pin="PB14" pad="65"/>- <connect gate="G$1" pin="PB13" pad="64"/>- <connect gate="G$1" pin="PB12" pad="63"/>- <connect gate="G$1" pin="VDD@7" pad="62"/>- <connect gate="G$1" pin="VSS@8" pad="61"/>- <connect gate="G$1" pin="VCAP_1" pad="60"/>- <connect gate="G$1" pin="PB11" pad="59"/>- <connect gate="G$1" pin="PB10" pad="58"/>- <connect gate="G$1" pin="PE15" pad="57"/>- <connect gate="G$1" pin="PE14" pad="56"/>- <connect gate="G$1" pin="PE13" pad="55"/>- <connect gate="G$1" pin="PE12" pad="54"/>- <connect gate="G$1" pin="PE11" pad="53"/>- <connect gate="G$1" pin="PE10" pad="52"/>- <connect gate="G$1" pin="VDD@8" pad="51"/>+ <connect gate="G$1" pin="PB2" pad="37"/>+ <connect gate="G$1" pin="PE7" pad="38"/>+ <connect gate="G$1" pin="PE8" pad="39"/>+ <connect gate="G$1" pin="PE9" pad="40"/>+ <connect gate="G$1" pin="PE10" pad="41"/>+ <connect gate="G$1" pin="PE11" pad="42"/>+ <connect gate="G$1" pin="PE12" pad="43"/>+ <connect gate="G$1" pin="PE13" pad="44"/>+ <connect gate="G$1" pin="PE14" pad="45"/>+ <connect gate="G$1" pin="PE15" pad="46"/>+ <connect gate="G$1" pin="PB10" pad="47"/>+ <connect gate="G$1" pin="VCAP_1" pad="48"/>+ <connect gate="G$1" pin="VSS@3" pad="49"/>+ <connect gate="G$1" pin="VDD@4" pad="50"/>+ <connect gate="G$1" pin="VDD@5" pad="100"/>+ <connect gate="G$1" pin="VSS@4" pad="99"/>+ <connect gate="G$1" pin="PE1" pad="98"/>+ <connect gate="G$1" pin="PE0" pad="97"/>+ <connect gate="G$1" pin="PB9" pad="96"/>+ <connect gate="G$1" pin="PB8" pad="95"/>+ <connect gate="G$1" pin="BOOT0" pad="94"/>+ <connect gate="G$1" pin="PB7" pad="93"/>+ <connect gate="G$1" pin="PB6" pad="92"/>+ <connect gate="G$1" pin="PB5" pad="91"/>+ <connect gate="G$1" pin="PB4" pad="90"/>+ <connect gate="G$1" pin="PB3" pad="89"/>+ <connect gate="G$1" pin="PD7" pad="88"/>+ <connect gate="G$1" pin="PD6" pad="87"/>+ <connect gate="G$1" pin="PD5" pad="86"/>+ <connect gate="G$1" pin="PD4" pad="85"/>+ <connect gate="G$1" pin="PD3" pad="84"/>+ <connect gate="G$1" pin="PD2" pad="83"/>+ <connect gate="G$1" pin="PD1" pad="82"/>+ <connect gate="G$1" pin="PD0" pad="81"/>+ <connect gate="G$1" pin="PC12" pad="80"/>+ <connect gate="G$1" pin="PC11" pad="79"/>+ <connect gate="G$1" pin="PC10" pad="78"/>+ <connect gate="G$1" pin="PA15" pad="77"/>+ <connect gate="G$1" pin="PA14" pad="76"/>+ <connect gate="G$1" pin="VDD@6" pad="75"/>+ <connect gate="G$1" pin="VSS@5" pad="74"/>+ <connect gate="G$1" pin="VCAP_2" pad="73"/>+ <connect gate="G$1" pin="PA13" pad="72"/>+ <connect gate="G$1" pin="PA12" pad="71"/>+ <connect gate="G$1" pin="PA11" pad="70"/>+ <connect gate="G$1" pin="PA10" pad="69"/>+ <connect gate="G$1" pin="PA9" pad="68"/>+ <connect gate="G$1" pin="PA8" pad="67"/>+ <connect gate="G$1" pin="PC9" pad="66"/>+ <connect gate="G$1" pin="PC8" pad="65"/>+ <connect gate="G$1" pin="PC7" pad="64"/>+ <connect gate="G$1" pin="PC6" pad="63"/>+ <connect gate="G$1" pin="PD15" pad="62"/>+ <connect gate="G$1" pin="PD14" pad="61"/>+ <connect gate="G$1" pin="PD13" pad="60"/>+ <connect gate="G$1" pin="PD12" pad="59"/>+ <connect gate="G$1" pin="PD11" pad="58"/>+ <connect gate="G$1" pin="PD10" pad="57"/>+ <connect gate="G$1" pin="PD9" pad="56"/>+ <connect gate="G$1" pin="PD8" pad="55"/>+ <connect gate="G$1" pin="PB15" pad="54"/>+ <connect gate="G$1" pin="PB14" pad="53"/>+ <connect gate="G$1" pin="PB13" pad="52"/>+ <connect gate="G$1" pin="PB12" pad="51"/> </connects> <technologies> <technology name="">@@ -405,6 +405,8 @@ <attribute name="MANUFACTURER" value="STMicroelectronics" constant="no"/> <attribute name="DATASHEET" value="https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590271290918936576" constant="no"/> <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/stm32f446vct6tr" constant="no"/>+ <attribute name="MOUSER_PN" value="511-STM32F446VCT6TR" constant="no"/>+ <attribute name="DIGIKEY_PN" value="497-STM32F446VCT6TR-ND" constant="no"/> <attribute name="LCSC_PN" value="C3209519" constant="no"/> </technology> </technologies>