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Contents

README

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STM32F446VCT6TR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32F446VCT6TR from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional GPIO port E pin 2 with 5V tolerant I/O supporting TRACECLK, SPI4_SCK, SAI1_MCLK_A, QUADSPI_BK1_IO2, and FMC_A23 alternate functions.
2 PE3 bidirectional GPIO port E pin 3 with 5V tolerant I/O supporting TRACED0, SAI1_SD_B, and FMC_A19 alternate functions.
3 PE4 bidirectional GPIO port E pin 4 with 5V tolerant I/O supporting TRACED1, SPI4_NSS, SAI1_FS_A, FMC_A20, and DCMI_D4 alternate functions.
4 PE5 bidirectional GPIO port E pin 5 with 5V tolerant I/O supporting TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A, FMC_A21, and DCMI_D6 alternate functions.
5 PE6 bidirectional GPIO port E pin 6 with 5V tolerant I/O supporting TRACED3, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, FMC_A22, and DCMI_D7 alternate functions.
6 VBAT power_in Supply input pin for real-time clock and backup memory, accepts 1.7 to 3.6 V, referenced at 20×32 bit backup registers and optional 4 KB backup SRAM.
7 PC13 bidirectional GPIO port C pin 13 with 5V tolerant I/O supporting EVENTOUT and TAMP_1/WKUP1 alternate functions.
8 PC14-OSC32_IN bidirectional GPIO port C pin 14 with 5V tolerant I/O configured for 32 kHz oscillator input, supports EVENTOUT alternate function.
9 PC15-OSC32_OUT bidirectional GPIO port C pin 15 with 5V tolerant I/O configured for 32 kHz oscillator output, supports EVENTOUT alternate function.
10 VSS power_in Ground supply pin, reference potential for all circuits.
11 VDD power_in Supply input pin, accepts 1.7 to 3.6 V for main digital I/O supply.
12 PH0-OSC_IN bidirectional GPIO port H pin 0 with 5V tolerant I/O configured for main oscillator input with 4 to 26 MHz crystal capability.
13 PH1-OSC_OUT bidirectional GPIO port H pin 1 with 5V tolerant I/O configured for main oscillator output.
14 NRST input System reset input/output pin with weak pull-up resistor, detects external reset signals and triggers device reset.
15 PC0 bidirectional GPIO port C pin 0 with 5V tolerant I/O supporting SAI1_MCLK_B, OTG_HS_ULPI_STP, and FMC_SDNWE alternate functions.
16 PC1 bidirectional GPIO port C pin 1 with 5V tolerant I/O supporting SPI3/I2S3_SD, SAI1_SD_A, SPI2/I2S2_SD alternate functions.
17 PC2 bidirectional GPIO port C pin 2 with 5V tolerant I/O supporting SPI2_MISO, OTG_HS_ULPI_DIR, and FMC_SDNE0 alternate functions.
18 PC3 bidirectional GPIO port C pin 3 with 5V tolerant I/O supporting SPI2/I2S2_SD, OTG_HS_ULPI_NXT, and FMC_SDCKE0 alternate functions.
19 VDD power_in Supply input pin, accepts 1.7 to 3.6 V for main digital I/O supply.
20 VSSA power_in Analog ground supply pin, reference potential for analog circuits.
21 VREF+ power_in Reference voltage supply pin for analog functions including ADC, accepts 1.7 to 3.6 V.
22 VDDA power_in Analog supply input pin, accepts 1.7 to 3.6 V for analog circuit operation.
23 PA0-WKUP bidirectional GPIO port A pin 0 with 5V tolerant I/O, supports wakeup/external interrupt capability and TIM2/TIM5/TIM8 alternate functions.
24 PA1 bidirectional GPIO port A pin 1 with 5V tolerant I/O supporting TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3, and SAI2_MCLK_B alternate functions.
25 PA2 bidirectional GPIO port A pin 2 with 5V tolerant I/O supporting TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, and SAI2_SCK_B alternate functions.
26 PA3 bidirectional GPIO port A pin 3 with 5V tolerant I/O supporting TIM2_CH4, TIM5_CH4, TIM9_CH2, SAI1_FS_A, USART2_RX, and OTG_HS_ULPI_D0 alternate functions.
27 VSS power_in Ground supply pin, reference potential for all circuits.
28 VDD power_in Supply input pin, accepts 1.7 to 3.6 V for main digital I/O supply.
29 PA4 bidirectional GPIO port A pin 4 with 3.3V tolerant I/O directly connected to ADC, supports SPI1/I2S1_WS, SPI3/I2S3_WS, USART2_CK, OTG_HS_SOF, and DCMI_HSYNC alternate functions.
30 PA5 bidirectional GPIO port A pin 5 with 3.3V tolerant I/O directly connected to ADC, supports TIM2/TIM8_CH1N, SPI1_SCK/I2S1_CK, and OTG_HS_ULPI_CK alternate functions.
31 PA6 bidirectional GPIO port A pin 6 with 5V tolerant I/O supporting TIM1/TIM3/TIM8/TIM13 and SPI1_MISO alternate functions.
32 PA7 bidirectional GPIO port A pin 7 with 5V tolerant I/O supporting TIM1/TIM3/TIM8/TIM14 and SPI1/I2S1_SD alternate functions.
33 PC4 bidirectional GPIO port C pin 4 with 5V tolerant I/O supporting I2S1_MCK, SPDIFRX_IN2, and FMC_SDNE0 alternate functions.
34 PC5 bidirectional GPIO port C pin 5 with 5V tolerant I/O supporting USART3_RX, SPDIFRX_IN3, and FMC_SDCKE0 alternate functions.
35 PB0 bidirectional GPIO port B pin 0 with 5V tolerant I/O supporting TIM1/TIM3/TIM8, SPI3/I2S3_SD, UART4_CTS, OTG_HS_ULPI_D1, and SDIO_D1 alternate functions.
36 PB1 bidirectional GPIO port B pin 1 with 5V tolerant I/O supporting TIM1/TIM3/TIM8, OTG_HS_ULPI_D2, and SDIO_D2 alternate functions.
37 PB2 bidirectional Dedicated BOOT1 pin for selecting boot mode during power-up or reset, also GPIO with 5V tolerant I/O supporting TIM2_CH4, SAI1_SD_A, SPI3/I2S3_SD, and QUADSPI_CLK alternate functions.
38 PE7 bidirectional GPIO port E pin 7 with 5V tolerant I/O supporting TIM1_ETR, UART5_RX, QUADSPI_BK2_IO0, and FMC_D4 alternate functions.
39 PE8 bidirectional GPIO port E pin 8 with 5V tolerant I/O supporting TIM1_CH1N, UART5_TX, QUADSPI_BK2_IO1, and FMC_D5 alternate functions.
40 PE9 bidirectional GPIO port E pin 9 with 5V tolerant I/O supporting TIM1_CH1, QUADSPI_BK2_IO2, and FMC_D6 alternate functions.
41 PE10 bidirectional GPIO port E pin 10 with 5V tolerant I/O supporting TIM1_CH2N, QUADSPI_BK2_IO3, and FMC_D7 alternate functions.
42 PE11 bidirectional GPIO port E pin 11 with 5V tolerant I/O supporting TIM1_CH2, SPI4_NSS, SAI2_SD_B, and FMC_D8 alternate functions.
43 PE12 bidirectional GPIO port E pin 12 with 5V tolerant I/O supporting TIM1_CH3N, SPI4_SCK, SAI2_SCK_B, and FMC_D9 alternate functions.
44 PE13 bidirectional GPIO port E pin 13 with 5V tolerant I/O supporting TIM1_CH3, SPI4_MISO, SAI2_FS_B, and FMC_D10 alternate functions.
45 PE14 bidirectional GPIO port E pin 14 with 5V tolerant I/O supporting TIM1_CH4, SPI4_MOSI, SAI2_MCLK_B, and FMC_D11 alternate functions.
46 PE15 bidirectional GPIO port E pin 15 with 5V tolerant I/O supporting TIM1_BKIN and FMC_D12 alternate functions.
47 PB10 bidirectional GPIO port B pin 10 with 5V tolerant I/O supporting TIM2_CH3, I2C2_SCL, SPI2/I2S2_CK, SAI1_SCK_A, USART3_TX, and OTG_HS_ULPI_D3 alternate functions.
48 VCAP_1 power_in Capacitor connection pin for internal voltage regulator, connect 100 nF capacitor between VCAP_1 and ground.
49 VSS power_in Ground supply pin, reference potential for all circuits.
50 VDD power_in Supply input pin, accepts 1.7 to 3.6 V for main digital I/O supply.
51 PB12 bidirectional GPIO port B pin 12 with 5V tolerant I/O supporting TIM1_BKIN, I2C2_SMBA, SPI2/I2S2_WS, SAI1_SCK_B, USART3_CK, CAN2_RX, and OTG_HS_ULPI_D5/OTG_HS_ID alternate functions.
52 PB13 bidirectional GPIO port B pin 13 with 5V tolerant I/O supporting TIM1_CH1N, SPI2/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6 alternate functions and OTG_HS_VBUS input.
53 PB14 bidirectional GPIO port B pin 14 with 5V tolerant I/O powered by VDDUSB, supporting TIM1/TIM8_CH2N, SPI2_MISO, USART3_RTS, TIM12_CH1, and OTG_HS_DM alternate functions.
54 PB15 bidirectional GPIO port B pin 15 with 5V tolerant I/O powered by VDDUSB, supporting RTC_REFIN, TIM1/TIM8_CH3N, SPI2/I2S2_SD, TIM12_CH2, and OTG_HS_DP alternate functions.
55 PD8 bidirectional GPIO port D pin 8 with 5V tolerant I/O supporting USART3_TX, SPDIFRX_IN1, and FMC_D13 alternate functions.
56 PD9 bidirectional GPIO port D pin 9 with 5V tolerant I/O supporting USART3_RX and FMC_D14 alternate functions.
57 PD10 bidirectional GPIO port D pin 10 with 5V tolerant I/O supporting USART3_CK and FMC_D15 alternate functions.
58 PD11 bidirectional GPIO port D pin 11 with 5V tolerant I/O supporting FMPI2C1_SMBA, USART3_CTS, QUADSPI_BK1_IO0, SAI2_SD_A, and FMC_A16 alternate functions.
59 PD12 bidirectional GPIO port D pin 12 with 5V tolerant I/O and I2C FM+ option supporting TIM4_CH1, FMPI2C1_SCL, USART3_RTS, QUADSPI_BK1_IO1, SAI2_FS_A, and FMC_A17 alternate functions.
60 PD13 bidirectional GPIO port D pin 13 with 5V tolerant I/O and I2C FM+ option supporting TIM4_CH2, FMPI2C1_SDA, QUADSPI_BK1_IO3, SAI2_SCK_A, and FMC_A18 alternate functions.
61 PD14 bidirectional GPIO port D pin 14 with 5V tolerant I/O and I2C FM+ option supporting TIM4_CH3, FMPI2C1_SCL, SAI2_SCK_A, and FMC_D0 alternate functions.
62 PD15 bidirectional GPIO port D pin 15 with 5V tolerant I/O and I2C FM+ option supporting TIM4_CH4, FMPI2C1_SDA, and FMC_D1 alternate functions.
63 PC6 bidirectional GPIO port C pin 6 with 5V tolerant I/O and I2C FM+ option supporting TIM3/TIM8_CH1, FMPI2C1_SCL, I2S2_MCK, USART6_TX, SDIO_D6, and DCMI_D0 alternate functions.
64 PC7 bidirectional GPIO port C pin 7 with 5V tolerant I/O and I2C FM+ option supporting TIM3/TIM8_CH2, FMPI2C1_SDA, SPI2/I2S2_CK, I2S3_MCK, SPDIFRX_IN1, USART6_RX, SDIO_D7, and DCMI_D1 alternate functions.
65 PC8 bidirectional GPIO port C pin 8 with 5V tolerant I/O supporting TRACED0, TIM3/TIM8_CH3, UART5_RTS, USART6_CK, SDIO_D0, and DCMI_D2 alternate functions.
66 PC9 bidirectional GPIO port C pin 9 with 5V tolerant I/O supporting MCO2, TIM3/TIM8_CH4, I2C3_SDA, I2S_CKIN, UART5_CTS, QUADSPI_BK1_IO0, SDIO_D1, and DCMI_D3 alternate functions.
67 PA8 bidirectional GPIO port A pin 8 with 5V tolerant I/O supporting MCO1, TIM1_CH1, I2C3_SCL, USART1_CK, and OTG_FS_SOF alternate functions.
68 PA9 bidirectional GPIO port A pin 9 with 5V tolerant I/O supporting TIM1_CH2, I2C3_SMBA, SPI2/I2S2_CK, SAI1_SD_B, USART1_TX, DCMI_D0 alternate functions and OTG_FS_VBUS input.
69 PA10 bidirectional GPIO port A pin 10 with 5V tolerant I/O supporting TIM1_CH3, USART1_RX, OTG_FS_ID, and DCMI_D1 alternate functions.
70 PA11 bidirectional GPIO port A pin 11 with 5V tolerant I/O powered by VDDUSB, supporting TIM1_CH4, USART1_CTS, CAN1_RX, and OTG_FS_DM alternate functions.
71 PA12 bidirectional GPIO port A pin 12 with 5V tolerant I/O powered by VDDUSB, supporting TIM1_ETR, USART1_RTS, SAI2_FS_B, CAN1_TX, and OTG_FS_DP alternate functions.
72 PA13 bidirectional GPIO port A pin 13 with 5V tolerant I/O, reserved for JTAG test mode select (JTMS) and serial wire debug input/output (SWDIO) functions.
73 VCAP_2 power_in Capacitor connection pin for internal voltage regulator, connect 100 nF capacitor between VCAP_2 and ground.
74 VSS power_in Ground supply pin, reference potential for all circuits.
75 VDD power_in Supply input pin, accepts 1.7 to 3.6 V for main digital I/O supply.
76 PA14 bidirectional GPIO port A pin 14 with 5V tolerant I/O, reserved for JTAG test clock (JTCK) and serial wire debug clock (SWCLK) functions.
77 PA15 bidirectional GPIO port A pin 15 with 5V tolerant I/O supporting JTDI, TIM2/TIM2_ETR, HDMI_CEC, SPI1/SPI3_NSS and I2S functions, UART4_RTS alternate functions.
78 PC10 bidirectional
79 PC11 bidirectional
80 PC12 bidirectional
81 PD0 bidirectional
82 PD1 bidirectional
83 PD2 bidirectional
84 PD3 bidirectional
85 PD4 bidirectional
86 PD5 bidirectional
87 PD6 bidirectional
88 PD7 bidirectional
89 PB3 bidirectional
90 PB4 bidirectional
91 PB5 bidirectional
92 PB6 bidirectional
93 PB7 bidirectional
94 BOOT0 input
95 PB8 bidirectional
96 PB9 bidirectional
97 PE0 bidirectional
98 PE1 bidirectional
99 VSS power_in Ground supply pin, reference potential for all circuits.
100 VDD power_in Supply input pin, accepts 1.7 to 3.6 V for main digital I/O supply.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32F446VCT6TR
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32f446vct6tr-etched.step / stm32f446vct6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f446vct6tr.step / stm32f446vct6tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (198 pp, sha256 3902cf9f939a0ef6, retrieved 2026-09-29, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF