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STM32F446RCT7
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32F446RCT7
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
STM32F446RCT7 from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Backup power supply input for the RTC, the 20x32-bit backup registers and the optional 4 KB backup SRAM. |
| 2 | PC13 | bidirectional | 5 V tolerant (FT) I/O with EVENTOUT, and the TAMP_1/WKUP1 tamper and wake-up function. |
| 3 | PC14-OSC32_IN | bidirectional | 5 V tolerant (FT) I/O that serves as the 32 kHz oscillator input OSC32_IN. |
| 4 | PC15-OSC32_OUT | bidirectional | 5 V tolerant (FT) I/O that serves as the 32 kHz oscillator output OSC32_OUT. |
| 5 | PH0-OSC_IN | bidirectional | 5 V tolerant (FT) I/O that serves as the 4-26 MHz crystal oscillator input OSC_IN. |
| 6 | PH1-OSC_OUT | bidirectional | 5 V tolerant (FT) I/O that serves as the 4-26 MHz crystal oscillator output OSC_OUT. |
| 7 | NRST | bidirectional | Bidirectional reset pin with a weak pull-up resistor (RST structure). |
| 8 | PC0 | bidirectional | 5 V tolerant (FT) I/O with ADC123_IN10 analog input; alternate functions include SAI1_MCLK_B, OTG_HS_ULPI_STP and FMC_SDNWE. |
| 9 | PC1 | bidirectional | 5 V tolerant (FT) I/O with ADC123_IN11 analog input; alternate functions include SPI3_MOSI/I2S3_SD, SAI1_SD_A and SPI2_MOSI/I2S2_SD. |
| 10 | PC2 | bidirectional | 5 V tolerant (FT) I/O with ADC123_IN12 analog input; alternate functions include SPI2_MISO, OTG_HS_ULPI_DIR and FMC_SDNE0. |
| 11 | PC3 | bidirectional | 5 V tolerant (FT) I/O with ADC123_IN13 analog input; alternate functions include SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT and FMC_SDCKE0. |
| 12 | VSSA | power_in | Analog ground pin (the LQFP64 figure labels this pin VSSA/VREF-). |
| 13 | VDDA | power_in | Analog supply pin (the LQFP64 figure labels this pin VDDA/VREF+). |
| 14 | PA0-WKUP | bidirectional | 5 V tolerant (FT) I/O with ADC123_IN0 analog input and WKUP0/TAMP_2 wake-up function; alternate functions include TIM2_CH1/TIM2_ETR and USART2_CTS. |
| 15 | PA1 | bidirectional | 5 V tolerant (FT) I/O with ADC123_IN1 analog input; alternate functions include TIM2_CH2, USART2_RTS and UART4_RX. |
| 16 | PA2 | bidirectional | 5 V tolerant (FT) I/O with ADC123_IN2 analog input; alternate functions include TIM2_CH3, TIM9_CH1 and USART2_TX. |
| 17 | PA3 | bidirectional | 5 V tolerant (FT) I/O with ADC123_IN3 analog input; alternate functions include TIM2_CH4, SAI1_FS_A and USART2_RX. |
| 18 | VSS | power_in | Digital ground pin. |
| 19 | VDD | power_in | Digital supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V. |
| 20 | PA4 | bidirectional | 3.3 V tolerant (TTa) I/O directly connected to the ADC, with ADC12_IN4 and DAC_OUT1 analog functions; alternate functions include SPI1_NSS/I2S1_WS and USART2_CK. |
| 21 | PA5 | bidirectional | 3.3 V tolerant (TTa) I/O directly connected to the ADC, with ADC12_IN5 and DAC_OUT2 analog functions; alternate functions include TIM2_CH1/TIM2_ETR and SPI1_SCK/I2S1_CK. |
| 22 | PA6 | bidirectional | 5 V tolerant (FT) I/O with ADC12_IN6 analog input; alternate functions include TIM1_BKIN, SPI1_MISO and DCMI_PIXCLK. |
| 23 | PA7 | bidirectional | 5 V tolerant (FT) I/O with ADC12_IN7 analog input; alternate functions include TIM1_CH1N, SPI1_MOSI/I2S1_SD and FMC_SDNWE. |
| 24 | PC4 | bidirectional | 5 V tolerant (FT) I/O with ADC12_IN14 analog input; alternate functions include I2S1_MCK, SPDIFRX_IN2 and FMC_SDNE0. |
| 25 | PC5 | bidirectional | 5 V tolerant (FT) I/O with ADC12_IN15 analog input; alternate functions include USART3_RX, SPDIFRX_IN3 and FMC_SDCKE0. |
| 26 | PB0 | bidirectional | 5 V tolerant (FT) I/O with ADC12_IN8 analog input; alternate functions include TIM1_CH2N, TIM3_CH3 and OTG_HS_ULPI_D1. |
| 27 | PB1 | bidirectional | 5 V tolerant (FT) I/O with ADC12_IN9 analog input; alternate functions include TIM1_CH3N, TIM3_CH4 and OTG_HS_ULPI_D2. |
| 28 | PB2-BOOT1 | bidirectional | 5 V tolerant (FT) I/O that is also the BOOT1 pin; alternate functions include TIM2_CH4, SAI1_SD_A and QUADSPI_CLK. |
| 29 | PB10 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include TIM2_CH3, I2C2_SCL and SPI2_SCK/I2S2_CK. |
| 30 | VCAP_1 | power_in | VCAP_1 pin for the external capacitor of the internal regulator supply domain (see section 6.3.2, VCAP_1 / VCAP_2 external capacitor). |
| 31 | VSS | power_in | Digital ground pin. |
| 32 | VDD | power_in | Digital supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V. |
| 33 | PB12 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include TIM1_BKIN, I2C2_SMBA and OTG_HS_ID. |
| 34 | PB13 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include TIM1_CH1N, SPI2_SCK/I2S2_CK and OTG_HS_ULPI_D6, with OTG_HS_VBUS as an additional function. |
| 35 | PB14 | bidirectional | 5 V tolerant (FT) I/O supplied by VDDUSB; alternate functions include TIM1_CH2N, SPI2_MISO and OTG_HS_DM. |
| 36 | PB15 | bidirectional | 5 V tolerant (FT) I/O supplied by VDDUSB; alternate functions include RTC_REFIN, TIM1_CH3N and OTG_HS_DP. |
| 37 | PC6 | bidirectional | 5 V tolerant I/O with I2C FM+ option (FTf); alternate functions include TIM3_CH1, TIM8_CH1 and FMPI2C1_SCL. |
| 38 | PC7 | bidirectional | 5 V tolerant I/O with I2C FM+ option (FTf); alternate functions include TIM3_CH2, TIM8_CH2 and FMPI2C1_SDA. |
| 39 | PC8 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include TRACED0, TIM3_CH3 and SDIO_D0. |
| 40 | PC9 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include MCO2, TIM3_CH4 and I2C3_SDA. |
| 41 | PA8 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include MCO1, TIM1_CH1 and OTG_FS_SOF. |
| 42 | PA9 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include TIM1_CH2, USART1_TX and DCMI_D0, with OTG_FS_VBUS as an additional function. |
| 43 | PA10 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include TIM1_CH3, USART1_RX and OTG_FS_ID. |
| 44 | PA11 | bidirectional | 5 V tolerant (FT) I/O supplied by VDDUSB; alternate functions include TIM1_CH4, USART1_CTS and OTG_FS_DM. |
| 45 | PA12 | bidirectional | 5 V tolerant (FT) I/O supplied by VDDUSB; alternate functions include TIM1_ETR, USART1_RTS and OTG_FS_DP. |
| 46 | PA13 | bidirectional | 5 V tolerant (FT) I/O that is the JTMS-SWDIO debug pin. |
| 47 | VSS | power_in | Digital ground pin. |
| 48 | VDD | power_in | Digital supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V. |
| 49 | PA14 | bidirectional | 5 V tolerant (FT) I/O that is the JTCK-SWCLK debug pin. |
| 50 | PA15 | bidirectional | 5 V tolerant (FT) I/O that is the JTDI debug pin; alternate functions include TIM2_CH1/TIM2_ETR, HDMI_CEC and SPI1_NSS/I2S1_WS. |
| 51 | PC10 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include SPI3_SCK/I2S3_CK, USART3_TX and UART4_TX. |
| 52 | PC11 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include SPI3_MISO, USART3_RX and UART4_RX. |
| 53 | PC12 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include I2C2_SDA, SPI3_MOSI/I2S3_SD and UART5_TX. |
| 54 | PD2 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include TIM3_ETR, UART5_RX and SDIO_CMD. |
| 55 | PB3 | bidirectional | 5 V tolerant (FT) I/O that is the JTDO/TRACESWO debug pin; alternate functions include TIM2_CH2 and I2C2_SDA. |
| 56 | PB4 | bidirectional | 5 V tolerant (FT) I/O that is the NJTRST debug pin; alternate functions include TIM3_CH1 and I2C3_SDA. |
| 57 | PB5 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include TIM3_CH2, I2C1_SMBA and SPI1_MOSI/I2S1_SD. |
| 58 | PB6 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include TIM4_CH1, I2C1_SCL and USART1_TX. |
| 59 | PB7 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include TIM4_CH2, I2C1_SDA and USART1_RX. |
| 60 | BOOT0 | input | Dedicated BOOT0 input pin (structure B) that also carries the VPP function. |
| 61 | PB8 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include TIM2_CH1/TIM2_ETR, TIM4_CH3 and I2C1_SCL. |
| 62 | PB9 | bidirectional | 5 V tolerant (FT) I/O; alternate functions include TIM2_CH2, TIM4_CH4 and I2C1_SDA. |
| 63 | VSS | power_in | Digital ground pin. |
| 64 | VDD | power_in | Digital supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
STM32F446RCT7 - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
stm32f446rct7-etched.step/stm32f446rct7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f446rct7.step/stm32f446rct7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (198 pp, sha256
3902cf9f939a0ef6, retrieved 2026-10-10, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).