# STM32F437ZIT7TR

**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-144(20x20)

STM32F437ZIT7TR from STMicroelectronics, in a LQFP-144(20x20). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TRACECLK, SPI4_SCK, SAI1_MCLK_A, ETH_MII_TXD3, FMC_A23 and EVENTOUT. |
| 2 | PE3 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TRACED0, SAI1_SD_B, FMC_A19 and EVENTOUT. |
| 3 | PE4 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TRACED1, SPI4_NSS, SAI1_FS_A, FMC_A20, DCMI_D4, LCD_B0 and EVENTOUT. |
| 4 | PE5 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A, FMC_A21, DCMI_D6, LCD_G0 and EVENTOUT. |
| 5 | PE6 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TRACED3, TIM9_CH2, SPI4_MOSI, SAI1_SD_A, FMC_A22, DCMI_D7, LCD_G1 and EVENTOUT. |
| 6 | VBAT | power_in | Backup-domain supply for the RTC, the 20x32-bit backup registers and the optional 4 KB backup SRAM. |
| 7 | PC13 | bidirectional | 5 V-tolerant I/O (FT) supplied through the power switch, which sinks only 3 mA, so output use is limited to 2 MHz at 30 pF and it must not source current such as an LED drive; additional function TAMP_1. |
| 8 | PC14-OSC32_IN | bidirectional | I/O supplied through the power switch (3 mA limit, 2 MHz at 30 pF max output use, no current sourcing), 5 V-tolerant except in oscillator mode, with OSC32_IN as additional function. |
| 9 | PC15-OSC32_OUT | bidirectional | I/O supplied through the power switch (3 mA limit, 2 MHz at 30 pF max output use, no current sourcing), 5 V-tolerant except in oscillator mode, with OSC32_OUT as additional function. |
| 10 | PF0 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions I2C2_SDA, FMC_A0 and EVENTOUT. |
| 11 | PF1 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions I2C2_SCL, FMC_A1 and EVENTOUT. |
| 12 | PF2 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions I2C2_SMBA, FMC_A2 and EVENTOUT. |
| 13 | PF3 | bidirectional | I/O (FT, 5 V-tolerant except in analog mode) with alternate function FMC_A3 and EVENTOUT, and additional function ADC3_IN9. |
| 14 | PF4 | bidirectional | I/O (FT, 5 V-tolerant except in analog mode) with alternate function FMC_A4 and EVENTOUT, and additional function ADC3_IN14. |
| 15 | PF5 | bidirectional | I/O (FT, 5 V-tolerant except in analog mode) with alternate function FMC_A5 and EVENTOUT, and additional function ADC3_IN15. |
| 16 | VSS | power_in | Ground pin for the device. |
| 17 | VDD | power_in | Supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V. |
| 18 | PF6 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM10_CH1, SPI5_NSS, SAI1_SD_B, UART7_Rx, FMC_NIORD and EVENTOUT, and additional function ADC3_IN4. |
| 19 | PF7 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM11_CH1, SPI5_SCK, SAI1_MCLK_B, UART7_Tx, FMC_NREG and EVENTOUT, and additional function ADC3_IN5. |
| 20 | PF8 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI5_MISO, SAI1_SCK_B, TIM13_CH1, FMC_NIOWR and EVENTOUT, and additional function ADC3_IN6. |
| 21 | PF9 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI5_MOSI, SAI1_FS_B, TIM14_CH1, FMC_CD and EVENTOUT, and additional function ADC3_IN7. |
| 22 | PF10 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions FMC_INTR, DCMI_D11, LCD_DE and EVENTOUT, and additional function ADC3_IN8. |
| 23 | PH0-OSC_IN | bidirectional | 5 V-tolerant I/O (FT) except in oscillator mode, with EVENTOUT as alternate function and OSC_IN as additional function. |
| 24 | PH1-OSC_OUT | bidirectional | 5 V-tolerant I/O (FT) except in oscillator mode, with EVENTOUT as alternate function and OSC_OUT as additional function. |
| 25 | NRST | bidirectional | Bidirectional reset pin with a weak pull-up resistor. |
| 26 | PC0 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions OTG_HS_ULPI_STP, FMC_SDNWE and EVENTOUT, and additional function ADC123_IN10. |
| 27 | PC1 | bidirectional | 5 V-tolerant I/O (FT) with alternate function ETH_MDC and EVENTOUT, and additional function ADC123_IN11. |
| 28 | PC2 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI2_MISO, I2S2ext_SD, OTG_HS_ULPI_DIR, ETH_MII_TXD2, FMC_SDNE0 and EVENTOUT, and additional function ADC123_IN12. |
| 29 | PC3 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, FMC_SDCKE0 and EVENTOUT, and additional function ADC123_IN13. |
| 30 | VDD | power_in | Supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V. |
| 31 | VSSA | power_in | Analog ground pin for the analog peripherals. |
| 32 | VREF+ | power_in | Positive reference voltage pin for the ADC, which may be connected to VDDA as shown in the reference decoupling schemes. |
| 33 | VDDA | power_in | Analog supply pin for the analog peripherals. |
| 34 | PA0-WKUP | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, ETH_MII_CRS and EVENTOUT, and additional function ADC123_IN0/WKUP. |
| 35 | PA1 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX, ETH_MII_RX_CLK/ETH_RMII_REF_CLK and EVENTOUT, and additional function ADC123_IN1. |
| 36 | PA2 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX, ETH_MDIO and EVENTOUT, and additional function ADC123_IN2. |
| 37 | PA3 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, OTG_HS_ULPI_D0, ETH_MII_COL, LCD_B5 and EVENTOUT, and additional function ADC123_IN3. |
| 38 | VSS | power_in | Ground pin for the device. |
| 39 | VDD | power_in | Supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V. |
| 40 | PA4 | bidirectional | 3.3 V-tolerant I/O (TTa) directly connected to the ADC, with alternate functions SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, OTG_HS_SOF, DCMI_HSYNC, LCD_VSYNC and EVENTOUT, and additional functions ADC12_IN4/DAC_OUT1. |
| 41 | PA5 | bidirectional | 3.3 V-tolerant I/O (TTa) directly connected to the ADC, with alternate functions TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK, OTG_HS_ULPI_CK and EVENTOUT, and additional functions ADC12_IN5/DAC_OUT2. |
| 42 | PA6 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM13_CH1, DCMI_PIXCLK, LCD_G2 and EVENTOUT, and additional function ADC12_IN6. |
| 43 | PA7 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM14_CH1, ETH_MII_RX_DV/ETH_RMII_CRS_DV and EVENTOUT, and additional function ADC12_IN7. |
| 44 | PC4 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions ETH_MII_RXD0/ETH_RMII_RXD0 and EVENTOUT, and additional function ADC12_IN14. |
| 45 | PC5 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions ETH_MII_RXD1/ETH_RMII_RXD1 and EVENTOUT, and additional function ADC12_IN15. |
| 46 | PB0 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH2N, TIM3_CH3, TIM8_CH2N, LCD_R3, OTG_HS_ULPI_D1, ETH_MII_RXD2 and EVENTOUT, and additional function ADC12_IN8. |
| 47 | PB1 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH3N, TIM3_CH4, TIM8_CH3N, LCD_R6, OTG_HS_ULPI_D2, ETH_MII_RXD3 and EVENTOUT, and additional function ADC12_IN9. |
| 48 | PB2-BOOT1 | bidirectional | 5 V-tolerant I/O (FT) listed under the printed name PB2-BOOT1, with EVENTOUT as its alternate function. |
| 49 | PF11 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI5_MOSI, FMC_SDNRAS, DCMI_D12 and EVENTOUT. |
| 50 | PF12 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions FMC_A6 and EVENTOUT. |
| 51 | VSS | power_in | Ground pin for the device. |
| 52 | VDD | power_in | Supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V. |
| 53 | PF13 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions FMC_A7 and EVENTOUT. |
| 54 | PF14 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions FMC_A8 and EVENTOUT. |
| 55 | PF15 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions FMC_A9 and EVENTOUT. |
| 56 | PG0 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions FMC_A10 and EVENTOUT. |
| 57 | PG1 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions FMC_A11 and EVENTOUT. |
| 58 | PE7 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_ETR, UART7_Rx, FMC_D4 and EVENTOUT. |
| 59 | PE8 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH1N, UART7_Tx, FMC_D5 and EVENTOUT. |
| 60 | PE9 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH1, FMC_D6 and EVENTOUT. |
| 61 | VSS | power_in | Ground pin for the device. |
| 62 | VDD | power_in | Supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V. |
| 63 | PE10 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH2N, FMC_D7 and EVENTOUT. |
| 64 | PE11 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH2, SPI4_NSS, FMC_D8, LCD_G3 and EVENTOUT. |
| 65 | PE12 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH3N, SPI4_SCK, FMC_D9, LCD_B4 and EVENTOUT. |
| 66 | PE13 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH3, SPI4_MISO, FMC_D10, LCD_DE and EVENTOUT. |
| 67 | PE14 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH4, SPI4_MOSI, FMC_D11, LCD_CLK and EVENTOUT. |
| 68 | PE15 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_BKIN, FMC_D12, LCD_R7 and EVENTOUT. |
| 69 | PB10 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, USART3_TX, OTG_HS_ULPI_D3, ETH_MII_RX_ER, LCD_G4 and EVENTOUT. |
| 70 | PB11 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM2_CH4, I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN/ETH_RMII_TX_EN, LCD_G5 and EVENTOUT. |
| 71 | VCAP_1 | power_in | Internal voltage regulator decoupling pin VCAP_1 (supply type S in the pin table). |
| 72 | VDD | power_in | Supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V. |
| 73 | PB12 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0, OTG_HS_ID and EVENTOUT. |
| 74 | PB13 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH1N, SPI2_SCK/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1/ETH_RMII_TXD1 and EVENTOUT, and additional function OTG_HS_VBUS. |
| 75 | PB14 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH2N, TIM8_CH2N, SPI2_MISO, I2S2ext_SD, USART3_RTS, TIM12_CH1, OTG_HS_DM and EVENTOUT. |
| 76 | PB15 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI/I2S2_SD, TIM12_CH2, OTG_HS_DP and EVENTOUT. |
| 77 | PD8 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions USART3_TX, FMC_D13 and EVENTOUT. |
| 78 | PD9 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions USART3_RX, FMC_D14 and EVENTOUT. |
| 79 | PD10 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions USART3_CK, FMC_D15, LCD_B3 and EVENTOUT. |
| 80 | PD11 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions USART3_CTS, FMC_A16 and EVENTOUT. |
| 81 | PD12 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM4_CH1, USART3_RTS, FMC_A17 and EVENTOUT. |
| 82 | PD13 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM4_CH2, FMC_A18 and EVENTOUT. |
| 83 | VSS | power_in | Ground pin for the device. |
| 84 | VDD | power_in | Supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V. |
| 85 | PD14 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM4_CH3, FMC_D0 and EVENTOUT. |
| 86 | PD15 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM4_CH4, FMC_D1 and EVENTOUT. |
| 87 | PG2 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions FMC_A12 and EVENTOUT. |
| 88 | PG3 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions FMC_A13 and EVENTOUT. |
| 89 | PG4 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions FMC_A14/FMC_BA0 and EVENTOUT. |
| 90 | PG5 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions FMC_A15/FMC_BA1 and EVENTOUT. |
| 91 | PG6 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions FMC_INT2, DCMI_D12, LCD_R7 and EVENTOUT. |
| 92 | PG7 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions USART6_CK, FMC_INT3, DCMI_D13, LCD_CLK and EVENTOUT. |
| 93 | PG8 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI6_NSS, USART6_RTS, ETH_PPS_OUT, FMC_SDCLK and EVENTOUT. |
| 94 | VSS | power_in | Ground pin for the device. |
| 95 | VDD | power_in | Supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V. |
| 96 | PC6 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM3_CH1, TIM8_CH1, I2S2_MCK, USART6_TX, SDIO_D6, DCMI_D0, LCD_HSYNC and EVENTOUT. |
| 97 | PC7 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, SDIO_D7, DCMI_D1, LCD_G6 and EVENTOUT. |
| 98 | PC8 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM3_CH3, TIM8_CH3, USART6_CK, SDIO_D0, DCMI_D2 and EVENTOUT. |
| 99 | PC9 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, SDIO_D1, DCMI_D3 and EVENTOUT. |
| 100 | PA8 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions MCO1, TIM1_CH1, I2C3_SCL, USART1_CK, OTG_FS_SOF, LCD_R6 and EVENTOUT. |
| 101 | PA9 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH2, I2C3_SMBA, USART1_TX, DCMI_D0 and EVENTOUT, and additional function OTG_FS_VBUS. |
| 102 | PA10 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH3, USART1_RX, OTG_FS_ID, DCMI_D1 and EVENTOUT. |
| 103 | PA11 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH4, USART1_CTS, CAN1_RX, LCD_R4, OTG_FS_DM and EVENTOUT. |
| 104 | PA12 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_ETR, USART1_RTS, CAN1_TX, LCD_R5, OTG_FS_DP and EVENTOUT. |
| 105 | PA13 | bidirectional | 5 V-tolerant I/O (FT) whose printed function is JTMS-SWDIO, with EVENTOUT as alternate function. |
| 106 | VCAP_2 | power_in | Internal voltage regulator decoupling pin VCAP_2 (supply type S in the pin table). |
| 107 | VSS | power_in | Ground pin for the device. |
| 108 | VDD | power_in | Supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V. |
| 109 | PA14 | bidirectional | 5 V-tolerant I/O (FT) whose printed function is JTCK-SWCLK, with EVENTOUT as alternate function. |
| 110 | PA15 | bidirectional | 5 V-tolerant I/O (FT) whose printed function is JTDI, with alternate functions TIM2_CH1/TIM2_ETR, SPI1_NSS, SPI3_NSS/I2S3_WS and EVENTOUT. |
| 111 | PC10 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, SDIO_D2, DCMI_D8, LCD_R2 and EVENTOUT. |
| 112 | PC11 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions I2S3ext_SD, SPI3_MISO, USART3_RX, UART4_RX, SDIO_D3, DCMI_D4 and EVENTOUT. |
| 113 | PC12 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, SDIO_CK, DCMI_D9 and EVENTOUT. |
| 114 | PD0 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions CAN1_RX, FMC_D2 and EVENTOUT. |
| 115 | PD1 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions CAN1_TX, FMC_D3 and EVENTOUT. |
| 116 | PD2 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM3_ETR, UART5_RX, SDIO_CMD, DCMI_D11 and EVENTOUT. |
| 117 | PD3 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI2_SCK/I2S2_CK, USART2_CTS, FMC_CLK, DCMI_D5, LCD_G7 and EVENTOUT. |
| 118 | PD4 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions USART2_RTS, FMC_NOE and EVENTOUT. |
| 119 | PD5 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions USART2_TX, FMC_NWE and EVENTOUT. |
| 120 | VSS | power_in | Ground pin for the device. |
| 121 | VDD | power_in | Supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V. |
| 122 | PD6 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI3_MOSI/I2S3_SD, SAI1_SD_A, USART2_RX, FMC_NWAIT, DCMI_D10, LCD_B2 and EVENTOUT. |
| 123 | PD7 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions USART2_CK, FMC_NE1/FMC_NCE2 and EVENTOUT. |
| 124 | PG9 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions USART6_RX, FMC_NE2/FMC_NCE3, DCMI_VSYNC (available only on silicon revision 3) and EVENTOUT. |
| 125 | PG10 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions LCD_G3, FMC_NCE4_1/FMC_NE3, DCMI_D2, LCD_B2 and EVENTOUT. |
| 126 | PG11 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions ETH_MII_TX_EN/ETH_RMII_TX_EN, FMC_NCE4_2, DCMI_D3, LCD_B3 and EVENTOUT. |
| 127 | PG12 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI6_MISO, USART6_RTS, LCD_B4, FMC_NE4, LCD_B1 and EVENTOUT. |
| 128 | PG13 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI6_SCK, USART6_CTS, ETH_MII_TXD0/ETH_RMII_TXD0, FMC_A24 and EVENTOUT. |
| 129 | PG14 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI6_MOSI, USART6_TX, ETH_MII_TXD1/ETH_RMII_TXD1, FMC_A25 and EVENTOUT. |
| 130 | VSS | power_in | Ground pin for the device. |
| 131 | VDD | power_in | Supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V. |
| 132 | PG15 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions USART6_CTS, FMC_SDNCAS, DCMI_D13 and EVENTOUT. |
| 133 | PB3 | bidirectional | 5 V-tolerant I/O (FT) whose printed function is JTDO/TRACESWO, with alternate functions TIM2_CH2, SPI1_SCK, SPI3_SCK/I2S3_CK and EVENTOUT. |
| 134 | PB4 | bidirectional | 5 V-tolerant I/O (FT) whose printed function is NJTRST, with alternate functions TIM3_CH1, SPI1_MISO, SPI3_MISO, I2S3ext_SD and EVENTOUT. |
| 135 | PB5 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI/I2S3_SD, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1, DCMI_D10 and EVENTOUT. |
| 136 | PB6 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM4_CH1, I2C1_SCL, USART1_TX, CAN2_TX, FMC_SDNE1, DCMI_D5 and EVENTOUT. |
| 137 | PB7 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM4_CH2, I2C1_SDA, USART1_RX, FMC_NL, DCMI_VSYNC and EVENTOUT. |
| 138 | BOOT0 | input | Dedicated BOOT0 input pin (type B in Table 10), which also carries the VPP function. |
| 139 | PB8 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM4_CH3, TIM10_CH1, I2C1_SCL, CAN1_RX, ETH_MII_TXD3, SDIO_D4, DCMI_D6, LCD_B6 and EVENTOUT. |
| 140 | PB9 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM4_CH4, TIM11_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, CAN1_TX, SDIO_D5, DCMI_D7, LCD_B7 and EVENTOUT. |
| 141 | PE0 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM4_ETR, UART8_RX, FMC_NBL0, DCMI_D2 and EVENTOUT. |
| 142 | PE1 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions UART8_Tx, FMC_NBL1, DCMI_D3 and EVENTOUT. |
| 143 | PDR_ON | power_in | Power-down reset control pin (supply type S in Table 10), used with internal reset OFF as shown in Figure 7. |
| 144 | VDD | power_in | Supply pin; the application supply and I/Os operate from 1.7 V to 3.6 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-144(20x20) |
| Category | Embedded Processors & Controllers |
| Pins | 144 |

## CAD (KiCad official)

- Symbol: `STM32F437ZIT7TR`
- Footprint: `Package_QFP:LQFP-144_20x20mm_P0.5mm`
- 3D model: LQFP-144(20x20) (KiCad packages3D, STEP)
- 3D model files: `stm32f437zit7tr-etched.step` / `stm32f437zit7tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f437zit7tr.step` / `stm32f437zit7tr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588941639272304640) (241 pp, sha256 `2505988d88e7f454`, retrieved 2026-10-12, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stm32f437zit7tr-datasheet.pdf)