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STM32F437VIT6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32f437vit6factory-2.0.0extractor-text
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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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STM32F437VIT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32F437VIT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional GPIO port E pin 2, 5V tolerant I/O for trace clock, SPI4 SCK, SAI1 MCLK, Ethernet MII TXD3, FMC A23, or event output.
2 PE3 bidirectional GPIO port E pin 3, 5V tolerant I/O for trace data 0, SAI1 SD, or FMC A19.
3 PE4 bidirectional GPIO port E pin 4, 5V tolerant I/O for trace data 1, SPI4 NSS, SAI1 FS, FMC A20, DCMI D4, or LCD B0.
4 PE5 bidirectional GPIO port E pin 5, 5V tolerant I/O for trace data 2, TIM9 CH1, SPI4 MISO, SAI1 SCK, FMC A21, DCMI D6, or LCD G0.
5 PE6 bidirectional GPIO port E pin 6, 5V tolerant I/O for trace data 3, TIM9 CH2, SPI4 MOSI, SAI1 SD, FMC A22, DCMI D7, or LCD G1.
6 VBAT power_in VBAT supply pin for backup power domain, 1.7V to 3.6V range.
7 PC13 bidirectional GPIO port C pin 13, 5V tolerant I/O through power switch with 3 mA maximum current and 2 MHz speed limit, supports tamper 1 event.
8 PC14 bidirectional GPIO port C pin 14 / OSC32_IN, 5V tolerant I/O through power switch, 32 kHz oscillator input.
9 PC15 bidirectional GPIO port C pin 15 / OSC32_OUT, 5V tolerant I/O through power switch, 32 kHz oscillator output.
10 VSS power_in Ground pin for digital circuit.
11 VDD power_in Main 3.3V power supply pin, 1.7V to 3.6V operating range.
12 PH0 bidirectional GPIO port H pin 0 / OSC_IN, 5V tolerant I/O for main oscillator input with 4-26 MHz crystal frequency range.
13 PH1 bidirectional GPIO port H pin 1 / OSC_OUT, 5V tolerant I/O for main oscillator output.
14 NRST bidirectional Reset pin with weak internal pull-up, active low assertion triggers device reset.
15 PC0 bidirectional GPIO port C pin 0, 5V tolerant I/O for ADC123 IN10, OTG_HS ULPI STP, or FMC SDNWE.
16 PC1 bidirectional GPIO port C pin 1, 5V tolerant I/O for ADC123 IN11 or Ethernet MDC.
17 PC2 bidirectional GPIO port C pin 2, 5V tolerant I/O for ADC123 IN12, SPI2 MISO, OTG_HS ULPI DIR, Ethernet MII TXD2, or FMC SDNE0.
18 PC3 bidirectional GPIO port C pin 3, 5V tolerant I/O for ADC123 IN13, SPI2 MOSI, OTG_HS ULPI NXT, Ethernet MII TX_CLK, or FMC SDCKE0.
19 VDD power_in Main 3.3V power supply pin, 1.7V to 3.6V operating range.
20 VSSA power_in Analog ground reference pin for ADC/DAC circuits.
21 VREF+ power_in Positive ADC reference voltage pin, typically 3.3V supply or external reference 1.65V to 3.6V.
22 VDDA power_in Analog power supply pin for ADC and comparators, 1.7V to 3.6V range.
23 PA0 bidirectional GPIO port A pin 0 / WKUP, 5V tolerant I/O for ADC123 IN0, TIM2/TIM5/TIM8 input, USART2 CTS, or Ethernet MII CRS.
24 PA1 bidirectional GPIO port A pin 1, 5V tolerant I/O for ADC123 IN1, TIM2/TIM5 channel, USART2 RTS, or Ethernet MII RX_CLK.
25 PA2 bidirectional GPIO port A pin 2, 5V tolerant I/O for ADC123 IN2, TIM2/TIM5 channel, TIM9 CH1, USART2 TX, or Ethernet MDIO.
26 PA3 bidirectional GPIO port A pin 3, 5V tolerant I/O for ADC123 IN3, TIM2/TIM5 channel, TIM9 CH2, USART2 RX, OTG_HS ULPI D0, Ethernet MII COL, or LCD B5.
27 VSS power_in Ground pin for digital circuit.
28 VDD power_in Main 3.3V power supply pin, 1.7V to 3.6V operating range.
29 PA4 bidirectional GPIO port A pin 4, 3.3V tolerant input/output connected to ADC for ADC12 IN4/DAC OUT1, SPI1/SPI3 NSS, USART2 CK, OTG_HS SOF, DCMI HSYNC, or LCD VSYNC.
30 PA5 bidirectional GPIO port A pin 5, 3.3V tolerant input/output connected to ADC for ADC12 IN5/DAC OUT2, TIM2/TIM8 channels, SPI1 SCK, or OTG_HS ULPI CK.
31 PA6 bidirectional GPIO port A pin 6, 5V tolerant I/O for ADC12 IN6, TIM1/TIM3/TIM8/TIM13 channels, SPI1 MISO, DCMI PIXCLK, or LCD G2.
32 PA7 bidirectional GPIO port A pin 7, 5V tolerant I/O for ADC12 IN7, TIM1/TIM3/TIM8/TIM14 channels, SPI1 MOSI, Ethernet MII RX_DV, or RMII CRS_DV.
33 PC4 bidirectional GPIO port C pin 4, 5V tolerant I/O for ADC12 IN14 and Ethernet MII RXD0 or RMII RXD0.
34 PC5 bidirectional GPIO port C pin 5, 5V tolerant I/O for ADC12 IN15 and Ethernet MII RXD1 or RMII RXD1.
35 PB0 bidirectional GPIO port B pin 0, 5V tolerant I/O for ADC12 IN8, TIM1/TIM3/TIM8 channels, LCD R3, OTG_HS ULPI D1, or Ethernet MII RXD2.
36 PB1 bidirectional GPIO port B pin 1, 5V tolerant I/O for ADC12 IN9, TIM1/TIM3/TIM8 channels, LCD R6, OTG_HS ULPI D2, or Ethernet MII RXD3.
37 PB2 bidirectional GPIO port B pin 2 / BOOT1, 5V tolerant I/O for general purpose or boot mode selection.
38 PE7 bidirectional GPIO port E pin 7, 5V tolerant I/O for TIM1 ETR, UART7 RX, or FMC D4 data bus.
39 PE8 bidirectional GPIO port E pin 8, 5V tolerant I/O for TIM1 CH1N, UART7 TX, or FMC D5 data bus.
40 PE9 bidirectional GPIO port E pin 9, 5V tolerant I/O for TIM1 CH1 or FMC D6 data bus.
41 PE10 bidirectional GPIO port E pin 10, 5V tolerant I/O for TIM1 CH2N or FMC D7 data bus.
42 PE11 bidirectional GPIO port E pin 11, 5V tolerant I/O for TIM1 CH2, SPI4 NSS, LCD G3, or FMC D8 data bus.
43 PE12 bidirectional GPIO port E pin 12, 5V tolerant I/O for TIM1 CH3N, SPI4 SCK, LCD B4, or FMC D9 data bus.
44 PE13 bidirectional GPIO port E pin 13, 5V tolerant I/O for TIM1 CH3, SPI4 MISO, LCD DE, or FMC D10 data bus.
45 PE14 bidirectional GPIO port E pin 14, 5V tolerant I/O for TIM1 CH4, SPI4 MOSI, LCD CLK, or FMC D11 data bus.
46 PE15 bidirectional GPIO port E pin 15, 5V tolerant I/O for TIM1 BKIN, LCD R7, or FMC D12 data bus.
47 PB10 bidirectional GPIO port B pin 10, 5V tolerant I/O for TIM2 CH3, I2C2 SCL, SPI2 SCK, USART3 TX, OTG_HS ULPI D3, Ethernet MII RX_ER, or LCD G4.
48 PB11 bidirectional GPIO port B pin 11, 5V tolerant I/O for TIM2 CH4, I2C2 SDA, USART3 RX, OTG_HS ULPI D4, Ethernet MII TX_EN, or LCD G5.
49 VCAP_1 power_in Voltage regulator capacitor pin, requires 1 µF to 10 µF ceramic capacitor to ground.
50 VDD power_in Main 3.3V power supply pin, 1.7V to 3.6V operating range.
51 PB12 bidirectional GPIO port B pin 12, 5V tolerant I/O for TIM1 BKIN, I2C2 SMBA, SPI2 NSS, USART3 CK, CAN2 RX, OTG_HS ULPI D5, Ethernet MII TXD0, or OTG_HS ID.
52 PB13 bidirectional GPIO port B pin 13, 5V tolerant I/O for TIM1 CH1N, SPI2 SCK, USART3 CTS, CAN2 TX, OTG_HS ULPI D6, Ethernet MII TXD1, or OTG_HS VBUS.
53 PB14 bidirectional GPIO port B pin 14, 5V tolerant I/O for TIM1/TIM8 CH2N, SPI2 MISO, USART3 RTS, TIM12 CH1, or OTG_HS DM.
54 PB15 bidirectional GPIO port B pin 15, 5V tolerant I/O for RTC REFIN, TIM1/TIM8 CH3N, SPI2 MOSI, TIM12 CH2, or OTG_HS DP.
55 PD8 bidirectional GPIO port D pin 8, 5V tolerant I/O for USART3 TX or FMC D13 data bus.
56 PD9 bidirectional GPIO port D pin 9, 5V tolerant I/O for USART3 RX or FMC D14 data bus.
57 PD10 bidirectional GPIO port D pin 10, 5V tolerant I/O for USART3 CK, LCD B3, or FMC D15 data bus.
58 PD11 bidirectional GPIO port D pin 11, 5V tolerant I/O for USART3 CTS or FMC A16 address bus.
59 PD12 bidirectional GPIO port D pin 12, 5V tolerant I/O for TIM4 CH1, USART3 RTS, or FMC A17 address bus.
60 PD13 bidirectional GPIO port D pin 13, 5V tolerant I/O for TIM4 CH2 or FMC A18 address bus.
61 PD14 bidirectional GPIO port D pin 14, 5V tolerant I/O for TIM4 CH3 or FMC D0 data bus.
62 PD15 bidirectional GPIO port D pin 15, 5V tolerant I/O for TIM4 CH4 or FMC D1 data bus.
63 PC6 bidirectional GPIO port C pin 6, 5V tolerant I/O for TIM3/TIM8 CH1, I2S2 MCK, USART6 TX, SDIO D6, DCMI D0, or LCD HSYNC.
64 PC7 bidirectional GPIO port C pin 7, 5V tolerant I/O for TIM3/TIM8 CH2, I2S3 MCK, USART6 RX, SDIO D7, DCMI D1, or LCD G6.
65 PC8 bidirectional GPIO port C pin 8, 5V tolerant I/O for TIM3/TIM8 CH3, USART6 CK, SDIO D0, or DCMI D2.
66 PC9 bidirectional GPIO port C pin 9, 5V tolerant I/O for MCO2, TIM3/TIM8 CH4, I2C3 SDA, I2S CKIN, SDIO D1, or DCMI D3.
67 PA8 bidirectional GPIO port A pin 8, 5V tolerant I/O for MCO1, TIM1 CH1, I2C3 SCL, USART1 CK, OTG_FS SOF, or LCD R6.
68 PA9 bidirectional GPIO port A pin 9, 5V tolerant I/O for TIM1 CH2, I2C3 SMBA, USART1 TX, DCMI D0, or OTG_FS VBUS.
69 PA10 bidirectional GPIO port A pin 10, 5V tolerant I/O for TIM1 CH3, USART1 RX, OTG_FS ID, or DCMI D1.
70 PA11 bidirectional GPIO port A pin 11, 5V tolerant I/O for TIM1 CH4, USART1 CTS, CAN1 RX, LCD R4, or OTG_FS DM.
71 PA12 bidirectional GPIO port A pin 12, 5V tolerant I/O for TIM1 ETR, USART1 RTS, CAN1 TX, LCD R5, or OTG_FS DP.
72 PA13 bidirectional GPIO port A pin 13 / JTMS-SWDIO, 5V tolerant I/O for JTAG test mode select or serial wire debug data I/O.
73 VCAP_2 power_in Voltage regulator capacitor pin, requires 1 µF to 10 µF ceramic capacitor to ground.
74 VSS power_in Ground pin for digital circuit.
75 VDD power_in Main 3.3V power supply pin, 1.7V to 3.6V operating range.
76 PA14 bidirectional GPIO port A pin 14 / JTCK-SWCLK, 5V tolerant I/O for JTAG test clock or serial wire debug clock.
77 PA15 bidirectional GPIO port A pin 15 / JTDI, 5V tolerant I/O for JTAG data input, TIM2 CH1, SPI1/SPI3 NSS, or event output.
78 PC10 bidirectional GPIO port C pin 10, 5V tolerant I/O for SPI3 SCK, USART3/UART4 TX, SDIO D2, DCMI D8, or LCD R2.
79 PC11 bidirectional GPIO port C pin 11, 5V tolerant I/O for SPI3 MISO, USART3/UART4 RX, SDIO D3, or DCMI D4.
80 PC12 bidirectional GPIO port C pin 12, 5V tolerant I/O for SPI3 MOSI, USART3 CK, UART5 TX, SDIO CK, or DCMI D9.
81 PD0 bidirectional GPIO port D pin 0, 5V tolerant I/O for CAN1 RX or FMC D2 data bus.
82 PD1 bidirectional GPIO port D pin 1, 5V tolerant I/O for CAN1 TX or FMC D3 data bus.
83 PD2 bidirectional GPIO port D pin 2, 5V tolerant I/O for TIM3 ETR, UART5 RX, SDIO CMD, or DCMI D11.
84 PD3 bidirectional GPIO port D pin 3, 5V tolerant I/O for SPI2 SCK, USART2 CTS, FMC CLK, DCMI D5, or LCD G7.
85 PD4 bidirectional GPIO port D pin 4, 5V tolerant I/O for USART2 RTS or FMC NOE read control signal.
86 PD5 bidirectional GPIO port D pin 5, 5V tolerant I/O for USART2 TX or FMC NWE write control signal.
87 PD6 bidirectional GPIO port D pin 6, 5V tolerant I/O for SPI3 MOSI, SAI1 SD, USART2 RX, FMC NWAIT, DCMI D10, or LCD B2.
88 PD7 bidirectional GPIO port D pin 7, 5V tolerant I/O for USART2 CK or FMC NE1/NCE2 chip enable signal.
89 PB3 bidirectional GPIO port B pin 3 / JTDO-TRACESWO, 5V tolerant I/O for JTAG data output or SWD trace output, TIM2 CH2, or SPI1 SCK.
90 PB4 bidirectional GPIO port B pin 4 / NJTRST, 5V tolerant I/O for JTAG test reset, TIM3 CH1, SPI1 MISO, or SPI3 MISO.
91 PB5 bidirectional GPIO port B pin 5, 5V tolerant I/O for TIM3 CH2, I2C1 SMBA, SPI1/SPI3 MOSI, CAN2 RX, OTG_HS ULPI D7, Ethernet PPS, FMC SDCKE1, or DCMI D10.
92 PB6 bidirectional GPIO port B pin 6, 5V tolerant I/O for TIM4 CH1, I2C1 SCL, USART1 TX, CAN2 TX, FMC SDNE1, or DCMI D5.
93 PB7 bidirectional GPIO port B pin 7, 5V tolerant I/O for TIM4 CH2, I2C1 SDA, USART1 RX, FMC NL, or DCMI VSYNC.
94 BOOT0 input Boot mode select pin (active high), selects between boot from user flash (0) or system memory (1), can be pulled high for user code execution.
95 PB8 bidirectional GPIO port B pin 8, 5V tolerant I/O for TIM4/TIM10 channel, I2C1 SCL, CAN1 RX, Ethernet MII TXD3, SDIO D4, DCMI D6, or LCD B6.
96 PB9 bidirectional GPIO port B pin 9, 5V tolerant I/O for TIM4/TIM11 channel, I2C1 SDA, SPI2 NSS, CAN1 TX, SDIO D5, DCMI D7, or LCD B7.
97 PE0 bidirectional GPIO port E pin 0, 5V tolerant I/O for TIM4 ETR, UART8 RX, FMC NBL0, or DCMI D2.
98 PE1 bidirectional GPIO port E pin 1, 5V tolerant I/O for UART8 TX, FMC NBL1, or DCMI D3.
99 VSS power_in Ground pin for digital circuit.
100 VDD power_in Main 3.3V power supply pin, 1.7V to 3.6V operating range.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32F437VIT6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32f437vit6-etched.step / stm32f437vit6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f437vit6.step / stm32f437vit6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (241 pp, sha256 2505988d88e7f454, retrieved 2026-10-01, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF