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STM32F413VGT6TR

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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STM32F413VGT6TR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32F413VGT6TR from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5 V tolerant I/O with alternate functions TRACECLK, SPI4_SCK/I2S4_CK, SPI5_SCK/I2S5_CK, SAI1_MCLK_A, QUADSPI_BK1_IO2, UART10_RX, FSMC_A23 and EVENTOUT.
2 PE3 bidirectional 5 V tolerant I/O with alternate functions TRACED0, SAI1_SD_B, UART10_TX, FSMC_A19 and EVENTOUT.
3 PE4 bidirectional 5 V tolerant I/O with alternate functions TRACED1, SPI4_NSS/I2S4_WS, SPI5_NSS/I2S5_WS, SAI1_SD_A, DFSDM1_DATIN3, FSMC_A20 and EVENTOUT; SAI1_SD_A is swapped versus other MCUs.
4 PE5 bidirectional 5 V tolerant I/O with alternate functions TRACED2, TIM9_CH1, SPI4_MISO, SPI5_MISO, SAI1_SCK_A, DFSDM1_CKIN3, FSMC_A21 and EVENTOUT.
5 PE6 bidirectional 5 V tolerant I/O with alternate functions TRACED3, TIM9_CH2, SPI4_MOSI/I2S4_SD, SPI5_MOSI/I2S5_SD, SAI1_FS_A, FSMC_A22 and EVENTOUT; SAI1_FS_A is swapped versus other MCUs.
6 VBAT power_in Backup battery supply pin for RTC, backup registers and LSE oscillator.
7 PC13-ANTI_TAMP bidirectional 5 V tolerant I/O powered via the power switch (sinks only 3 mA, max 2 MHz with 30 pF load, not a current source); EVENTOUT, additional function TAMP_1.
8 PC14-OSC32_IN bidirectional I/O powered via the power switch (max 2 MHz, 30 pF); additional function OSC32_IN for the 32 kHz crystal, not 5 V tolerant in oscillator mode.
9 PC15-OSC32_OUT bidirectional I/O powered via the power switch (max 2 MHz, 30 pF); additional function OSC32_OUT for the 32 kHz crystal, not 5 V tolerant in oscillator mode.
10 VSS power_in Ground supply pin.
11 VDD power_in Digital supply pin.
12 PH0-OSC_IN bidirectional I/O that serves as the 4-26 MHz HSE oscillator input (OSC_IN); not 5 V tolerant in oscillator mode.
13 PH1-OSC_OUT bidirectional I/O that serves as the 4-26 MHz HSE oscillator output (OSC_OUT); not 5 V tolerant in oscillator mode.
14 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor.
15 PC0 bidirectional 5 V tolerant I/O with LPTIM1_IN1, DFSDM2_CKIN4, SAI1_MCLK_B, EVENTOUT; analog functions ADC1_IN10 and WKUP2.
16 PC1 bidirectional 5 V tolerant I/O with LPTIM1_OUT, DFSDM2_DATIN4, SAI1_SD_B, EVENTOUT; analog functions ADC1_IN11 and WKUP3.
17 PC2 bidirectional 5 V tolerant I/O with LPTIM1_IN2, DFSDM2_DATIN7, SPI2_MISO, I2S2ext_SD, SAI1_SCK_B, DFSDM1_CKOUT, FSMC_NWE, EVENTOUT; analog function ADC1_IN12.
18 PC3 bidirectional 5 V tolerant I/O with LPTIM1_ETR, DFSDM2_CKIN7, SPI2_MOSI/I2S2_SD, SAI1_FS_B, FSMC_A0, EVENTOUT; analog function ADC1_IN13.
19 VDD power_in Digital supply pin.
20 VSSA power_in Analog ground supply pin.
21 VREF+ power_in Positive reference voltage supply for the ADC and DACs.
22 VDDA power_in Analog supply pin.
23 PA0 bidirectional 5 V tolerant I/O with TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX, EVENTOUT; analog functions ADC1_IN0 and WKUP1.
24 PA1 bidirectional 5 V tolerant I/O with TIM2_CH2, TIM5_CH2, SPI4_MOSI/I2S4_SD, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3, EVENTOUT; analog function ADC1_IN1.
25 PA2 bidirectional 5 V tolerant I/O with TIM2_CH3, TIM5_CH3, TIM9_CH1, I2S2_CKIN, USART2_TX, FSMC_D4/FSMC_DA4, EVENTOUT; analog function ADC1_IN2.
26 PA3 bidirectional 5 V tolerant I/O with TIM2_CH4, TIM5_CH4, TIM9_CH2, I2S2_MCK, USART2_RX, SAI1_SD_B, FSMC_D5/FSMC_DA5, EVENTOUT; analog function ADC1_IN3.
27 VSS power_in Ground supply pin.
28 VDD power_in Digital supply pin.
29 PA4 bidirectional 3.3 V tolerant I/O (TTa) with SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, USART2_CK, DFSDM1_DATIN1, FSMC_D6/FSMC_DA6, EVENTOUT; analog functions ADC1_IN4 and DAC_OUT1.
30 PA5 bidirectional 3.3 V tolerant I/O (TTa) with TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK/I2S1_CK, DFSDM1_CKIN1, FSMC_D7/FSMC_DA7, EVENTOUT; analog functions ADC1_IN5 and DAC_OUT2.
31 PA6 bidirectional 5 V tolerant I/O with TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, I2S2_MCK, DFSDM2_CKIN1, TIM13_CH1, QUADSPI_BK2_IO0, SDIO_CMD, EVENTOUT; analog function ADC1_IN6.
32 PA7 bidirectional 5 V tolerant I/O with TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI/I2S1_SD, DFSDM2_DATIN1, TIM14_CH1, QUADSPI_BK2_IO1, EVENTOUT; analog function ADC1_IN7.
33 PC4 bidirectional 5 V tolerant I/O with DFSDM2_CKIN2, I2S1_MCK, QUADSPI_BK2_IO2, FSMC_NE4, EVENTOUT; analog function ADC1_IN14.
34 PC5 bidirectional 5 V tolerant I/O with DFSDM2_DATIN2, I2CFMP1_SMBA, USART3_RX, QUADSPI_BK2_IO3, FSMC_NOE, EVENTOUT; analog function ADC1_IN15.
35 PB0 bidirectional 5 V tolerant I/O with TIM1_CH2N, TIM3_CH3, TIM8_CH2N, SPI5_SCK/I2S5_CK, EVENTOUT; analog function ADC1_IN8.
36 PB1 bidirectional 5 V tolerant I/O with TIM1_CH3N, TIM3_CH4, TIM8_CH3N, SPI5_NSS/I2S5_WS, DFSDM1_DATIN0, QUADSPI_CLK, EVENTOUT; analog function ADC1_IN9.
37 PB2 bidirectional 5 V tolerant I/O with LPTIM1_OUT, DFSDM1_CKIN0, QUADSPI_CLK, EVENTOUT; additional function BOOT1.
38 PE7 bidirectional 5 V tolerant I/O with TIM1_ETR, DFSDM1_DATIN2, UART7_Rx, QUADSPI_BK2_IO0, FSMC_D4/FSMC_DA4, EVENTOUT.
39 PE8 bidirectional 5 V tolerant I/O with TIM1_CH1N, DFSDM1_CKIN2, UART7_Tx, QUADSPI_BK2_IO1, FSMC_D5/FSMC_DA5, EVENTOUT.
40 PE9 bidirectional 5 V tolerant I/O with TIM1_CH1, DFSDM1_CKOUT, QUADSPI_BK2_IO2, FSMC_D6/FSMC_DA6, EVENTOUT.
41 PE10 bidirectional 5 V tolerant I/O with TIM1_CH2N, DFSDM2_DATIN0, QUADSPI_BK2_IO3, FSMC_D7/FSMC_DA7, EVENTOUT.
42 PE11 bidirectional 5 V tolerant I/O with TIM1_CH2, DFSDM2_CKIN0, SPI4_NSS/I2S4_WS, SPI5_NSS/I2S5_WS, FSMC_D8/FSMC_DA8, EVENTOUT.
43 PE12 bidirectional 5 V tolerant I/O with TIM1_CH3N, DFSDM2_DATIN7, SPI4_SCK/I2S4_CK, SPI5_SCK/I2S5_CK, FSMC_D9/FSMC_DA9, EVENTOUT.
44 PE13 bidirectional 5 V tolerant I/O with TIM1_CH3, DFSDM2_CKIN7, SPI4_MISO, SPI5_MISO, FSMC_D10/FSMC_DA10, EVENTOUT.
45 PE14 bidirectional 5 V tolerant I/O with TIM1_CH4, SPI4_MOSI/I2S4_SD, SPI5_MOSI/I2S5_SD, DFSDM2_DATIN1, FSMC_D11/FSMC_DA11, EVENTOUT.
46 PE15 bidirectional 5 V tolerant I/O with TIM1_BKIN, DFSDM2_CKIN1, FSMC_D12/FSMC_DA12, EVENTOUT.
47 PB10 bidirectional 5 V tolerant I/O with I2C FM+ option, with TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, I2S3_MCK, USART3_TX, I2CFMP1_SCL, DFSDM2_CKOUT, SDIO_D7, EVENTOUT.
48 VCAP_1 passive Connection for the 1.2 V internal regulator output external capacitor (VCAP_1).
49 VSS power_in Ground supply pin.
50 VDD power_in Digital supply pin.
51 PB12 bidirectional 5 V tolerant I/O with TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, SPI4_NSS/I2S4_WS, SPI3_SCK/I2S3_CK, USART3_CK, CAN2_RX, DFSDM1_DATIN1, UART5_RX, FSMC_D13/FSMC_DA13, EVENTOUT.
52 PB13 bidirectional 5 V tolerant I/O with TIM1_CH1N, I2CFMP1_SMBA, SPI2_SCK/I2S2_CK, SPI4_SCK/I2S4_CK, USART3_CTS, CAN2_TX, DFSDM1_CKIN1, UART5_TX, EVENTOUT.
53 PB14 bidirectional 5 V tolerant I/O with I2C FM+ option, with TIM1_CH2N, TIM8_CH2N, I2CFMP1_SDA, SPI2_MISO, I2S2ext_SD, USART3_RTS, DFSDM1_DATIN2, TIM12_CH1, FSMC_D0/FSMC_DA0, SDIO_D6, EVENTOUT.
54 PB15 bidirectional 5 V tolerant I/O with I2C FM+ option, with RTC_REFIN, TIM1_CH3N, TIM8_CH3N, I2CFMP1_SCL, SPI2_MOSI/I2S2_SD, DFSDM1_CKIN2, TIM12_CH2, SDIO_CK, EVENTOUT.
55 PD8 bidirectional 5 V tolerant I/O with USART3_TX, FSMC_D13/FSMC_DA13, EVENTOUT.
56 PD9 bidirectional 5 V tolerant I/O with USART3_RX, FSMC_D14/FSMC_DA14, EVENTOUT.
57 PD10 bidirectional 5 V tolerant I/O with USART3_CK, UART4_TX (wrongly mapped here instead of PC10), FSMC_D15/FSMC_DA15, EVENTOUT.
58 PD11 bidirectional 5 V tolerant I/O with DFSDM2_DATIN2, I2CFMP1_SMBA, USART3_CTS, QUADSPI_BK1_IO0, FSMC_A16, EVENTOUT.
59 PD12 bidirectional 5 V tolerant I/O with I2C FM+ option, with TIM4_CH1, DFSDM2_CKIN2, I2CFMP1_SCL, USART3_RTS, QUADSPI_BK1_IO1, FSMC_A17, EVENTOUT.
60 PD13 bidirectional 5 V tolerant I/O with I2C FM+ option, with TIM4_CH2, I2CFMP1_SDA, QUADSPI_BK1_IO3, FSMC_A18, EVENTOUT.
61 PD14 bidirectional 5 V tolerant I/O with I2C FM+ option, with TIM4_CH3, I2CFMP1_SCL, DFSDM2_CKIN0, UART9_RX, FSMC_D0/FSMC_DA0, EVENTOUT.
62 PD15 bidirectional 5 V tolerant I/O with I2C FM+ option, with TIM4_CH4, I2CFMP1_SDA, DFSDM2_DATIN0, UART9_TX, FSMC_D1/FSMC_DA1, EVENTOUT.
63 PC6 bidirectional 5 V tolerant I/O with I2C FM+ option, with TIM3_CH1, TIM8_CH1, I2CFMP1_SCL, I2S2_MCK, DFSDM1_CKIN3, DFSDM2_DATIN6, USART6_TX, FSMC_D1/FSMC_DA1, SDIO_D6, EVENTOUT.
64 PC7 bidirectional 5 V tolerant I/O with I2C FM+ option, with TIM3_CH2, TIM8_CH2, I2CFMP1_SDA, SPI2_SCK/I2S2_CK, I2S3_MCK, DFSDM2_CKIN6, USART6_RX, DFSDM1_DATIN3, SDIO_D7, EVENTOUT.
65 PC8 bidirectional 5 V tolerant I/O with TIM3_CH3, TIM8_CH3, DFSDM2_CKIN3, USART6_CK, QUADSPI_BK1_IO2, SDIO_D0, EVENTOUT.
66 PC9 bidirectional 5 V tolerant I/O with MCO_2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S2_CKIN, DFSDM2_DATIN3, QUADSPI_BK1_IO0, SDIO_D1, EVENTOUT.
67 PA8 bidirectional 5 V tolerant I/O with MCO_1, TIM1_CH1, I2C3_SCL, DFSDM1_CKOUT, USART1_CK, UART7_RX, USB_FS_SOF, CAN3_RX, SDIO_D1, EVENTOUT.
68 PA9 bidirectional 5 V tolerant I/O with TIM1_CH2, DFSDM2_CKIN3, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX, USB_FS_VBUS, SDIO_D2, EVENTOUT.
69 PA10 bidirectional 5 V tolerant I/O with TIM1_CH3, DFSDM2_DATIN3, SPI2_MOSI/I2S2_SD, SPI5_MOSI/I2S5_SD, USART1_RX, USB_FS_ID, EVENTOUT.
70 PA11 bidirectional 5 V tolerant I/O with TIM1_CH4, DFSDM2_CKIN5, SPI2_NSS/I2S2_WS, SPI4_MISO, USART1_CTS, USART6_TX, CAN1_RX, USB_FS_DM, UART4_RX, EVENTOUT.
71 PA12 bidirectional 5 V tolerant I/O with TIM1_ETR, DFSDM2_DATIN5, SPI2_MISO, SPI5_MISO, USART1_RTS, USART6_RX, CAN1_TX, USB_FS_DP, UART4_TX, EVENTOUT.
72 PA13 bidirectional 5 V tolerant I/O with JTMS-SWDIO debug function and EVENTOUT.
73 VCAP_2 passive Connection for the 1.2 V internal regulator output external capacitor (VCAP_2).
74 VSS power_in Ground supply pin.
75 VDD power_in Digital supply pin.
76 PA14 bidirectional 5 V tolerant I/O with JTCK-SWCLK debug function and EVENTOUT.
77 PA15 bidirectional 5 V tolerant I/O with JTDI, TIM2_CH1/TIM2_ETR, SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, USART1_TX, UART7_TX, SAI1_MCLK_A, CAN3_TX, EVENTOUT.
78 PC10 bidirectional 5 V tolerant I/O with DFSDM2_CKIN5, SPI3_SCK/I2S3_CK, USART3_TX, QUADSPI_BK1_IO1, SDIO_D2, EVENTOUT.
79 PC11 bidirectional 5 V tolerant I/O with DFSDM2_DATIN5, I2S3ext_SD, SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, FSMC_D2/FSMC_DA2, SDIO_D3, EVENTOUT.
80 PC12 bidirectional 5 V tolerant I/O with SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, FSMC_D3/FSMC_DA3, SDIO_CK, EVENTOUT.
81 PD0 bidirectional 5 V tolerant I/O with DFSDM2_CKIN6, CAN1_RX, UART4_RX, FSMC_D2/FSMC_DA2, EVENTOUT.
82 PD1 bidirectional 5 V tolerant I/O with DFSDM2_DATIN6, CAN1_TX, UART4_TX, FSMC_D3/FSMC_DA3, EVENTOUT.
83 PD2 bidirectional 5 V tolerant I/O with TIM3_ETR, DFSDM2_CKOUT, UART5_RX, FSMC_NWE, SDIO_CMD, EVENTOUT.
84 PD3 bidirectional 5 V tolerant I/O with TRACED1, SPI2_SCK/I2S2_CK, DFSDM1_DATIN0, USART2_CTS, QUADSPI_CLK, FSMC_CLK, EVENTOUT.
85 PD4 bidirectional 5 V tolerant I/O with DFSDM1_CKIN0, USART2_RTS, FSMC_NOE, EVENTOUT.
86 PD5 bidirectional 5 V tolerant I/O with DFSDM2_CKOUT, USART2_TX, FSMC_NWE, EVENTOUT.
87 PD6 bidirectional 5 V tolerant I/O with SPI3_MOSI/I2S3_SD, DFSDM1_DATIN1, USART2_RX, FSMC_NWAIT, EVENTOUT.
88 PD7 bidirectional 5 V tolerant I/O with DFSDM1_CKIN1, USART2_CK, FSMC_NE1, EVENTOUT.
89 PB3 bidirectional 5 V tolerant I/O with I2C FM+ option, with JTDO-SWO, TIM2_CH2, I2CFMP1_SDA, SPI1_SCK/I2S1_CK, SPI3_SCK/I2S3_CK, USART1_RX, UART7_RX, I2C2_SDA, SAI1_SD_A, CAN3_RX, EVENTOUT.
90 PB4 bidirectional 5 V tolerant I/O with JTRST, TIM3_CH1, SPI1_MISO, SPI3_MISO, I2S3ext_SD, UART7_TX, I2C3_SDA, SAI1_SCK_A, CAN3_TX, SDIO_D0, EVENTOUT.
91 PB5 bidirectional 5 V tolerant I/O with LPTIM1_IN1, TIM3_CH2, I2C1_SMBA, SPI1_MOSI/I2S1_SD, SPI3_MOSI/I2S3_SD, CAN2_RX, SAI1_FS_A, UART5_RX, SDIO_D3, EVENTOUT.
92 PB6 bidirectional 5 V tolerant I/O with LPTIM1_ETR, TIM4_CH1, I2C1_SCL, DFSDM2_CKIN7, USART1_TX, CAN2_TX, QUADSPI_BK1_NCS, UART5_TX, SDIO_D0, EVENTOUT.
93 PB7 bidirectional 5 V tolerant I/O with LPTIM1_IN2, TIM4_CH2, I2C1_SDA, DFSDM2_DATIN7, USART1_RX, FSMC_NL, EVENTOUT.
94 BOOT0 input Dedicated boot mode selection input pin; additional function VPP.
95 PB8 bidirectional 5 V tolerant I/O with LPTIM1_OUT, TIM4_CH3, TIM10_CH1, I2C1_SCL, SPI5_MOSI/I2S5_SD, DFSDM2_CKIN1, CAN1_RX, I2C3_SDA, UART5_RX, SDIO_D4, EVENTOUT.
96 PB9 bidirectional 5 V tolerant I/O with TIM4_CH4, TIM11_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, DFSDM2_DATIN1, CAN1_TX, I2C2_SDA, UART5_TX, SDIO_D5, EVENTOUT.
97 PE0 bidirectional 5 V tolerant I/O with TIM4_ETR, DFSDM2_CKIN4, UART8_Rx, FSMC_NBL0, EVENTOUT.
98 PE1 bidirectional 5 V tolerant I/O with DFSDM2_DATIN4, UART8_Tx, FSMC_NBL1, EVENTOUT.
99 VSS power_in Ground supply pin.
100 VDD power_in Digital supply pin.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32F413VGT6TR
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32f413vgt6tr-etched.step / stm32f413vgt6tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f413vgt6tr.step / stm32f413vgt6tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (208 pp, sha256 1097a9e7a96496c5, retrieved 2026-10-07, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF