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STM32F413VGT6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32f413vgt6factory-2.0.0extractor-text
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Symbol & Footprint

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Contents

README

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STM32F413VGT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32F413VGT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5 V tolerant I/O (FT) with alternate functions TRACECLK, SPI4_SCK, SPI5_SCK, SAI1_MCLK_A, QUADSPI_BK1_IO2, UART10_RX, FSMC_A23.
2 PE3 bidirectional 5 V tolerant I/O (FT) with alternate functions TRACED0, SAI1_SD_B, UART10_TX, FSMC_A19.
3 PE4 bidirectional 5 V tolerant I/O (FT) with alternate functions TRACED1, SPI4_NSS, SPI5_NSS, SAI1_SD_A, DFSDM1_DATIN3, FSMC_A20.
4 PE5 bidirectional 5 V tolerant I/O (FT) with alternate functions TRACED2, TIM9_CH1, SPI4_MISO, SPI5_MISO, SAI1_SCK_A, DFSDM1_CKIN3, FSMC_A21.
5 PE6 bidirectional 5 V tolerant I/O (FT) with alternate functions TRACED3, TIM9_CH2, SPI4_MOSI, SPI5_MOSI, SAI1_FS_A, FSMC_A22.
6 VBAT power_in Backup domain supply pin for RTC and backup registers when VDD is not present.
7 PC13-ANTI_TAMP bidirectional 5 V tolerant I/O supplied through the power switch (sinks max 3 mA, output limited to 2 MHz with 30 pF max load, not a current source), with additional function TAMP_1.
8 PC14-OSC32_IN bidirectional I/O supplied through the power switch (output limited to 2 MHz, 30 pF, 3 mA max), also the 32 kHz oscillator input OSC32_IN.
9 PC15-OSC32_OUT bidirectional I/O supplied through the power switch (output limited to 2 MHz, 30 pF, 3 mA max), also the 32 kHz oscillator output OSC32_OUT.
10 VSS power_in Ground supply pin.
11 VDD power_in Digital supply pin, 1.7 to 3.6 V.
12 PH0-OSC_IN bidirectional I/O that serves as the 4-26 MHz HSE oscillator input OSC_IN.
13 PH1-OSC_OUT bidirectional I/O that serves as the 4-26 MHz HSE oscillator output OSC_OUT.
14 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor.
15 PC0 bidirectional 5 V tolerant I/O with LPTIM1_IN1, DFSDM2_CKIN4, SAI1_MCLK_B and additional functions ADC1_IN10, WKUP2.
16 PC1 bidirectional 5 V tolerant I/O with LPTIM1_OUT, DFSDM2_DATIN4, SAI1_SD_B and additional functions ADC1_IN11, WKUP3.
17 PC2 bidirectional 5 V tolerant I/O with LPTIM1_IN2, SPI2_MISO, DFSDM, SAI1_SCK_B, FSMC_NWE and additional function ADC1_IN12.
18 PC3 bidirectional 5 V tolerant I/O with LPTIM1_ETR, SPI2_MOSI/I2S2_SD, SAI1_FS_B, FSMC_A0 and additional function ADC1_IN13.
19 VDD power_in Digital supply pin, 1.7 to 3.6 V.
20 VSSA power_in Analog ground supply pin.
21 VREF+ power_in Positive reference voltage input for ADC and DAC.
22 VDDA power_in Analog supply pin.
23 PA0 bidirectional 5 V tolerant I/O with TIM2_CH1/ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX and additional functions ADC1_IN0, WKUP1.
24 PA1 bidirectional 5 V tolerant I/O with TIM2_CH2, TIM5_CH2, SPI4_MOSI, USART2_RTS, UART4_RX, QUADSPI_BK1_IO3 and additional function ADC1_IN1.
25 PA2 bidirectional 5 V tolerant I/O with TIM2_CH3, TIM5_CH3, TIM9_CH1, I2S2_CKIN, USART2_TX, FSMC_D4 and additional function ADC1_IN2.
26 PA3 bidirectional 5 V tolerant I/O with TIM2_CH4, TIM5_CH4, TIM9_CH2, I2S2_MCK, USART2_RX, SAI1_SD_B, FSMC_D5 and additional function ADC1_IN3.
27 VSS power_in Ground supply pin.
28 VDD power_in Digital supply pin, 1.7 to 3.6 V.
29 PA4 bidirectional 3.3 V tolerant I/O (TTa) with SPI1_NSS, SPI3_NSS, USART2_CK, DFSDM1_DATIN1, FSMC_D6 and additional functions ADC1_IN4, DAC_OUT1.
30 PA5 bidirectional 3.3 V tolerant I/O (TTa) with TIM2_CH1/ETR, TIM8_CH1N, SPI1_SCK, DFSDM1_CKIN1, FSMC_D7 and additional functions ADC1_IN5, DAC_OUT2.
31 PA6 bidirectional 5 V tolerant I/O with TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM13_CH1, QUADSPI_BK2_IO0, SDIO_CMD and additional function ADC1_IN6.
32 PA7 bidirectional 5 V tolerant I/O with TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM14_CH1, QUADSPI_BK2_IO1 and additional function ADC1_IN7.
33 PC4 bidirectional 5 V tolerant I/O with DFSDM2_CKIN2, I2S1_MCK, QUADSPI_BK2_IO2, FSMC_NE4 and additional function ADC1_IN14.
34 PC5 bidirectional 5 V tolerant I/O with DFSDM2_DATIN2, I2CFMP1_SMBA, USART3_RX, QUADSPI_BK2_IO3, FSMC_NOE and additional function ADC1_IN15.
35 PB0 bidirectional 5 V tolerant I/O with TIM1_CH2N, TIM3_CH3, TIM8_CH2N, SPI5_SCK and additional function ADC1_IN8.
36 PB1 bidirectional 5 V tolerant I/O with TIM1_CH3N, TIM3_CH4, TIM8_CH3N, SPI5_NSS, DFSDM1_DATIN0, QUADSPI_CLK and additional function ADC1_IN9.
37 PB2 bidirectional 5 V tolerant I/O with LPTIM1_OUT, DFSDM1_CKIN0, QUADSPI_CLK and additional function BOOT1.
38 PE7 bidirectional 5 V tolerant I/O with TIM1_ETR, DFSDM1_DATIN2, UART7_Rx, QUADSPI_BK2_IO0, FSMC_D4.
39 PE8 bidirectional 5 V tolerant I/O with TIM1_CH1N, DFSDM1_CKIN2, UART7_Tx, QUADSPI_BK2_IO1, FSMC_D5.
40 PE9 bidirectional 5 V tolerant I/O with TIM1_CH1, DFSDM1_CKOUT, QUADSPI_BK2_IO2, FSMC_D6.
41 PE10 bidirectional 5 V tolerant I/O with TIM1_CH2N, DFSDM2_DATIN0, QUADSPI_BK2_IO3, FSMC_D7.
42 PE11 bidirectional 5 V tolerant I/O with TIM1_CH2, DFSDM2_CKIN0, SPI4_NSS, SPI5_NSS, FSMC_D8.
43 PE12 bidirectional 5 V tolerant I/O with TIM1_CH3N, DFSDM2_DATIN7, SPI4_SCK, SPI5_SCK, FSMC_D9.
44 PE13 bidirectional 5 V tolerant I/O with TIM1_CH3, DFSDM2_CKIN7, SPI4_MISO, SPI5_MISO, FSMC_D10.
45 PE14 bidirectional 5 V tolerant I/O with TIM1_CH4, SPI4_MOSI, SPI5_MOSI, DFSDM2_DATIN1, FSMC_D11.
46 PE15 bidirectional 5 V tolerant I/O with TIM1_BKIN, DFSDM2_CKIN1, FSMC_D12.
47 PB10 bidirectional 5 V tolerant I/O (FTf, I2C FM+ option) with TIM2_CH3, I2C2_SCL, SPI2_SCK, USART3_TX, I2CFMP1_SCL, DFSDM2_CKOUT, SDIO_D7.
48 VCAP_1 passive Pin for the external capacitor of the internal 1.2 V regulator output.
49 VSS power_in Ground supply pin.
50 VDD power_in Digital supply pin, 1.7 to 3.6 V.
51 PB12 bidirectional 5 V tolerant I/O with TIM1_BKIN, I2C2_SMBA, SPI2_NSS, SPI4_NSS, SPI3_SCK, USART3_CK, CAN2_RX, DFSDM1_DATIN1, UART5_RX, FSMC_D13.
52 PB13 bidirectional 5 V tolerant I/O with TIM1_CH1N, I2CFMP1_SMBA, SPI2_SCK, SPI4_SCK, USART3_CTS, CAN2_TX, DFSDM1_CKIN1, UART5_TX.
53 PB14 bidirectional 5 V tolerant I/O (FTf) with TIM1_CH2N, TIM8_CH2N, I2CFMP1_SDA, SPI2_MISO, USART3_RTS, DFSDM1_DATIN2, TIM12_CH1, FSMC_D0, SDIO_D6.
54 PB15 bidirectional 5 V tolerant I/O (FTf) with RTC_REFIN, TIM1_CH3N, TIM8_CH3N, I2CFMP1_SCL, SPI2_MOSI, DFSDM1_CKIN2, TIM12_CH2, SDIO_CK.
55 PD8 bidirectional 5 V tolerant I/O with USART3_TX and FSMC_D13.
56 PD9 bidirectional 5 V tolerant I/O with USART3_RX and FSMC_D14.
57 PD10 bidirectional 5 V tolerant I/O with USART3_CK, UART4_TX (wrongly mapped here instead of PC10) and FSMC_D15.
58 PD11 bidirectional 5 V tolerant I/O with DFSDM2_DATIN2, I2CFMP1_SMBA, USART3_CTS, QUADSPI_BK1_IO0, FSMC_A16.
59 PD12 bidirectional 5 V tolerant I/O (FTf) with TIM4_CH1, DFSDM2_CKIN2, I2CFMP1_SCL, USART3_RTS, QUADSPI_BK1_IO1, FSMC_A17.
60 PD13 bidirectional 5 V tolerant I/O (FTf) with TIM4_CH2, I2CFMP1_SDA, QUADSPI_BK1_IO3, FSMC_A18.
61 PD14 bidirectional 5 V tolerant I/O (FTf) with TIM4_CH3, I2CFMP1_SCL, DFSDM2_CKIN0, UART9_RX, FSMC_D0.
62 PD15 bidirectional 5 V tolerant I/O (FTf) with TIM4_CH4, I2CFMP1_SDA, DFSDM2_DATIN0, UART9_TX, FSMC_D1.
63 PC6 bidirectional 5 V tolerant I/O (FTf) with TIM3_CH1, TIM8_CH1, I2CFMP1_SCL, I2S2_MCK, USART6_TX, FSMC_D1, SDIO_D6.
64 PC7 bidirectional 5 V tolerant I/O (FTf) with TIM3_CH2, TIM8_CH2, I2CFMP1_SDA, SPI2_SCK, I2S3_MCK, USART6_RX, SDIO_D7.
65 PC8 bidirectional 5 V tolerant I/O with TIM3_CH3, TIM8_CH3, DFSDM2_CKIN3, USART6_CK, QUADSPI_BK1_IO2, SDIO_D0.
66 PC9 bidirectional 5 V tolerant I/O with MCO_2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S2_CKIN, QUADSPI_BK1_IO0, SDIO_D1.
67 PA8 bidirectional 5 V tolerant I/O with MCO_1, TIM1_CH1, I2C3_SCL, USART1_CK, UART7_RX, USB_FS_SOF, CAN3_RX, SDIO_D1.
68 PA9 bidirectional 5 V tolerant I/O with TIM1_CH2, I2C3_SMBA, SPI2_SCK, USART1_TX, USB_FS_VBUS, SDIO_D2.
69 PA10 bidirectional 5 V tolerant I/O with TIM1_CH3, SPI2_MOSI, SPI5_MOSI, USART1_RX, USB_FS_ID.
70 PA11 bidirectional 5 V tolerant I/O with TIM1_CH4, SPI2_NSS, SPI4_MISO, USART1_CTS, USART6_TX, CAN1_RX, USB_FS_DM, UART4_RX.
71 PA12 bidirectional 5 V tolerant I/O with TIM1_ETR, SPI2_MISO, SPI5_MISO, USART1_RTS, USART6_RX, CAN1_TX, USB_FS_DP, UART4_TX.
72 PA13 bidirectional 5 V tolerant I/O that is JTMS-SWDIO after reset.
73 VCAP_2 passive Pin for the external capacitor of the internal 1.2 V regulator output.
74 VSS power_in Ground supply pin.
75 VDD power_in Digital supply pin, 1.7 to 3.6 V.
76 PA14 bidirectional 5 V tolerant I/O that is JTCK-SWCLK after reset.
77 PA15 bidirectional 5 V tolerant I/O that is JTDI after reset, with TIM2_CH1/ETR, SPI1_NSS, SPI3_NSS, USART1_TX, UART7_TX, SAI1_MCLK_A, CAN3_TX.
78 PC10 bidirectional 5 V tolerant I/O with DFSDM2_CKIN5, SPI3_SCK, USART3_TX, QUADSPI_BK1_IO1, SDIO_D2.
79 PC11 bidirectional 5 V tolerant I/O with DFSDM2_DATIN5, SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, FSMC_D2, SDIO_D3.
80 PC12 bidirectional 5 V tolerant I/O with SPI3_MOSI, USART3_CK, UART5_TX, FSMC_D3, SDIO_CK.
81 PD0 bidirectional 5 V tolerant I/O with DFSDM2_CKIN6, CAN1_RX, UART4_RX, FSMC_D2.
82 PD1 bidirectional 5 V tolerant I/O with DFSDM2_DATIN6, CAN1_TX, UART4_TX, FSMC_D3.
83 PD2 bidirectional 5 V tolerant I/O with TIM3_ETR, DFSDM2_CKOUT, UART5_RX, FSMC_NWE, SDIO_CMD.
84 PD3 bidirectional 5 V tolerant I/O with TRACED1, SPI2_SCK, DFSDM1_DATIN0, USART2_CTS, QUADSPI_CLK, FSMC_CLK.
85 PD4 bidirectional 5 V tolerant I/O with DFSDM1_CKIN0, USART2_RTS, FSMC_NOE.
86 PD5 bidirectional 5 V tolerant I/O with DFSDM2_CKOUT, USART2_TX, FSMC_NWE.
87 PD6 bidirectional 5 V tolerant I/O with SPI3_MOSI, DFSDM1_DATIN1, USART2_RX, FSMC_NWAIT.
88 PD7 bidirectional 5 V tolerant I/O with DFSDM1_CKIN1, USART2_CK, FSMC_NE1.
89 PB3 bidirectional 5 V tolerant I/O (FTf) that is JTDO-SWO after reset, with TIM2_CH2, I2CFMP1_SDA, SPI1_SCK, SPI3_SCK, USART1_RX, UART7_RX, I2C2_SDA, SAI1_SD_A, CAN3_RX.
90 PB4 bidirectional 5 V tolerant I/O that is JTRST after reset, with TIM3_CH1, SPI1_MISO, SPI3_MISO, UART7_TX, I2C3_SDA, SAI1_SCK_A, CAN3_TX, SDIO_D0.
91 PB5 bidirectional 5 V tolerant I/O with LPTIM1_IN1, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI, CAN2_RX, SAI1_FS_A, UART5_RX, SDIO_D3.
92 PB6 bidirectional 5 V tolerant I/O with LPTIM1_ETR, TIM4_CH1, I2C1_SCL, USART1_TX, CAN2_TX, QUADSPI_BK1_NCS, UART5_TX, SDIO_D0.
93 PB7 bidirectional 5 V tolerant I/O with LPTIM1_IN2, TIM4_CH2, I2C1_SDA, DFSDM2_DATIN7, USART1_RX, FSMC_NL.
94 BOOT0 input Dedicated boot mode selection input pin, also VPP additional function.
95 PB8 bidirectional 5 V tolerant I/O with LPTIM1_OUT, TIM4_CH3, TIM10_CH1, I2C1_SCL, SPI5_MOSI, CAN1_RX, I2C3_SDA, UART5_RX, SDIO_D4.
96 PB9 bidirectional 5 V tolerant I/O with TIM4_CH4, TIM11_CH1, I2C1_SDA, SPI2_NSS, CAN1_TX, I2C2_SDA, UART5_TX, SDIO_D5.
97 PE0 bidirectional 5 V tolerant I/O with TIM4_ETR, DFSDM2_CKIN4, UART8_Rx, FSMC_NBL0.
98 PE1 bidirectional 5 V tolerant I/O with DFSDM2_DATIN4, UART8_Tx, FSMC_NBL1.
99 VSS power_in Ground supply pin.
100 VDD power_in Digital supply pin, 1.7 to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32F413VGT6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32f413vgt6-etched.step / stm32f413vgt6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f413vgt6.step / stm32f413vgt6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (208 pp, sha256 f6011311b70d14ef, retrieved 2026-10-06, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF