component
STM32F412RGT6TR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32F412RGT6TR
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
STM32F412RGT6TR from STMicroelectronics, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VBAT | power_in | Battery backup power supply for RTC and backup domain, 1.7 V to 3.6 V operating range. |
| 2 | PC13 | bidirectional | GPIO Port C bit 13, 5 V tolerant I/O with output speed limited to 2 MHz and maximum 30 pF load due to power switch limitation. |
| 3 | PC14-OSC32_IN | bidirectional | GPIO Port C bit 14 / 32 kHz oscillator input, 5 V tolerant I/O except in oscillator mode. |
| 4 | PC15-OSC32_OUT | bidirectional | GPIO Port C bit 15 / 32 kHz oscillator output, 5 V tolerant I/O except in oscillator mode. |
| 5 | PH0 - OSC_IN | bidirectional | GPIO Port H bit 0 / main crystal oscillator input for 4-26 MHz, 5 V tolerant I/O except in oscillator mode. |
| 6 | PH1 - OSC_OUT | bidirectional | GPIO Port H bit 1 / main crystal oscillator output for 4-26 MHz, 5 V tolerant I/O except in oscillator mode. |
| 7 | NRST | input | Reset input with embedded weak pull-up resistor, active low, triggers system reset or wakes from low-power modes. |
| 8 | PC0 | bidirectional | GPIO Port C bit 0, 5 V tolerant I/O with ADC1_10 analog input capability. |
| 9 | PC1 | bidirectional | GPIO Port C bit 1, 5 V tolerant I/O with ADC1_11 analog input capability. |
| 10 | PC2 | bidirectional | GPIO Port C bit 2, 5 V tolerant I/O supporting SPI2_MISO, I2S2, DFSDM1, and FSMC alternate functions with ADC1_12 capability. |
| 11 | PC3 | bidirectional | GPIO Port C bit 3, 5 V tolerant I/O supporting SPI2_MOSI, I2S2_SD, and FSMC alternate functions with ADC1_13 capability. |
| 12 | VSSA | power_in | Analog ground supply and negative reference voltage for ADC, must be connected to VSS through low-impedance path. |
| 13 | VDDA | power_in | Analog power supply and positive reference voltage for ADC, 1.7 V to 3.6 V, must be decoupled with capacitors per application design. |
| 14 | PA0 | bidirectional | GPIO Port A bit 0, 5 V tolerant I/O supporting TIM2/TIM5/TIM8 and USART2 alternate functions with ADC1_0 analog input. |
| 15 | PA1 | bidirectional | GPIO Port A bit 1, 5 V tolerant I/O supporting TIM2/TIM5, SPI4, and QUADSPI alternate functions with ADC1_1 analog input. |
| 16 | PA2 | bidirectional | GPIO Port A bit 2, 5 V tolerant I/O supporting TIM2/TIM5/TIM9, I2S2, USART2, and FSMC alternate functions with ADC1_2 capability. |
| 17 | PA3 | bidirectional | GPIO Port A bit 3, 5 V tolerant I/O supporting TIM2/TIM5/TIM9, I2S2, USART2, and FSMC alternate functions with ADC1_3 capability. |
| 18 | VSS | power_in | Digital ground supply pin for core digital logic circuits. |
| 19 | VDD | power_in | Main digital power supply, 1.7 V to 3.6 V operating range, requires decoupling capacitors close to pin. |
| 20 | PA4 | bidirectional | GPIO Port A bit 4, 5 V tolerant I/O supporting SPI1/SPI3 NSS, USART2, and DFSDM1 alternate functions with ADC1_4 analog input. |
| 21 | PA5 | bidirectional | GPIO Port A bit 5, 5 V tolerant I/O supporting TIM2/TIM8, SPI1 clock, DFSDM1, and FSMC alternate functions with ADC1_5 capability. |
| 22 | PA6 | bidirectional | GPIO Port A bit 6, 5 V tolerant I/O supporting TIM1/TIM3/TIM8/TIM13, SPI1, I2S2, QUADSPI, and SDIO alternate functions with ADC1_6. |
| 23 | PA7 | bidirectional | GPIO Port A bit 7, 5 V tolerant I/O supporting TIM1/TIM3/TIM8/TIM14, SPI1, and QUADSPI alternate functions with ADC1_7 capability. |
| 24 | PC4 | bidirectional | GPIO Port C bit 4, 5 V tolerant I/O supporting I2S1, QUADSPI, and FSMC alternate functions with ADC1_14 analog input. |
| 25 | PC5 | bidirectional | GPIO Port C bit 5, 5 V tolerant I/O supporting I2CFMP1, USART3, QUADSPI, and FSMC alternate functions with ADC1_15 capability. |
| 26 | PB0 | bidirectional | GPIO Port B bit 0, 5 V tolerant I/O supporting TIM1/TIM3/TIM8 and SPI5 alternate functions with ADC1_8 analog input. |
| 27 | PB1 | bidirectional | GPIO Port B bit 1, 5 V tolerant I/O supporting TIM1/TIM3/TIM8, SPI5, DFSDM1, and QUADSPI alternate functions with ADC1_9. |
| 28 | PB2 | bidirectional | GPIO Port B bit 2, 5 V tolerant I/O supporting DFSDM1 and QUADSPI alternate functions; BOOT1 option bit. |
| 29 | PB10 | bidirectional | GPIO Port B bit 10, 5 V tolerant I/O supporting TIM2, I2C2, SPI2, I2S3, USART3, I2CFMP1, and SDIO alternate functions. |
| 30 | VCAP_1 | power_in | Internal voltage regulator output decoupling pin, requires 100 nF capacitor connected to VSS for voltage regulation stability. |
| 31 | VSS | power_in | Digital ground supply pin for core digital logic circuits. |
| 32 | VDD | power_in | Main digital power supply, 1.7 V to 3.6 V operating range, requires decoupling capacitors close to pin. |
| 33 | PB12 | bidirectional | GPIO Port B bit 12, 5 V tolerant I/O supporting TIM1, I2C2, SPI2/SPI4/SPI3, USART3, CAN2, DFSDM1, and FSMC alternate functions. |
| 34 | PB13 | bidirectional | GPIO Port B bit 13, 5 V tolerant I/O supporting TIM1, I2CFMP1, SPI2/SPI4, USART3, CAN2, and DFSDM1 alternate functions. |
| 35 | PB14 | bidirectional | GPIO Port B bit 14, 5 V tolerant I/O supporting TIM1/TIM8/TIM12, I2CFMP1, SPI2, USART3, DFSDM1, FSMC, and SDIO alternate functions. |
| 36 | PB15 | bidirectional | GPIO Port B bit 15, 5 V tolerant I/O supporting RTC output, TIM1/TIM8/TIM12, I2CFMP1, SPI2, DFSDM1, and SDIO alternate functions. |
| 37 | PC6 | bidirectional | |
| 38 | PC7 | bidirectional | |
| 39 | PC8 | bidirectional | |
| 40 | PC9 | bidirectional | |
| 41 | PA8 | bidirectional | |
| 42 | PA9 | bidirectional | |
| 43 | PA10 | bidirectional | |
| 44 | PA11 | bidirectional | |
| 45 | PA12 | bidirectional | |
| 46 | PA13 | bidirectional | |
| 47 | VSS | power_in | Digital ground supply pin for core digital logic circuits. |
| 48 | VDD | power_in | Main digital power supply, 1.7 V to 3.6 V operating range, requires decoupling capacitors close to pin. |
| 49 | PA14 | bidirectional | |
| 50 | PA15 | bidirectional | |
| 51 | PC10 | bidirectional | |
| 52 | PC11 | bidirectional | |
| 53 | PC12 | bidirectional | |
| 54 | PD2 | bidirectional | |
| 55 | PB3 | bidirectional | GPIO Port B bit 3, 5 V tolerant I/O supporting JTAG/SWD debug, TIM2, I2CFMP1, SPI1/SPI3, USART1, and I2C2 alternate functions. |
| 56 | PB4 | bidirectional | GPIO Port B bit 4, 5 V tolerant I/O supporting JTAG reset, TIM3, SPI1/SPI3, I2S3, I2C3, and SDIO alternate functions. |
| 57 | PB5 | bidirectional | GPIO Port B bit 5, 5 V tolerant I/O supporting TIM3, I2C1, SPI1/SPI3, CAN2, and SDIO alternate functions. |
| 58 | PB6 | bidirectional | GPIO Port B bit 6, 5 V tolerant I/O supporting TIM4, I2C1, USART1, CAN2, QUADSPI, and SDIO alternate functions. |
| 59 | PB7 | bidirectional | GPIO Port B bit 7, 5 V tolerant I/O supporting TIM4, I2C1, USART1, and FSMC alternate functions. |
| 60 | BOOT0 | input | Boot mode selection pin sampled at power-up to select flash memory or embedded bootloader execution; requires external pull-up or pull-down. |
| 61 | PB8 | bidirectional | GPIO Port B bit 8, 5 V tolerant I/O supporting TIM4/TIM10, I2C1, SPI5, CAN1, I2C3, and SDIO alternate functions. |
| 62 | PB9 | bidirectional | GPIO Port B bit 9, 5 V tolerant I/O supporting TIM4/TIM11, I2C1, SPI2, CAN1, I2C2, and SDIO alternate functions. |
| 63 | VSS | power_in | Digital ground supply pin for core digital logic circuits. |
| 64 | VDD | power_in | Main digital power supply, 1.7 V to 3.6 V operating range, requires decoupling capacitors close to pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
STM32F412RGT6TR - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
stm32f412rgt6tr-etched.step/stm32f412rgt6tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f412rgt6tr.step/stm32f412rgt6tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (201 pp, sha256
d640babe702a369d, retrieved 2026-09-29, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).