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STM32F411VCT6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

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docs stm32f411vct6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers stm32f411vct6: viewers · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Initial commit: component/stm32f411vct6 · Ray 4d ago
stm32f411vct6-etched.fit.json stm32f411vct6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
stm32f411vct6-etched.glb stm32f411vct6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
stm32f411vct6-etched.step stm32f411vct6: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
stm32f411vct6.glb Publish 0.1.0 · Ray 4d ago
stm32f411vct6.kicad_mod Publish 0.1.0 · Ray 4d ago
stm32f411vct6.kicad_sym Publish 0.1.0 · Ray 4d ago
stm32f411vct6.lbr Publish 0.1.0 · Ray 4d ago
stm32f411vct6.step Publish 0.1.0 · Ray 4d ago

STM32F411VCT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32F411VCT6 from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5 V-tolerant I/O with alternate functions TRACECLK, SPI4_SCK/I2S4_CK, SPI5_SCK/I2S5_CK, EVENTOUT.
2 PE3 bidirectional 5 V-tolerant I/O with alternate functions TRACED0, EVENTOUT.
3 PE4 bidirectional 5 V-tolerant I/O with alternate functions TRACED1, SPI4_NSS/I2S4_WS, SPI5_NSS/I2S5_WS, EVENTOUT.
4 PE5 bidirectional 5 V-tolerant I/O with alternate functions TRACED2, TIM9_CH1, SPI4_MISO, SPI5_MISO, EVENTOUT.
5 PE6 bidirectional 5 V-tolerant I/O with alternate functions TRACED3, TIM9_CH2, SPI4_MOSI/I2S4_SD, SPI5_MOSI/I2S5_SD, EVENTOUT.
6 VBAT power_in Backup domain supply pin for RTC and backup registers.
7 PC13-ANTI_TAMP bidirectional 5 V-tolerant I/O supplied through the power switch (3 mA sink limit), output speed max 2 MHz with 30 pF load, not for use as a current source; additional functions RTC_AMP1, RTC_OUT, RTC_TS.
8 PC14-OSC32_IN bidirectional I/O supplied through the power switch (output limited to 2 MHz, 30 pF, no current source use); additional function OSC32_IN (32 kHz oscillator input).
9 PC15-OSC32_OUT bidirectional I/O supplied through the power switch (output limited to 2 MHz, 30 pF, no current source use); additional function OSC32_OUT (32 kHz oscillator output).
10 VSS power_in Ground supply pin.
11 VDD power_in Digital supply pin (1.7 V to 3.6 V application supply and I/Os).
12 PH0-OSC_IN bidirectional I/O that is 5 V tolerant except in oscillator mode; additional function OSC_IN (main 4-26 MHz oscillator input).
13 PH1-OSC_OUT bidirectional I/O that is 5 V tolerant except in oscillator mode; additional function OSC_OUT (main oscillator output).
14 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor; alternate function EVENTOUT.
15 PC0 bidirectional 5 V-tolerant I/O with EVENTOUT and ADC1_10 analog input.
16 PC1 bidirectional 5 V-tolerant I/O with EVENTOUT and ADC1_11 analog input.
17 PC2 bidirectional 5 V-tolerant I/O with SPI2_MISO, I2S2ext_SD, EVENTOUT and ADC1_12 analog input.
18 PC3 bidirectional 5 V-tolerant I/O with SPI2_MOSI/I2S2_SD, EVENTOUT and ADC1_13 analog input.
19 VDD power_in Digital supply pin (1.7 V to 3.6 V application supply and I/Os).
20 VSSA power_in Analog ground supply pin.
21 VREF+ power_in Positive reference voltage supply pin for the ADC.
22 VDDA power_in Analog supply pin.
23 PA0-WKUP bidirectional Standard 3.3 V I/O with TIM2_CH1/TIM2_ETR, TIM5_CH1, USART2_CTS, EVENTOUT, ADC1_0 and WKUP1 wakeup.
24 PA1 bidirectional 5 V-tolerant I/O with TIM2_CH2, TIM5_CH2, SPI4_MOSI/I2S4_SD, USART2_RTS, EVENTOUT and ADC1_1.
25 PA2 bidirectional 5 V-tolerant I/O with TIM2_CH3, TIM5_CH3, TIM9_CH1, I2S2_CKIN, USART2_TX, EVENTOUT and ADC1_2.
26 PA3 bidirectional 5 V-tolerant I/O with TIM2_CH4, TIM5_CH4, TIM9_CH2, I2S2_MCK, USART2_RX, EVENTOUT and ADC1_3.
27 VSS power_in Ground supply pin.
28 VDD power_in Digital supply pin; listed in the table as type I, FT with EVENTOUT alternate function.
29 PA4 bidirectional 5 V-tolerant I/O with SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, USART2_CK, EVENTOUT and ADC1_4.
30 PA5 bidirectional 5 V-tolerant I/O with TIM2_CH1/TIM2_ETR, SPI1_SCK/I2S1_CK, EVENTOUT and ADC1_5.
31 PA6 bidirectional 5 V-tolerant I/O with TIM1_BKIN, TIM3_CH1, SPI1_MISO, I2S2_MCK, SDIO_CMD, EVENTOUT and ADC1_6.
32 PA7 bidirectional 5 V-tolerant I/O with TIM1_CH1N, TIM3_CH2, SPI1_MOSI/I2S1_SD, EVENTOUT and ADC1_7.
33 PC4 bidirectional 5 V-tolerant I/O with EVENTOUT and ADC1_14 analog input.
34 PC5 bidirectional 5 V-tolerant I/O with EVENTOUT and ADC1_15 analog input.
35 PB0 bidirectional 5 V-tolerant I/O with TIM1_CH2N, TIM3_CH3, SPI5_SCK/I2S5_CK, EVENTOUT and ADC1_8.
36 PB1 bidirectional 5 V-tolerant I/O with TIM1_CH3N, TIM3_CH4, SPI5_NSS/I2S5_WS, EVENTOUT and ADC1_9.
37 PB2 bidirectional 5 V-tolerant I/O with EVENTOUT; additional function BOOT1.
38 PE7 bidirectional 5 V-tolerant I/O with TIM1_ETR, EVENTOUT.
39 PE8 bidirectional 5 V-tolerant I/O with TIM1_CH1N, EVENTOUT.
40 PE9 bidirectional 5 V-tolerant I/O with TIM1_CH1, EVENTOUT.
41 PE10 bidirectional 5 V-tolerant I/O with TIM1_CH2N, EVENTOUT.
42 PE11 bidirectional 5 V-tolerant I/O with TIM1_CH2, SPI4_NSS/I2S4_WS, SPI5_NSS/I2S5_WS, EVENTOUT.
43 PE12 bidirectional 5 V-tolerant I/O with TIM1_CH3N, SPI4_SCK/I2S4_CK, SPI5_SCK/I2S5_CK, EVENTOUT.
44 PE13 bidirectional 5 V-tolerant I/O with TIM1_CH3, SPI4_MISO, SPI5_MISO, EVENTOUT.
45 PE14 bidirectional 5 V-tolerant I/O with TIM1_CH4, SPI4_MOSI/I2S4_SD, SPI5_MOSI/I2S5_SD, EVENTOUT.
46 PE15 bidirectional 5 V-tolerant I/O with TIM1_BKIN, EVENTOUT.
47 PB10 bidirectional 5 V-tolerant I/O with TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, I2S3_MCK, SDIO_D7, EVENTOUT.
48 VCAP_1 passive Supply pin for the 1.2 V internal regulator output, connecting an external capacitor.
49 VSS power_in Ground supply pin.
50 VDD power_in Digital supply pin (1.7 V to 3.6 V application supply and I/Os).
51 PB12 bidirectional 5 V-tolerant I/O with TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, SPI4_NSS/I2S4_WS, SPI3_SCK/I2S3_CK, EVENTOUT.
52 PB13 bidirectional 5 V-tolerant I/O with TIM1_CH1N, SPI2_SCK/I2S2_CK, SPI4_SCK/I2S4_CK, EVENTOUT.
53 PB14 bidirectional 5 V-tolerant I/O with TIM1_CH2N, SPI2_MISO, I2S2ext_SD, SDIO_D6, EVENTOUT.
54 PB15 bidirectional 5 V-tolerant I/O with RTC_50Hz, TIM1_CH3N, SPI2_MOSI/I2S2_SD, SDIO_CK, EVENTOUT; additional function RTC_REFIN.
55 PD8 bidirectional 5 V-tolerant general-purpose I/O with no alternate function listed.
56 PD9 bidirectional 5 V-tolerant general-purpose I/O with no alternate function listed.
57 PD10 bidirectional 5 V-tolerant general-purpose I/O with no alternate function listed.
58 PD11 bidirectional 5 V-tolerant general-purpose I/O with no alternate function listed.
59 PD12 bidirectional 5 V-tolerant I/O with TIM4_CH1, EVENTOUT.
60 PD13 bidirectional 5 V-tolerant I/O with TIM4_CH2, EVENTOUT.
61 PD14 bidirectional 5 V-tolerant I/O with TIM4_CH3, EVENTOUT.
62 PD15 bidirectional 5 V-tolerant I/O with TIM4_CH4, EVENTOUT.
63 PC6 bidirectional 5 V-tolerant I/O with TIM3_CH1, I2S2_MCK, USART6_TX, SDIO_D6, EVENTOUT.
64 PC7 bidirectional 5 V-tolerant I/O with TIM3_CH2, SPI2_SCK/I2S2_CK, I2S3_MCK, USART6_RX, SDIO_D7, EVENTOUT.
65 PC8 bidirectional 5 V-tolerant I/O with TIM3_CH3, USART6_CK, SDIO_D0, EVENTOUT.
66 PC9 bidirectional 5 V-tolerant I/O with MCO_2, TIM3_CH4, I2C3_SDA, I2S2_CKIN, SDIO_D1, EVENTOUT.
67 PA8 bidirectional 5 V-tolerant I/O with MCO_1, TIM1_CH1, I2C3_SCL, USART1_CK, USB_FS_SOF, SDIO_D1, EVENTOUT.
68 PA9 bidirectional 5 V-tolerant I/O with TIM1_CH2, I2C3_SMBA, USART1_TX, USB_FS_VBUS, SDIO_D2, EVENTOUT; additional function OTG_FS_VBUS.
69 PA10 bidirectional 5 V-tolerant I/O with TIM1_CH3, SPI5_MOSI/I2S5_SD, USART1_RX, USB_FS_ID, EVENTOUT.
70 PA11 bidirectional 5 V-tolerant I/O with TIM1_CH4, SPI4_MISO, USART1_CTS, USART6_TX, USB_FS_DM, EVENTOUT.
71 PA12 bidirectional 5 V-tolerant I/O with TIM1_ETR, SPI5_MISO, USART1_RTS, USART6_RX, USB_FS_DP, EVENTOUT.
72 PA13 bidirectional 5 V-tolerant I/O; JTMS-SWDIO debug function after reset, EVENTOUT.
73 VCAP_2 passive Supply pin for the 1.2 V internal regulator output, connecting an external capacitor.
74 VSS power_in Ground supply pin.
75 VDD power_in Digital supply pin (1.7 V to 3.6 V application supply and I/Os).
76 PA14 bidirectional 5 V-tolerant I/O; JTCK-SWCLK debug function after reset, EVENTOUT.
77 PA15 bidirectional 5 V-tolerant I/O with JTDI after reset, TIM2_CH1/TIM2_ETR, SPI1_NSS/I2S1_WS, SPI3_NSS/I2S3_WS, USART1_TX, EVENTOUT.
78 PC10 bidirectional 5 V-tolerant I/O with SPI3_SCK/I2S3_CK, SDIO_D2, EVENTOUT.
79 PC11 bidirectional 5 V-tolerant I/O with I2S3ext_SD, SPI3_MISO, SDIO_D3, EVENTOUT.
80 PC12 bidirectional 5 V-tolerant I/O with SPI3_MOSI/I2S3_SD, SDIO_CK, EVENTOUT.
81 PD0 bidirectional 5 V-tolerant I/O with EVENTOUT.
82 PD1 bidirectional 5 V-tolerant I/O with EVENTOUT.
83 PD2 bidirectional 5 V-tolerant I/O with TIM3_ETR, SDIO_CMD, EVENTOUT.
84 PD3 bidirectional 5 V-tolerant I/O with SPI2_SCK/I2S2_CK, USART2_CTS, EVENTOUT.
85 PD4 bidirectional 5 V-tolerant I/O with USART2_RTS, EVENTOUT.
86 PD5 bidirectional 5 V-tolerant I/O with USART2_TX, EVENTOUT.
87 PD6 bidirectional 5 V-tolerant I/O with SPI3_MOSI/I2S3_SD, USART2_RX, EVENTOUT.
88 PD7 bidirectional 5 V-tolerant I/O with USART2_CK, EVENTOUT.
89 PB3 bidirectional 5 V-tolerant I/O with JTDO-SWO after reset, TIM2_CH2, SPI1_SCK/I2S1_CK, SPI3_SCK/I2S3_CK, USART1_RX, I2C2_SDA, EVENTOUT.
90 PB4 bidirectional 5 V-tolerant I/O with JTRST after reset, TIM3_CH1, SPI1_MISO, SPI3_MISO, I2S3ext_SD, I2C3_SDA, SDIO_D0, EVENTOUT.
91 PB5 bidirectional Standard 3.3 V I/O with TIM3_CH2, I2C1_SMBA, SPI1_MOSI/I2S1_SD, SPI3_MOSI/I2S3_SD, SDIO_D3, EVENTOUT.
92 PB6 bidirectional 5 V-tolerant I/O with TIM4_CH1, I2C1_SCL, USART1_TX, EVENTOUT.
93 PB7 bidirectional 5 V-tolerant I/O with TIM4_CH2, I2C1_SDA, USART1_RX, SDIO_D0, EVENTOUT.
94 BOOT0 input Dedicated boot mode selection input pin; additional function VPP.
95 PB8 bidirectional 5 V-tolerant I/O with TIM4_CH3, TIM10_CH1, I2C1_SCL, SPI5_MOSI/I2S5_SD, I2C3_SDA, SDIO_D4, EVENTOUT.
96 PB9 bidirectional 5 V-tolerant I/O with TIM4_CH4, TIM11_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, I2C2_SDA, SDIO_D5, EVENTOUT.
97 PE0 bidirectional 5 V-tolerant I/O with TIM4_ETR, EVENTOUT.
98 PE1 bidirectional 5 V-tolerant I/O with EVENTOUT.
99 VSS power_in Ground supply pin.
100 VDD power_in Digital supply pin (1.7 V to 3.6 V application supply and I/Os).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32F411VCT6
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32f411vct6-etched.step / stm32f411vct6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f411vct6.step / stm32f411vct6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (149 pp, sha256 19c5df0b396382fa, retrieved 2026-10-01, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF