# STM32F410RBI6

**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · UFBGA-64

STM32F410RBI6 from STMicroelectronics, in a UFBGA-64. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| A1 | PC14-OSC32_IN | bidirectional | 5 V-tolerant I/O (FT, except in analog or oscillator mode) supplied through the power switch, which sinks only 3 mA, so output speed must not exceed 2 MHz at 30 pF and the pin must not source current such as driving an LED; it doubles as the 32 kHz oscillator input. |
| A2 | VBAT | power_in | Power supply for the RTC, the external 32 kHz oscillator and backup registers when VDD is absent, specified at 1.65 to 3.6 V. |
| A3 | PB9 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM11_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, I2C2_SDA and EVENTOUT. |
| A4 | BOOT0 | input | Dedicated BOOT0 pin that, together with BOOT1, selects one of the three boot options (user Flash, system memory or embedded SRAM) at startup. |
| A5 | PB3 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions JTDO-SWO, I2C4_SDA, SPI1_SCK/I2S1_CK, USART1_RX, I2C2_SDA and EVENTOUT. |
| A6 | PC12 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TRACED2, TIM11_CH1 and EVENTOUT. |
| A7 | PA15 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions JTDI, SPI1_NSS/I2S1_WS, USART1_TX and EVENTOUT. |
| A8 | PA12 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_ETR, SPI5_MISO, USART1_RTS, USART6_RX and EVENTOUT. |
| B1 | PC15-OSC32_OUT | bidirectional | Supplied through the power switch (3 mA sink limit), so output use is limited to 2 MHz at 30 pF and it must not act as a current source; it doubles as the 32 kHz oscillator output. |
| B2 | PC13 | bidirectional | Supplied through the power switch (3 mA sink limit), so output use is limited to 2 MHz at 30 pF and it must not act as a current source such as driving an LED; additional functions RTC_TAMP1, RTC_OUT and RTC_TS. |
| B3 | PB8 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions LPTIM1_OUT, I2C1_SCL, SPI5_MOSI/I2S5_SD and EVENTOUT. |
| B4 | PB7 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions LPTIM1_IN2, I2C1_SDA, USART1_RX and EVENTOUT. |
| B5 | PB11 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TRACED3, TIM5_CH4, I2C2_SDA, I2S2_CKIN and EVENTOUT. |
| B6 | PC11 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TRACED1, TIM5_CH3 and EVENTOUT. |
| B7 | PA14 | bidirectional | 5 V-tolerant I/O (FT) with alternate function JTCK-SWCLK and EVENTOUT. |
| B8 | PA9 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH2, USART1_TX and EVENTOUT. |
| C1 | PH0-OSC_IN | bidirectional | I/O that is 5 V tolerant (FT) except in oscillator mode, and serves as the high-speed external oscillator input OSC_IN. |
| C2 | VSS | power_in | Ground pin of the device, to be connected to the board ground. |
| C3 | PDR_ON | input | Input (FT) that enables the internal power supply supervisor (POR/PDR) when held high and disables it when set low. |
| C4 | PB6 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions LPTIM1_ETR, I2C1_SCL, USART1_TX and EVENTOUT. |
| C5 | PB4 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions JTRST, SPI1_MISO and EVENTOUT. |
| C6 | PC10 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TRACED0, TIM5_CH2 and EVENTOUT. |
| C7 | PA13 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions JTMS-SWDIO and EVENTOUT. |
| C8 | PA8 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions MCO_1, TIM1_CH1, I2C4_SCL, USART1_CK and EVENTOUT. |
| D1 | PH1-OSC_OUT | bidirectional | I/O that is 5 V tolerant (FT) except in oscillator mode, and serves as the high-speed external oscillator output OSC_OUT. |
| D2 | VDD | power_in | Power supply pin for the I/Os and the internal regulator, specified at 1.7 to 3.6 V. |
| D3 | PC0 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions LPTIM1_IN1 and EVENTOUT, additional functions ADC1_10 and WKUP2. |
| D4 | PB5 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions LPTIM1_IN1, I2C1_SMBA, SPI1_MOSI/I2S1_SD and EVENTOUT. |
| D5 | VSS | power_in | Ground pin of the device, to be connected to the board ground. |
| D6 | VSS | power_in | Ground pin of the device, to be connected to the board ground. |
| D7 | PA11 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH4, USART1_CTS, USART6_TX and EVENTOUT. |
| D8 | PC9 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions MCO_2, I2C4_SDA, I2S2_CKIN and EVENTOUT. |
| E1 | NRST | bidirectional | Bidirectional reset pin with an embedded weak pull-up resistor. |
| E2 | PC1 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions LPTIM1_OUT and EVENTOUT, additional functions ADC1_11 and WKUP3. |
| E3 | PC2 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions LPTIM1_IN2, SPI2_MISO and EVENTOUT, additional function ADC1_12. |
| E4 | VDD | power_in | Power supply pin for the I/Os and the internal regulator, specified at 1.7 to 3.6 V. |
| E5 | VDD | power_in | Power supply pin for the I/Os and the internal regulator, specified at 1.7 to 3.6 V. |
| E6 | PA10 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH3, SPI5_MOSI/I2S5_SD, USART1_RX and EVENTOUT. |
| E7 | PC7 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions I2C4_SDA, SPI2_SCK/I2S2_CK, I2S1_MCK, USART6_RX and EVENTOUT. |
| E8 | PC8 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions USART6_CK and EVENTOUT. |
| F1 | VSSA/VREF- | power_in | Analog ground pin that must be connected to VSS, also serving as the negative reference voltage (VREF-) of the ADC. |
| F2 | PC3 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions LPTIM1_ETR, SPI2_MOSI/I2S2_SD and EVENTOUT, additional function ADC1_13. |
| F3 | PA2 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM5_CH3, TIM9_CH1, I2S2_CKIN, USART2_TX and EVENTOUT, additional function ADC1_2. |
| F4 | PA5 | bidirectional | Standard 3.3 V I/O (TC, not 5 V tolerant) with alternate functions SPI1_SCK/I2S1_CK and EVENTOUT, additional functions ADC1_5 and DAC_OUT1. |
| F5 | PB0 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH2N, SPI5_SCK/I2S5_CK and EVENTOUT, additional function ADC1_8. |
| F6 | PC6 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TRACECLK, I2C4_SCL, I2S2_MCK, USART6_TX and EVENTOUT. |
| F7 | PB15 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions RTC_50Hz, TIM1_CH3N, I2C4_SCL, SPI2_MOSI/I2S2_SD and EVENTOUT. |
| F8 | PB14 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH2N, I2C4_SDA, SPI2_MISO and EVENTOUT. |
| G1 | VREF+ | power_in | Positive reference voltage pin (VREF+) for the ADC. |
| G2 | PA0 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM5_CH1, USART2_CTS and EVENTOUT, additional functions ADC1_0 and WKUP1. |
| G3 | PA3 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM5_CH4, TIM9_CH2, I2S2_MCK, USART2_RX and EVENTOUT, additional function ADC1_3. |
| G4 | PA6 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_BKIN, SPI1_MISO, I2S2_MCK and EVENTOUT, additional function ADC1_6. |
| G5 | PC4 | bidirectional | 5 V-tolerant I/O (FT) with alternate function TIM9_CH1 and EVENTOUT, additional function ADC1_14. |
| G6 | PB1 | bidirectional | Standard 3.3 V I/O (TC, not 5 V tolerant) with alternate functions TIM1_CH3N, SPI5_NSS/I2S5_WS and EVENTOUT, additional function ADC1_9. |
| G7 | PB10 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions I2C2_SCL, SPI2_SCK/I2S2_CK, I2S1_MCK, I2C4_SCL and EVENTOUT. |
| G8 | PB13 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH1N, I2C4_SMBA, SPI2_SCK/I2S2_CK and EVENTOUT. |
| H1 | VDDA | power_in | External analog supply for the ADC, reset blocks, RCs and PLL, specified at 1.7 to 3.6 V and to be connected to VDD with decoupling. |
| H2 | PA1 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM5_CH2, USART2_RTS and EVENTOUT, additional function ADC1_1. |
| H3 | PA4 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions SPI1_NSS/I2S1_WS, USART2_CK and EVENTOUT, additional function ADC1_4. |
| H4 | PA7 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_CH1N, SPI1_MOSI/I2S1_SD and EVENTOUT, additional function ADC1_7. |
| H5 | PC5 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM9_CH2, I2C4_SMBA and EVENTOUT, additional function ADC1_15. |
| H6 | PB2 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions LPTIM1_OUT and EVENTOUT, additional function BOOT1. |
| H7 | VCAP_1 | power_out | Internal regulator output pin that must be connected to an external capacitor as specified for VCAP_1 in section 6.3.2. |
| H8 | PB12 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions TIM1_BKIN, TIM5_CH1, I2C2_SMBA, SPI2_NSS/I2S2_WS and EVENTOUT. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFBGA-64 |
| Category | Embedded Processors & Controllers |
| Pins | 64 |

## CAD (KiCad official)

- Symbol: `STM32F410RBI6`
- Footprint: `Package_BGA:UFBGA-64_5x5mm_Layout8x8_P0.5mm`
- 3D model: UFBGA-64 (KiCad packages3D, STEP)
- 3D model files: `stm32f410rbi6-etched.step` / `stm32f410rbi6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stm32f410rbi6.step` / `stm32f410rbi6.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588953112200040448) (143 pp, sha256 `71946dd94c3eb53f`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stm32f410rbi6-datasheet.pdf)