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Contents

README

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STM32F407ZET6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-144(20x20)

STM32F407ZET6 from STMicroelectronics, in a LQFP-144(20x20). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5V-tolerant I/O; AF0 TRACECLK, AF12 FSMC_A23/ETH_MII_TXD3, AF15 EVENTOUT; floating input after reset.
2 PE3 bidirectional 5V-tolerant I/O; AF0 TRACED0, AF12 FSMC_A19, AF15 EVENTOUT.
3 PE4 bidirectional 5V-tolerant I/O; AF0 TRACED1, AF12 FSMC_A20/DCMI_D4, AF15 EVENTOUT.
4 PE5 bidirectional 5V-tolerant I/O; AF0 TRACED2, AF3 TIM9_CH1, AF12 FSMC_A21/DCMI_D6, AF15 EVENTOUT.
5 PE6 bidirectional 5V-tolerant I/O; AF0 TRACED3, AF3 TIM9_CH2, AF12 FSMC_A22/DCMI_D7, AF15 EVENTOUT.
6 VBAT power_in Battery backup supply pin (1.8-3.6V) for RTC, 20x32-bit backup registers and backup SRAM when VDD is removed.
7 PC13 bidirectional 5V-tolerant I/O supplied through an internal power switch limited to 3 mA sink, output speed <=2 MHz with <=30 pF load and not usable as a current source; main function is RTC_OUT/RTC_TAMP1/RTC_TS, AF15 EVENTOUT.
8 PC14 bidirectional 5V-tolerant I/O PC14/OSC32_IN, supplied through internal power switch (3 mA max, <=2 MHz, <=30 pF load); additional function OSC32_IN for the 32.768 kHz RTC crystal, AF15 EVENTOUT.
9 PC15 bidirectional 5V-tolerant I/O PC15/OSC32_OUT, supplied through internal power switch (3 mA max, <=2 MHz, <=30 pF load); additional function OSC32_OUT for the 32.768 kHz RTC crystal, AF15 EVENTOUT.
10 PF0 bidirectional 5V-tolerant I/O; AF4 I2C2_SDA, AF12 FSMC_A0, AF15 EVENTOUT.
11 PF1 bidirectional 5V-tolerant I/O; AF4 I2C2_SCL, AF12 FSMC_A1, AF15 EVENTOUT.
12 PF2 bidirectional 5V-tolerant I/O; AF4 I2C2_SMBA, AF12 FSMC_A2, AF15 EVENTOUT.
13 PF3 bidirectional 5V-tolerant I/O; AF12 FSMC_A3, AF15 EVENTOUT; additional function ADC3_IN9.
14 PF4 bidirectional 5V-tolerant I/O; AF12 FSMC_A4, AF15 EVENTOUT; additional function ADC3_IN14.
15 PF5 bidirectional 5V-tolerant I/O; AF12 FSMC_A5, AF15 EVENTOUT; additional function ADC3_IN15.
16 VSS power_in Digital ground supply pin.
17 VDD power_in Digital supply voltage pin, 1.8 V to 3.6 V.
18 PF6 bidirectional 5V-tolerant I/O; AF3 TIM10_CH1, AF12 FSMC_NIORD, AF15 EVENTOUT; additional function ADC3_IN4.
19 PF7 bidirectional 5V-tolerant I/O; AF3 TIM11_CH1, AF12 FSMC_NREG, AF15 EVENTOUT; additional function ADC3_IN5.
20 PF8 bidirectional 5V-tolerant I/O; AF9 TIM13_CH1, AF12 FSMC_NIOWR, AF15 EVENTOUT; additional function ADC3_IN6.
21 PF9 bidirectional 5V-tolerant I/O; AF9 TIM14_CH1, AF12 FSMC_CD, AF15 EVENTOUT; additional function ADC3_IN7.
22 PF10 bidirectional 5V-tolerant I/O; AF12 FSMC_INTR, AF15 EVENTOUT; additional function ADC3_IN8.
23 PH0 bidirectional 5V-tolerant I/O PH0/OSC_IN; AF15 EVENTOUT; additional function OSC_IN for the 4-26 MHz HSE crystal oscillator.
24 PH1 bidirectional 5V-tolerant I/O PH1/OSC_OUT; AF15 EVENTOUT; additional function OSC_OUT for the 4-26 MHz HSE crystal oscillator.
25 NRST bidirectional Bidirectional reset pin with embedded weak pull-up resistor; active-low device reset input/output, external RC/diode protection recommended per Figure 38.
26 PC0 bidirectional 5V-tolerant I/O; AF10 OTG_HS_ULPI_STP, AF15 EVENTOUT; additional function ADC123_IN10.
27 PC1 bidirectional 5V-tolerant I/O; AF11 ETH_MDC, AF15 EVENTOUT; additional function ADC123_IN11.
28 PC2 bidirectional 5V-tolerant I/O; AF5 SPI2_MISO/I2S2ext_SD, AF10 OTG_HS_ULPI_DIR, AF11 ETH_MII_TXD2, AF15 EVENTOUT; additional function ADC123_IN12.
29 PC3 bidirectional 5V-tolerant I/O; AF5 SPI2_MOSI/I2S2_SD, AF10 OTG_HS_ULPI_NXT, AF11 ETH_MII_TX_CLK, AF15 EVENTOUT; additional function ADC123_IN13.
30 VDD power_in Digital supply voltage pin, 1.8 V to 3.6 V.
31 VSSA power_in Analog ground supply pin for the ADC/DAC and reset block.
32 VREF+ power_in Positive analog reference voltage input for the ADC/DAC, range 1.8 V to VDDA.
33 VDDA power_in Analog supply voltage pin, 1.8 V to 3.6 V, feeding the ADC/DAC, reset block, RC oscillators and PLL.
34 PA0 bidirectional 5V-tolerant I/O PA0/WKUP; AF1 TIM2_CH1_ETR, AF2 TIM5_CH1, AF3 TIM8_ETR, AF7 USART2_CTS, AF8 UART4_TX, AF11 ETH_MII_CRS, AF15 EVENTOUT; additional function ADC123_IN0/WKUP.
35 PA1 bidirectional 5V-tolerant I/O; AF1 TIM2_CH2, AF2 TIM5_CH2, AF7 USART2_RTS, AF8 UART4_RX, AF11 ETH_RMII_REF_CLK/ETH_MII_RX_CLK, AF15 EVENTOUT; additional function ADC123_IN1.
36 PA2 bidirectional 5V-tolerant I/O; AF1 TIM2_CH3, AF2 TIM5_CH3, AF3 TIM9_CH1, AF7 USART2_TX, AF11 ETH_MDIO, AF15 EVENTOUT; additional function ADC123_IN2.
37 PA3 bidirectional 5V-tolerant I/O; AF1 TIM2_CH4, AF2 TIM5_CH4, AF3 TIM9_CH2, AF7 USART2_RX, AF10 OTG_HS_ULPI_D0, AF11 ETH_MII_COL, AF15 EVENTOUT; additional function ADC123_IN3.
38 VSS power_in Digital ground supply pin.
39 VDD power_in Digital supply voltage pin, 1.8 V to 3.6 V.
40 PA4 bidirectional 3.3V-tolerant I/O directly connected to the ADC (TTa); AF5 SPI1_NSS/SPI3_NSS, AF6 I2S3_WS, AF7 USART2_CK, AF10 OTG_HS_SOF, AF13 DCMI_HSYNC, AF15 EVENTOUT; additional function ADC12_IN4/DAC_OUT1.
41 PA5 bidirectional 3.3V-tolerant I/O directly connected to the ADC (TTa); AF1 TIM2_CH1_ETR, AF3 TIM8_CH1N, AF5 SPI1_SCK, AF10 OTG_HS_ULPI_CK, AF15 EVENTOUT; additional function ADC12_IN5/DAC_OUT2.
42 PA6 bidirectional 5V-tolerant I/O; AF1 TIM1_BKIN, AF2 TIM3_CH1, AF3 TIM8_BKIN, AF5 SPI1_MISO, AF9 TIM13_CH1, AF13 DCMI_PIXCLK, AF15 EVENTOUT; additional function ADC12_IN6.
43 PA7 bidirectional 5V-tolerant I/O; AF1 TIM1_CH1N, AF2 TIM3_CH2, AF3 TIM8_CH1N, AF5 SPI1_MOSI, AF9 TIM14_CH1, AF11 ETH_MII_RX_DV/ETH_RMII_CRS_DV, AF15 EVENTOUT; additional function ADC12_IN7.
44 PC4 bidirectional 5V-tolerant I/O; AF11 ETH_RMII_RX_D0/ETH_MII_RX_D0, AF15 EVENTOUT; additional function ADC12_IN14.
45 PC5 bidirectional 5V-tolerant I/O; AF11 ETH_RMII_RX_D1/ETH_MII_RX_D1, AF15 EVENTOUT; additional function ADC12_IN15.
46 PB0 bidirectional 5V-tolerant I/O; AF1 TIM1_CH2N, AF2 TIM3_CH3, AF3 TIM8_CH2N, AF10 OTG_HS_ULPI_D1, AF11 ETH_MII_RXD2, AF15 EVENTOUT; additional function ADC12_IN8.
47 PB1 bidirectional 5V-tolerant I/O; AF1 TIM1_CH3N, AF2 TIM3_CH4, AF3 TIM8_CH3N, AF10 OTG_HS_ULPI_D2, AF11 ETH_MII_RXD3, AF15 EVENTOUT; additional function ADC12_IN9.
48 PB2 bidirectional 5V-tolerant I/O PB2/BOOT1, AF15 EVENTOUT; dual function with BOOT1 sampled at reset for boot mode selection.
49 PF11 bidirectional 5V-tolerant I/O; AF13 DCMI_D12, AF15 EVENTOUT.
50 PF12 bidirectional 5V-tolerant I/O; AF12 FSMC_A6, AF15 EVENTOUT.
51 VSS power_in Digital ground supply pin.
52 VDD power_in Digital supply voltage pin, 1.8 V to 3.6 V.
53 PF13 bidirectional 5V-tolerant I/O; AF12 FSMC_A7, AF15 EVENTOUT.
54 PF14 bidirectional 5V-tolerant I/O; AF12 FSMC_A8, AF15 EVENTOUT.
55 PF15 bidirectional 5V-tolerant I/O; AF12 FSMC_A9, AF15 EVENTOUT.
56 PG0 bidirectional 5V-tolerant I/O; AF12 FSMC_A10, AF15 EVENTOUT.
57 PG1 bidirectional 5V-tolerant I/O; AF12 FSMC_A11, AF15 EVENTOUT.
58 PE7 bidirectional 5V-tolerant I/O; AF1 TIM1_ETR, AF12 FSMC_D4, AF15 EVENTOUT.
59 PE8 bidirectional 5V-tolerant I/O; AF1 TIM1_CH1N, AF12 FSMC_D5, AF15 EVENTOUT.
60 PE9 bidirectional 5V-tolerant I/O; AF1 TIM1_CH1, AF12 FSMC_D6, AF15 EVENTOUT.
61 VSS power_in Digital ground supply pin.
62 VDD power_in Digital supply voltage pin, 1.8 V to 3.6 V.
63 PE10 bidirectional 5V-tolerant I/O; AF1 TIM1_CH2N, AF12 FSMC_D7, AF15 EVENTOUT.
64 PE11 bidirectional 5V-tolerant I/O; AF1 TIM1_CH2, AF12 FSMC_D8, AF15 EVENTOUT.
65 PE12 bidirectional 5V-tolerant I/O; AF1 TIM1_CH3N, AF12 FSMC_D9, AF15 EVENTOUT.
66 PE13 bidirectional 5V-tolerant I/O; AF1 TIM1_CH3, AF12 FSMC_D10, AF15 EVENTOUT.
67 PE14 bidirectional 5V-tolerant I/O; AF1 TIM1_CH4, AF12 FSMC_D11, AF15 EVENTOUT.
68 PE15 bidirectional 5V-tolerant I/O; AF1 TIM1_BKIN, AF12 FSMC_D12, AF15 EVENTOUT.
69 PB10 bidirectional 5V-tolerant I/O; AF1 TIM2_CH3, AF4 I2C2_SCL, AF5 SPI2_SCK/I2S2_CK, AF7 USART3_TX, AF10 OTG_HS_ULPI_D3, AF11 ETH_MII_RX_ER, AF15 EVENTOUT.
70 PB11 bidirectional 5V-tolerant I/O; AF1 TIM2_CH4, AF4 I2C2_SDA, AF7 USART3_RX, AF10 OTG_HS_ULPI_D4, AF11 ETH_RMII_TX_EN/ETH_MII_TX_EN, AF15 EVENTOUT.
71 VCAP_1 power_in Internal voltage regulator output decoupling capacitor connection 1; requires an external capacitor per the VCAP_1/VCAP_2 operating conditions (Table 16).
72 VDD power_in Digital supply voltage pin, 1.8 V to 3.6 V.
73 PB12 bidirectional 5V-tolerant I/O; AF1 TIM1_BKIN, AF4 I2C2_SMBA, AF5 SPI2_NSS/I2S2_WS, AF7 USART3_CK, AF9 CAN2_RX, AF10 OTG_HS_ULPI_D5/OTG_HS_ID, AF11 ETH_RMII_TXD0/ETH_MII_TXD0, AF15 EVENTOUT.
74 PB13 bidirectional 5V-tolerant I/O; AF1 TIM1_CH1N, AF5 SPI2_SCK/I2S2_CK, AF7 USART3_CTS, AF9 CAN2_TX, AF10 OTG_HS_ULPI_D6, AF11 ETH_RMII_TXD1/ETH_MII_TXD1, AF15 EVENTOUT; additional function OTG_HS_VBUS.
75 PB14 bidirectional 5V-tolerant I/O; AF1 TIM1_CH2N, AF3 TIM8_CH2N, AF5 SPI2_MISO/I2S2ext_SD, AF7 USART3_RTS, AF9 TIM12_CH1, AF10 OTG_HS_DM, AF15 EVENTOUT.
76 PB15 bidirectional 5V-tolerant I/O; AF0 RTC_REFIN, AF1 TIM1_CH3N, AF3 TIM8_CH3N, AF5 SPI2_MOSI/I2S2_SD, AF9 TIM12_CH2, AF10 OTG_HS_DP, AF15 EVENTOUT.
77 PD8 bidirectional 5V-tolerant I/O; AF7 USART3_TX, AF12 FSMC_D13, AF15 EVENTOUT.
78 PD9 bidirectional 5V-tolerant I/O; AF7 USART3_RX, AF12 FSMC_D14, AF15 EVENTOUT.
79 PD10 bidirectional 5V-tolerant I/O; AF7 USART3_CK, AF12 FSMC_D15, AF15 EVENTOUT.
80 PD11 bidirectional 5V-tolerant I/O; AF7 USART3_CTS, AF12 FSMC_CLE/FSMC_A16, AF15 EVENTOUT.
81 PD12 bidirectional 5V-tolerant I/O; AF2 TIM4_CH1, AF7 USART3_RTS, AF12 FSMC_ALE/FSMC_A17, AF15 EVENTOUT.
82 PD13 bidirectional 5V-tolerant I/O; AF2 TIM4_CH2, AF12 FSMC_A18, AF15 EVENTOUT.
83 VSS power_in Digital ground supply pin.
84 VDD power_in Digital supply voltage pin, 1.8 V to 3.6 V.
85 PD14 bidirectional 5V-tolerant I/O; AF2 TIM4_CH3, AF12 FSMC_D0, AF15 EVENTOUT.
86 PD15 bidirectional 5V-tolerant I/O; AF2 TIM4_CH4, AF12 FSMC_D1, AF15 EVENTOUT.
87 PG2 bidirectional 5V-tolerant I/O; AF12 FSMC_A12, AF15 EVENTOUT.
88 PG3 bidirectional 5V-tolerant I/O; AF12 FSMC_A13, AF15 EVENTOUT.
89 PG4 bidirectional 5V-tolerant I/O; AF12 FSMC_A14, AF15 EVENTOUT.
90 PG5 bidirectional 5V-tolerant I/O; AF12 FSMC_A15, AF15 EVENTOUT.
91 PG6 bidirectional 5V-tolerant I/O; AF12 FSMC_INT2, AF15 EVENTOUT.
92 PG7 bidirectional 5V-tolerant I/O; AF8 USART6_CK, AF12 FSMC_INT3, AF15 EVENTOUT.
93 PG8 bidirectional 5V-tolerant I/O; AF8 USART6_RTS, AF11 ETH_PPS_OUT, AF15 EVENTOUT.
94 VSS power_in Digital ground supply pin.
95 VDD power_in Digital supply voltage pin, 1.8 V to 3.6 V.
96 PC6 bidirectional 5V-tolerant I/O; AF2 TIM3_CH1, AF3 TIM8_CH1, AF5 I2S2_MCK, AF8 USART6_TX, AF12 SDIO_D6, AF13 DCMI_D0, AF15 EVENTOUT.
97 PC7 bidirectional 5V-tolerant I/O; AF2 TIM3_CH2, AF3 TIM8_CH2, AF6 I2S3_MCK, AF8 USART6_RX, AF12 SDIO_D7, AF13 DCMI_D1, AF15 EVENTOUT.
98 PC8 bidirectional 5V-tolerant I/O; AF2 TIM3_CH3, AF3 TIM8_CH3, AF8 USART6_CK, AF12 SDIO_D0, AF13 DCMI_D2, AF15 EVENTOUT.
99 PC9 bidirectional 5V-tolerant I/O; AF0 MCO2, AF2 TIM3_CH4, AF3 TIM8_CH4, AF4 I2C3_SDA, AF5 I2S_CKIN, AF12 SDIO_D1, AF13 DCMI_D3, AF15 EVENTOUT.
100 PA8 bidirectional 5V-tolerant I/O; AF0 MCO1, AF1 TIM1_CH1, AF4 I2C3_SCL, AF7 USART1_CK, AF10 OTG_FS_SOF, AF15 EVENTOUT.
101 PA9 bidirectional 5V-tolerant I/O; AF1 TIM1_CH2, AF4 I2C3_SMBA, AF7 USART1_TX, AF13 DCMI_D0, AF15 EVENTOUT; additional function OTG_FS_VBUS.
102 PA10 bidirectional 5V-tolerant I/O; AF1 TIM1_CH3, AF7 USART1_RX, AF10 OTG_FS_ID, AF13 DCMI_D1, AF15 EVENTOUT.
103 PA11 bidirectional 5V-tolerant I/O; AF1 TIM1_CH4, AF7 USART1_CTS, AF9 CAN1_RX, AF10 OTG_FS_DM, AF15 EVENTOUT.
104 PA12 bidirectional 5V-tolerant I/O; AF1 TIM1_ETR, AF7 USART1_RTS, AF9 CAN1_TX, AF10 OTG_FS_DP, AF15 EVENTOUT.
105 PA13 bidirectional 5V-tolerant I/O PA13(JTMS-SWDIO); JTAG test-mode-select / serial-wire debug data I/O, AF15 EVENTOUT.
106 VCAP_2 power_in Internal voltage regulator output decoupling capacitor connection 2; requires an external capacitor per the VCAP_1/VCAP_2 operating conditions (Table 16).
107 VSS power_in Digital ground supply pin.
108 VDD power_in Digital supply voltage pin, 1.8 V to 3.6 V.
109 PA14 bidirectional 5V-tolerant I/O PA14(JTCK/SWCLK); JTAG test clock / serial-wire clock input, AF15 EVENTOUT.
110 PA15 bidirectional 5V-tolerant I/O PA15(JTDI); JTAG test data input, AF1 TIM2_CH1/TIM2_ETR, AF5 SPI1_NSS, AF6 SPI3_NSS/I2S3_WS, AF15 EVENTOUT.
111 PC10 bidirectional 5V-tolerant I/O; AF6 SPI3_SCK/I2S3_CK, AF7 USART3_TX, AF8 UART4_TX, AF12 SDIO_D2, AF13 DCMI_D8, AF15 EVENTOUT.
112 PC11 bidirectional 5V-tolerant I/O; AF6 SPI3_MISO/I2S3ext_SD, AF7 USART3_RX, AF8 UART4_RX, AF12 SDIO_D3, AF13 DCMI_D4, AF15 EVENTOUT.
113 PC12 bidirectional 5V-tolerant I/O; AF6 SPI3_MOSI/I2S3_SD, AF7 USART3_CK, AF8 UART5_TX, AF12 SDIO_CK, AF13 DCMI_D9, AF15 EVENTOUT.
114 PD0 bidirectional 5V-tolerant I/O; AF9 CAN1_RX, AF12 FSMC_D2, AF15 EVENTOUT.
115 PD1 bidirectional 5V-tolerant I/O; AF9 CAN1_TX, AF12 FSMC_D3, AF15 EVENTOUT.
116 PD2 bidirectional 5V-tolerant I/O; AF2 TIM3_ETR, AF8 UART5_RX, AF12 SDIO_CMD, AF13 DCMI_D11, AF15 EVENTOUT.
117 PD3 bidirectional 5V-tolerant I/O; AF7 USART2_CTS, AF12 FSMC_CLK, AF15 EVENTOUT.
118 PD4 bidirectional 5V-tolerant I/O; AF7 USART2_RTS, AF12 FSMC_NOE, AF15 EVENTOUT.
119 PD5 bidirectional 5V-tolerant I/O; AF7 USART2_TX, AF12 FSMC_NWE, AF15 EVENTOUT.
120 VSS power_in Digital ground supply pin.
121 VDD power_in Digital supply voltage pin, 1.8 V to 3.6 V.
122 PD6 bidirectional 5V-tolerant I/O; AF7 USART2_RX, AF12 FSMC_NWAIT, AF15 EVENTOUT.
123 PD7 bidirectional 5V-tolerant I/O; AF7 USART2_CK, AF12 FSMC_NE1/FSMC_NCE2, AF15 EVENTOUT.
124 PG9 bidirectional 5V-tolerant I/O; AF8 USART6_RX, AF12 FSMC_NE2/FSMC_NCE3, AF15 EVENTOUT.
125 PG10 bidirectional 5V-tolerant I/O; AF12 FSMC_NCE4_1/FSMC_NE3, AF15 EVENTOUT.
126 PG11 bidirectional 5V-tolerant I/O; AF11 ETH_MII_TX_EN/ETH_RMII_TX_EN, AF12 FSMC_NCE4_2, AF15 EVENTOUT.
127 PG12 bidirectional 5V-tolerant I/O; AF8 USART6_RTS, AF12 FSMC_NE4, AF15 EVENTOUT.
128 PG13 bidirectional 5V-tolerant I/O; AF8 USART6_CTS, AF11 ETH_MII_TXD0/ETH_RMII_TXD0, AF12 FSMC_A24, AF15 EVENTOUT.
129 PG14 bidirectional 5V-tolerant I/O; AF8 USART6_TX, AF11 ETH_MII_TXD1/ETH_RMII_TXD1, AF12 FSMC_A25, AF15 EVENTOUT.
130 VSS power_in Digital ground supply pin.
131 VDD power_in Digital supply voltage pin, 1.8 V to 3.6 V.
132 PG15 bidirectional 5V-tolerant I/O; AF8 USART6_CTS, AF13 DCMI_D13, AF15 EVENTOUT.
133 PB3 bidirectional 5V-tolerant I/O PB3(JTDO/TRACESWO); JTAG test data output / trace SWO, AF1 TIM2_CH2, AF5 SPI1_SCK, AF6 SPI3_SCK/I2S3_CK, AF15 EVENTOUT.
134 PB4 bidirectional 5V-tolerant I/O PB4(NJTRST); JTAG reset input, AF2 TIM3_CH1, AF5 SPI1_MISO, AF6 SPI3_MISO/I2S3ext_SD, AF15 EVENTOUT.
135 PB5 bidirectional 5V-tolerant I/O; AF2 TIM3_CH2, AF4 I2C1_SMBA, AF5 SPI1_MOSI, AF6 SPI3_MOSI/I2S3_SD, AF9 CAN2_RX, AF10 OTG_HS_ULPI_D7, AF11 ETH_PPS_OUT, AF13 DCMI_D10, AF15 EVENTOUT.
136 PB6 bidirectional 5V-tolerant I/O; AF2 TIM4_CH1, AF4 I2C1_SCL, AF7 USART1_TX, AF9 CAN2_TX, AF13 DCMI_D5, AF15 EVENTOUT.
137 PB7 bidirectional 5V-tolerant I/O; AF2 TIM4_CH2, AF4 I2C1_SDA, AF7 USART1_RX, AF12 FSMC_NL, AF13 DCMI_VSYNC, AF15 EVENTOUT.
138 BOOT0 input Dedicated boot-mode selection input pin (I/O structure type B) sampled at device reset to select the boot memory; additional function VPP Flash programming voltage.
139 PB8 bidirectional 5V-tolerant I/O; AF2 TIM4_CH3, AF3 TIM10_CH1, AF4 I2C1_SCL, AF9 CAN1_RX, AF11 ETH_MII_TXD3, AF12 SDIO_D4, AF13 DCMI_D6, AF15 EVENTOUT.
140 PB9 bidirectional 5V-tolerant I/O; AF2 TIM4_CH4, AF3 TIM11_CH1, AF4 I2C1_SDA, AF5 SPI2_NSS/I2S2_WS, AF9 CAN1_TX, AF12 SDIO_D5, AF13 DCMI_D7, AF15 EVENTOUT.
141 PE0 bidirectional 5V-tolerant I/O; AF2 TIM4_ETR, AF12 FSMC_NBL0, AF13 DCMI_D2, AF15 EVENTOUT.
142 PE1 bidirectional 5V-tolerant I/O; AF12 FSMC_NBL1, AF13 DCMI_D3, AF15 EVENTOUT.
143 PDR_ON input 5V-tolerant power-down-reset enable/disable control input used to select the internal reset ON/OFF configuration of the embedded reset and power control block.
144 VDD power_in Digital supply voltage pin, 1.8 V to 3.6 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-144(20x20)
Category Embedded Processors & Controllers
Pins 144

CAD (KiCad official)

  • Symbol: STM32F407ZET6
  • Footprint: Package_QFP:LQFP-144_20x20mm_P0.5mm
  • 3D model: LQFP-144(20x20) (KiCad packages3D, STEP)
  • 3D model files: stm32f407zet6-etched.step / stm32f407zet6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f407zet6.step / stm32f407zet6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (201 pp, sha256 7a7bd66adf486b8e, retrieved 2026-09-24, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF