component

STM32F407VGT7TR

Public Made by Adom

by adom

STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32f407vgt7trfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

Datasheet

Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

STM32F407VGT7TR

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)

STM32F407VGT7TR from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions TRACECLK, FSMC_A23, ETH_MII_TXD3, EVENTOUT.
2 PE3 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions TRACED0, FSMC_A19, EVENTOUT.
3 PE4 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions TRACED1, FSMC_A20, DCMI_D4, EVENTOUT.
4 PE5 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions TRACED2, FSMC_A21, TIM9_CH1, DCMI_D6, EVENTOUT.
5 PE6 bidirectional 5 V tolerant (FT) I/O, floating input after reset; alternate functions TRACED3, FSMC_A22, TIM9_CH2, DCMI_D7, EVENTOUT.
6 VBAT power_in Supply pin for the RTC, the 20x32-bit backup registers and the optional 4 KB backup SRAM.
7 PC13 bidirectional 5 V tolerant I/O supplied through the power switch, which sinks only 3 mA, so output use is limited to 2 MHz at 30 pF and it must not source current (e.g. LEDs); also RTC_OUT, RTC_TAMP1, RTC_TS.
8 PC14/OSC32_IN bidirectional 5 V tolerant I/O on the backup power switch (3 mA sink limit, output max 2 MHz at 30 pF); function OSC32_IN for the 32 kHz oscillator.
9 PC15/OSC32_OUT bidirectional 5 V tolerant I/O on the backup power switch (3 mA sink limit, output max 2 MHz at 30 pF); function OSC32_OUT for the 32 kHz oscillator.
10 VSS power_in Ground pin for the digital supply domain.
11 VDD power_in Digital supply pin for the I/Os and core (1.8 V to 3.6 V application supply and I/Os).
12 PH0/OSC_IN bidirectional I/O (FT, 5 V tolerant except in oscillator mode) with alternate function EVENTOUT; additional function OSC_IN for the 4-26 MHz crystal oscillator.
13 PH1/OSC_OUT bidirectional I/O (FT, 5 V tolerant except in oscillator mode) with alternate function EVENTOUT; additional function OSC_OUT for the 4-26 MHz crystal oscillator.
14 NRST bidirectional Bidirectional reset pin with an embedded weak pull-up resistor.
15 PC0 bidirectional 5 V tolerant I/O (FT, except analog mode); alternate functions OTG_HS_ULPI_STP, EVENTOUT; additional function ADC123_IN10.
16 PC1 bidirectional 5 V tolerant I/O (FT, except analog mode); alternate function ETH_MDC, EVENTOUT; additional function ADC123_IN11.
17 PC2 bidirectional 5 V tolerant I/O (FT, except analog mode); alternate functions SPI2_MISO, OTG_HS_ULPI_DIR, ETH_MII_TXD2, I2S2ext_SD, EVENTOUT; additional function ADC123_IN12.
18 PC3 bidirectional 5 V tolerant I/O (FT, except analog mode); alternate functions SPI2_MOSI, I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, EVENTOUT; additional function ADC123_IN13.
19 VDD power_in Digital supply pin for the I/Os and core (1.8 V to 3.6 V application supply and I/Os).
20 VSSA power_in Ground pin for the analog (ADC, DAC, reset and PLL) domain.
21 VREF+ power_in Positive reference voltage pin for the ADC and DAC.
22 VDDA power_in Analog supply pin for the ADC, DAC, reset blocks, RC oscillators and PLL.
23 PA0/WKUP bidirectional 5 V tolerant I/O (FT, except analog mode) with WKUP wake-up function; alternate functions USART2_CTS, UART4_TX, ETH_MII_CRS, TIM2_CH1_ETR, TIM5_CH1, TIM8_ETR, EVENTOUT; additional function ADC123_IN0.
24 PA1 bidirectional 5 V tolerant I/O (FT, except analog mode); alternate functions USART2_RTS, UART4_RX, ETH_RMII_REF_CLK, ETH_MII_RX_CLK, TIM5_CH2, TIM2_CH2, EVENTOUT; additional function ADC123_IN1.
25 PA2 bidirectional 5 V tolerant I/O (FT, except analog mode); alternate functions USART2_TX, TIM5_CH3, TIM9_CH1, TIM2_CH3, ETH_MDIO, EVENTOUT; additional function ADC123_IN2.
26 PA3 bidirectional 5 V tolerant I/O (FT, except analog mode); alternate functions USART2_RX, TIM5_CH4, TIM9_CH2, TIM2_CH4, OTG_HS_ULPI_D0, ETH_MII_COL, EVENTOUT; additional function ADC123_IN3.
27 VSS power_in Ground pin for the digital supply domain.
28 VDD power_in Digital supply pin for the I/Os and core (1.8 V to 3.6 V application supply and I/Os).
29 PA4 bidirectional 3.3 V tolerant I/O directly connected to the ADC (TTa); alternate functions SPI1_NSS, SPI3_NSS, USART2_CK, DCMI_HSYNC, OTG_HS_SOF, I2S3_WS, EVENTOUT; additional functions ADC12_IN4, DAC_OUT1.
30 PA5 bidirectional 3.3 V tolerant I/O directly connected to the ADC (TTa); alternate functions SPI1_SCK, OTG_HS_ULPI_CK, TIM2_CH1_ETR, TIM8_CH1N, EVENTOUT; additional functions ADC12_IN5, DAC_OUT2.
31 PA6 bidirectional 5 V tolerant I/O (FT, except analog mode); alternate functions SPI1_MISO, TIM8_BKIN, TIM13_CH1, DCMI_PIXCLK, TIM3_CH1, TIM1_BKIN, EVENTOUT; additional function ADC12_IN6.
32 PA7 bidirectional 5 V tolerant I/O (FT, except analog mode); alternate functions SPI1_MOSI, TIM8_CH1N, TIM14_CH1, TIM3_CH2, ETH_MII_RX_DV, TIM1_CH1N, ETH_RMII_CRS_DV, EVENTOUT; additional function ADC12_IN7.
33 PC4 bidirectional 5 V tolerant I/O (FT, except analog mode); alternate functions ETH_RMII_RX_D0, ETH_MII_RX_D0, EVENTOUT; additional function ADC12_IN14.
34 PC5 bidirectional 5 V tolerant I/O (FT, except analog mode); alternate functions ETH_RMII_RX_D1, ETH_MII_RX_D1, EVENTOUT; additional function ADC12_IN15.
35 PB0 bidirectional 5 V tolerant I/O (FT, except analog mode); alternate functions TIM3_CH3, TIM8_CH2N, OTG_HS_ULPI_D1, ETH_MII_RXD2, TIM1_CH2N, EVENTOUT; additional function ADC12_IN8.
36 PB1 bidirectional 5 V tolerant I/O (FT, except analog mode); alternate functions TIM3_CH4, TIM8_CH3N, OTG_HS_ULPI_D2, ETH_MII_RXD3, TIM1_CH3N, EVENTOUT; additional function ADC12_IN9.
37 PB2/BOOT1 bidirectional 5 V tolerant I/O (FT) with alternate function EVENTOUT; the BOOT1 function is printed in the pin name.
38 PE7 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_D4, TIM1_ETR, EVENTOUT.
39 PE8 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_D5, TIM1_CH1N, EVENTOUT.
40 PE9 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_D6, TIM1_CH1, EVENTOUT.
41 PE10 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_D7, TIM1_CH2N, EVENTOUT.
42 PE11 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_D8, TIM1_CH2, EVENTOUT.
43 PE12 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_D9, TIM1_CH3N, EVENTOUT.
44 PE13 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_D10, TIM1_CH3, EVENTOUT.
45 PE14 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_D11, TIM1_CH4, EVENTOUT.
46 PE15 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_D12, TIM1_BKIN, EVENTOUT.
47 PB10 bidirectional 5 V tolerant I/O (FT); alternate functions SPI2_SCK, I2S2_CK, I2C2_SCL, USART3_TX, OTG_HS_ULPI_D3, ETH_MII_RX_ER, TIM2_CH3, EVENTOUT.
48 PB11 bidirectional 5 V tolerant I/O (FT); alternate functions I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_RMII_TX_EN, ETH_MII_TX_EN, TIM2_CH4, EVENTOUT.
49 VCAP_1 power_in Connection pin for the external capacitor of the internal voltage regulator (VCAP_1/VCAP_2 operating conditions apply).
50 VDD power_in Digital supply pin for the I/Os and core (1.8 V to 3.6 V application supply and I/Os).
51 PB12 bidirectional 5 V tolerant I/O (FT); alternate functions SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN, CAN2_RX, OTG_HS_ULPI_D5, ETH_RMII_TXD0, ETH_MII_TXD0, OTG_HS_ID, EVENTOUT.
52 PB13 bidirectional 5 V tolerant I/O (FT); alternate functions SPI2_SCK, I2S2_CK, USART3_CTS, TIM1_CH1N, CAN2_TX, OTG_HS_ULPI_D6, ETH_MII_TXD1, ETH_RMII_TXD1, EVENTOUT; additional function OTG_HS_VBUS.
53 PB14 bidirectional 5 V tolerant I/O (FT); alternate functions SPI2_MISO, TIM1_CH2N, TIM12_CH1, OTG_HS_DM, USART3_RTS, TIM8_CH2N, I2S2ext_SD, EVENTOUT.
54 PB15 bidirectional 5 V tolerant I/O (FT); alternate functions SPI2_MOSI, I2S2_SD, TIM1_CH3N, TIM8_CH3N, TIM12_CH2, OTG_HS_DP, EVENTOUT; additional function RTC_REFIN.
55 PD8 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_D13, USART3_TX, EVENTOUT.
56 PD9 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_D14, USART3_RX, EVENTOUT.
57 PD10 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_D15, USART3_CK, EVENTOUT.
58 PD11 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_CLE, FSMC_A16, USART3_CTS, EVENTOUT.
59 PD12 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_ALE, FSMC_A17, TIM4_CH1, USART3_RTS, EVENTOUT.
60 PD13 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_A18, TIM4_CH2, EVENTOUT.
61 PD14 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_D0, TIM4_CH3, EVENTOUT.
62 PD15 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_D1, TIM4_CH4, EVENTOUT.
63 PC6 bidirectional 5 V tolerant I/O (FT); alternate functions I2S2_MCK, TIM8_CH1, SDIO_D6, USART6_TX, DCMI_D0, TIM3_CH1, EVENTOUT.
64 PC7 bidirectional 5 V tolerant I/O (FT); alternate functions I2S3_MCK, TIM8_CH2, SDIO_D7, USART6_RX, DCMI_D1, TIM3_CH2, EVENTOUT.
65 PC8 bidirectional 5 V tolerant I/O (FT); alternate functions TIM8_CH3, SDIO_D0, TIM3_CH3, USART6_CK, DCMI_D2, EVENTOUT.
66 PC9 bidirectional 5 V tolerant I/O (FT); alternate functions I2S_CKIN, MCO2, TIM8_CH4, SDIO_D1, I2C3_SDA, DCMI_D3, TIM3_CH4, EVENTOUT.
67 PA8 bidirectional 5 V tolerant I/O (FT); alternate functions MCO1, USART1_CK, TIM1_CH1, I2C3_SCL, OTG_FS_SOF, EVENTOUT.
68 PA9 bidirectional 5 V tolerant I/O (FT); alternate functions USART1_TX, TIM1_CH2, I2C3_SMBA, DCMI_D0, EVENTOUT; additional function OTG_FS_VBUS.
69 PA10 bidirectional 5 V tolerant I/O (FT); alternate functions USART1_RX, TIM1_CH3, OTG_FS_ID, DCMI_D1, EVENTOUT.
70 PA11 bidirectional 5 V tolerant I/O (FT); alternate functions USART1_CTS, CAN1_RX, TIM1_CH4, OTG_FS_DM, EVENTOUT.
71 PA12 bidirectional 5 V tolerant I/O (FT); alternate functions USART1_RTS, CAN1_TX, TIM1_ETR, OTG_FS_DP, EVENTOUT.
72 PA13/JTMS-SWDIO bidirectional 5 V tolerant I/O (FT); alternate functions JTMS-SWDIO, EVENTOUT.
73 VCAP_2 power_in Connection pin for the external capacitor of the internal voltage regulator (VCAP_1/VCAP_2 operating conditions apply).
74 VSS power_in Ground pin for the digital supply domain.
75 VDD power_in Digital supply pin for the I/Os and core (1.8 V to 3.6 V application supply and I/Os).
76 PA14/JTCK-SWCLK bidirectional 5 V tolerant I/O (FT); alternate functions JTCK-SWCLK, EVENTOUT.
77 PA15/JTDI bidirectional 5 V tolerant I/O (FT); alternate functions JTDI, SPI3_NSS, I2S3_WS, TIM2_CH1_ETR, SPI1_NSS, EVENTOUT.
78 PC10 bidirectional 5 V tolerant I/O (FT); alternate functions SPI3_SCK, I2S3_CK, UART4_TX, SDIO_D2, DCMI_D8, USART3_TX, EVENTOUT.
79 PC11 bidirectional 5 V tolerant I/O (FT); alternate functions UART4_RX, SPI3_MISO, SDIO_D3, DCMI_D4, USART3_RX, I2S3ext_SD, EVENTOUT.
80 PC12 bidirectional 5 V tolerant I/O (FT); alternate functions UART5_TX, SDIO_CK, DCMI_D9, SPI3_MOSI, I2S3_SD, USART3_CK, EVENTOUT.
81 PD0 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_D2, CAN1_RX, EVENTOUT.
82 PD1 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_D3, CAN1_TX, EVENTOUT.
83 PD2 bidirectional 5 V tolerant I/O (FT); alternate functions TIM3_ETR, UART5_RX, SDIO_CMD, DCMI_D11, EVENTOUT.
84 PD3 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_CLK, USART2_CTS, EVENTOUT.
85 PD4 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_NOE, USART2_RTS, EVENTOUT.
86 PD5 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_NWE, USART2_TX, EVENTOUT.
87 PD6 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_NWAIT, USART2_RX, EVENTOUT.
88 PD7 bidirectional 5 V tolerant I/O (FT); alternate functions USART2_CK, FSMC_NE1, FSMC_NCE2, EVENTOUT.
89 PB3/JTDO-TRACESWO bidirectional 5 V tolerant I/O (FT); alternate functions JTDO, TRACESWO, SPI3_SCK, I2S3_CK, TIM2_CH2, SPI1_SCK, EVENTOUT.
90 PB4/NJTRST bidirectional 5 V tolerant I/O (FT); alternate functions NJTRST, SPI3_MISO, TIM3_CH1, SPI1_MISO, I2S3ext_SD, EVENTOUT.
91 PB5 bidirectional 5 V tolerant I/O (FT); alternate functions I2C1_SMBA, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, TIM3_CH2, SPI1_MOSI, SPI3_MOSI, DCMI_D10, I2S3_SD, EVENTOUT.
92 PB6 bidirectional 5 V tolerant I/O (FT); alternate functions I2C1_SCL, TIM4_CH1, CAN2_TX, DCMI_D5, USART1_TX, EVENTOUT.
93 PB7 bidirectional 5 V tolerant I/O (FT); alternate functions I2C1_SDA, FSMC_NL, DCMI_VSYNC, USART1_RX, TIM4_CH2, EVENTOUT.
94 BOOT0 input Dedicated BOOT0 pin that selects the boot mode; additional function VPP (Flash programming voltage).
95 PB8 bidirectional 5 V tolerant I/O (FT); alternate functions TIM4_CH3, SDIO_D4, TIM10_CH1, DCMI_D6, ETH_MII_TXD3, I2C1_SCL, CAN1_RX, EVENTOUT.
96 PB9 bidirectional 5 V tolerant I/O (FT); alternate functions SPI2_NSS, I2S2_WS, TIM4_CH4, TIM11_CH1, SDIO_D5, DCMI_D7, I2C1_SDA, CAN1_TX, EVENTOUT.
97 PE0 bidirectional 5 V tolerant I/O (FT); alternate functions TIM4_ETR, FSMC_NBL0, DCMI_D2, EVENTOUT.
98 PE1 bidirectional 5 V tolerant I/O (FT); alternate functions FSMC_NBL1, DCMI_D3, EVENTOUT.
99 VSS power_in Ground pin for the digital supply domain (this pin replaces PDR_ON on the LQFP100 package).
100 VDD power_in Digital supply pin for the I/Os and core (1.8 V to 3.6 V application supply and I/Os).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-100(14x14)
Category Embedded Processors & Controllers
Pins 100

CAD (KiCad official)

  • Symbol: STM32F407VGT7TR
  • Footprint: Package_QFP:LQFP-100_14x14mm_P0.5mm
  • 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
  • 3D model files: stm32f407vgt7tr-etched.step / stm32f407vgt7tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f407vgt7tr.step / stm32f407vgt7tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (203 pp, sha256 aea8f4cd4f251e12, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF