component
STM32F407VET6TR
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-100(14x14). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 4h ago |
| viewers | 4h ago |
| package.json | 4h ago |
| page.json | 4h ago |
| README.md | 4h ago |
| stm32f407vet6tr-etched.glb | 4h ago |
| stm32f407vet6tr-etched.step | 4h ago |
| stm32f407vet6tr-hero.glb | 4h ago |
| stm32f407vet6tr-hero.overlay.json | 4h ago |
| stm32f407vet6tr.glb | 4h ago |
| stm32f407vet6tr.kicad_mod | 4h ago |
| stm32f407vet6tr.kicad_sym | 4h ago |
| stm32f407vet6tr.lbr | 4h ago |
| stm32f407vet6tr.step | 4h ago |
STM32F407VET6TR
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-100(14x14)
STM32F407VET6TR from STMicroelectronics, in a LQFP-100(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | Port E pin 2, 5 V tolerant I/O for FSMC address, Ethernet MII, or trace clock functions |
| 2 | PE3 | bidirectional | Port E pin 3, 5 V tolerant I/O for FSMC address or Ethernet MII functions |
| 3 | PE4 | bidirectional | Port E pin 4, 5 V tolerant I/O for FSMC address, camera, or DCMI data functions |
| 4 | PE5 | bidirectional | Port E pin 5, 5 V tolerant I/O for FSMC address, timer, camera, or DCMI functions |
| 5 | PE6 | bidirectional | Port E pin 6, 5 V tolerant I/O for FSMC address, timer, camera, or DCMI functions |
| 6 | VBAT | power_in | Battery backup supply input, 1.8 V to 3.6 V for RTC and backup registers |
| 7 | PC13 | bidirectional | Port C pin 13, 5 V tolerant I/O through power switch (max 2 MHz, 30 pF load) for RTC output or tamper functions |
| 8 | PC14/OSC32_IN | bidirectional | Port C pin 14, 5 V tolerant I/O, oscillator input for 32 kHz crystal or external clock |
| 9 | PC15/OSC32_OUT | bidirectional | Port C pin 15, 5 V tolerant I/O, oscillator output for 32 kHz crystal |
| 10 | VSS | power_in | Ground (0 V reference) pin |
| 11 | VDD | power_in | Main supply voltage pin, 1.8 V to 3.6 V |
| 12 | PH0/OSC_IN | bidirectional | Port H pin 0, 5 V tolerant I/O, oscillator input for main crystal (4-26 MHz) |
| 13 | PH1/OSC_OUT | bidirectional | Port H pin 1, 5 V tolerant I/O, oscillator output for main crystal |
| 14 | NRST | bidirectional | Reset input pin with internal weak pull-up resistor, asserts reset when pulled below threshold |
| 15 | PC0 | bidirectional | Port C pin 0, 5 V tolerant I/O supporting ADC123_IN10, OTG_HS_ULPI_STP, or Ethernet functions |
| 16 | PC1 | bidirectional | Port C pin 1, 5 V tolerant I/O supporting ADC123_IN11 or Ethernet MDC functions |
| 17 | PC2 | bidirectional | Port C pin 2, 5 V tolerant I/O supporting ADC123_IN12, SPI2, OTG_HS, or Ethernet functions |
| 18 | PC3 | bidirectional | Port C pin 3, 5 V tolerant I/O supporting ADC123_IN13, SPI2, OTG_HS, or Ethernet functions |
| 19 | VDD | power_in | Main supply voltage pin, 1.8 V to 3.6 V |
| 20 | VSSA | power_in | Analog ground (0 V reference) pin for ADC |
| 21 | VREF+ | power_in | ADC positive reference voltage pin, 1.65 V to 3.6 V with 100 nF bypass capacitor |
| 22 | VDDA | power_in | Analog supply voltage pin, 1.8 V to 3.6 V with 100 nF bypass capacitor |
| 23 | PA0/WKUP | bidirectional | Port A pin 0, 5 V tolerant I/O supporting wakeup, timer, USART, CAN, Ethernet, and ADC123_IN0 functions |
| 24 | PA1 | bidirectional | Port A pin 1, 5 V tolerant I/O supporting timer, USART, Ethernet, and ADC123_IN1 functions |
| 25 | PA2 | bidirectional | Port A pin 2, 5 V tolerant I/O supporting timer, USART, Ethernet, and ADC123_IN2 functions |
| 26 | PA3 | bidirectional | Port A pin 3, 5 V tolerant I/O supporting timer, USART, OTG_HS, Ethernet, and ADC123_IN3 functions |
| 27 | VSS | power_in | Ground (0 V reference) pin |
| 28 | VDD | power_in | Main supply voltage pin, 1.8 V to 3.6 V |
| 29 | PA4 | bidirectional | Port A pin 4, 3.3 V I/O (ADC direct) supporting SPI, I2S, DCMI, DAC_OUT1, and ADC12_IN4 functions |
| 30 | PA5 | bidirectional | Port A pin 5, 3.3 V I/O (ADC direct) supporting SPI, OTG_HS, timer, and ADC12_IN5/DAC_OUT2 functions |
| 31 | PA6 | bidirectional | Port A pin 6, 5 V tolerant I/O supporting SPI, timer, DCMI, and ADC12_IN6 functions |
| 32 | PA7 | bidirectional | Port A pin 7, 5 V tolerant I/O supporting SPI, timer, Ethernet, and ADC12_IN7 functions |
| 33 | PC4 | bidirectional | Port C pin 4, 5 V tolerant I/O supporting Ethernet and ADC12_IN14 functions |
| 34 | PC5 | bidirectional | Port C pin 5, 5 V tolerant I/O supporting Ethernet and ADC12_IN15 functions |
| 35 | PB0 | bidirectional | Port B pin 0, 5 V tolerant I/O supporting timer, OTG_HS, Ethernet, and ADC12_IN8 functions |
| 36 | PB1 | bidirectional | Port B pin 1, 5 V tolerant I/O supporting timer, OTG_HS, Ethernet, and ADC12_IN9 functions |
| 37 | PB2/BOOT1 | bidirectional | Port B pin 2, 5 V tolerant I/O (boot configuration), allows GPIO after reset |
| 38 | PE7 | bidirectional | Port E pin 7, 5 V tolerant I/O for FSMC data or timer functions |
| 39 | PE8 | bidirectional | Port E pin 8, 5 V tolerant I/O for FSMC data or timer functions |
| 40 | PE9 | bidirectional | Port E pin 9, 5 V tolerant I/O for FSMC data or timer functions |
| 41 | PE10 | bidirectional | Port E pin 10, 5 V tolerant I/O for FSMC data or timer functions |
| 42 | PE11 | bidirectional | Port E pin 11, 5 V tolerant I/O for FSMC data or timer functions |
| 43 | PE12 | bidirectional | Port E pin 12, 5 V tolerant I/O for FSMC data or timer functions |
| 44 | PE13 | bidirectional | Port E pin 13, 5 V tolerant I/O for FSMC data or timer functions |
| 45 | PE14 | bidirectional | Port E pin 14, 5 V tolerant I/O for FSMC data or timer functions |
| 46 | PE15 | bidirectional | Port E pin 15, 5 V tolerant I/O for FSMC data or timer functions |
| 47 | PB10 | bidirectional | Port B pin 10, 5 V tolerant I/O supporting I2C, SPI, I2S, USART, OTG_HS, or Ethernet functions |
| 48 | PB11 | bidirectional | Port B pin 11, 5 V tolerant I/O supporting I2C, USART, OTG_HS, or Ethernet functions |
| 49 | VCAP_1 | power_in | Voltage regulator output capacitor pin, requires 4.7 µF capacitor to ground |
| 50 | VDD | power_in | Main supply voltage pin, 1.8 V to 3.6 V |
| 51 | PB12 | bidirectional | Port B pin 12, 5 V tolerant I/O supporting I2C, SPI, USART, CAN, OTG_HS, or Ethernet functions |
| 52 | PB13 | bidirectional | Port B pin 13, 5 V tolerant I/O supporting SPI, USART, CAN, OTG_HS, or Ethernet functions, VBUS monitoring |
| 53 | PB14 | bidirectional | Port B pin 14, 5 V tolerant I/O supporting SPI, timer, OTG_HS, or USART functions |
| 54 | PB15 | bidirectional | Port B pin 15, 5 V tolerant I/O supporting SPI, timer, OTG_HS, or RTC reference input functions |
| 55 | PD8 | bidirectional | Port D pin 8, 5 V tolerant I/O for FSMC data or USART functions |
| 56 | PD9 | bidirectional | Port D pin 9, 5 V tolerant I/O for FSMC data or USART functions |
| 57 | PD10 | bidirectional | Port D pin 10, 5 V tolerant I/O for FSMC data or USART functions |
| 58 | PD11 | bidirectional | Port D pin 11, 5 V tolerant I/O for FSMC CLE/address or USART functions |
| 59 | PD12 | bidirectional | Port D pin 12, 5 V tolerant I/O for FSMC ALE/address, timer, or USART functions |
| 60 | PD13 | bidirectional | Port D pin 13, 5 V tolerant I/O for FSMC address or timer functions |
| 61 | PD14 | bidirectional | Port D pin 14, 5 V tolerant I/O for FSMC data or timer functions |
| 62 | PD15 | bidirectional | Port D pin 15, 5 V tolerant I/O for FSMC data or timer functions |
| 63 | PC6 | bidirectional | Port C pin 6, 5 V tolerant I/O supporting I2S, timer, SDIO, USART, DCMI, or microphone clock functions |
| 64 | PC7 | bidirectional | Port C pin 7, 5 V tolerant I/O supporting I2S, timer, SDIO, USART, or DCMI functions |
| 65 | PC8 | bidirectional | Port C pin 8, 5 V tolerant I/O supporting timer, SDIO, USART, or DCMI functions |
| 66 | PC9 | bidirectional | Port C pin 9, 5 V tolerant I/O supporting I2C, I2S clock, timer, SDIO, or DCMI functions |
| 67 | PA8 | bidirectional | Port A pin 8, 5 V tolerant I/O supporting MCO1 clock output, timer, USART, I2C, or OTG_FS functions |
| 68 | PA9 | bidirectional | Port A pin 9, 5 V tolerant I/O supporting USART TX, timer, I2C, or DCMI functions, OTG_FS VBUS monitoring |
| 69 | PA10 | bidirectional | Port A pin 10, 5 V tolerant I/O supporting USART RX, timer, OTG_FS ID, or DCMI functions |
| 70 | PA11 | bidirectional | Port A pin 11, 5 V tolerant I/O supporting USART, timer, CAN RX, or OTG_FS DM functions |
| 71 | PA12 | bidirectional | Port A pin 12, 5 V tolerant I/O supporting USART, timer, CAN TX, or OTG_FS DP functions |
| 72 | PA13 | bidirectional | Port A pin 13, JTMS-SWDIO for debug interface (JTAG or Serial Wire Debug) |
| 73 | VCAP_2 | power_in | Voltage regulator output capacitor pin, requires 4.7 µF capacitor to ground |
| 74 | VSS | power_in | Ground (0 V reference) pin |
| 75 | VDD | power_in | Main supply voltage pin, 1.8 V to 3.6 V |
| 76 | PA14 | bidirectional | Port A pin 14, JTCK-SWCLK for debug interface (JTAG or Serial Wire Debug) |
| 77 | PA15 | bidirectional | Port A pin 15, 5 V tolerant I/O supporting JTDI, SPI, I2S, timer, or alternate functions |
| 78 | PC10 | bidirectional | Port C pin 10, 5 V tolerant I/O supporting SPI, I2S, USART, UART, SDIO, or DCMI functions |
| 79 | PC11 | bidirectional | Port C pin 11, 5 V tolerant I/O supporting SPI, USART, UART, SDIO, or DCMI functions |
| 80 | PC12 | bidirectional | Port C pin 12, 5 V tolerant I/O supporting UART, SPI, I2S, SDIO, or DCMI functions |
| 81 | PD0 | bidirectional | Port D pin 0, 5 V tolerant I/O for FSMC data or CAN RX functions |
| 82 | PD1 | bidirectional | Port D pin 1, 5 V tolerant I/O for FSMC data or CAN TX functions |
| 83 | PD2 | bidirectional | Port D pin 2, 5 V tolerant I/O supporting timer, UART RX, SDIO, or DCMI functions |
| 84 | PD3 | bidirectional | Port D pin 3, 5 V tolerant I/O for FSMC clock or USART functions |
| 85 | PD4 | bidirectional | Port D pin 4, 5 V tolerant I/O for FSMC NOE or USART functions |
| 86 | PD5 | bidirectional | Port D pin 5, 5 V tolerant I/O for FSMC NWE or USART functions |
| 87 | PD6 | bidirectional | Port D pin 6, 5 V tolerant I/O for FSMC NWAIT or USART functions |
| 88 | PD7 | bidirectional | Port D pin 7, 5 V tolerant I/O for FSMC NE1 or USART functions |
| 89 | PB3 | bidirectional | Port B pin 3, JTDO/TRACESWO for debug interface, supports SPI, I2S, or timer functions |
| 90 | PB4 | bidirectional | Port B pin 4, NJTRST for JTAG, supports SPI, I2S, or timer functions |
| 91 | PB5 | bidirectional | Port B pin 5, 5 V tolerant I/O supporting I2C SMB alert, CAN, OTG_HS, Ethernet, timer, SPI, or DCMI functions |
| 92 | PB6 | bidirectional | Port B pin 6, 5 V tolerant I/O supporting I2C clock, timer, CAN, USART, or DCMI functions |
| 93 | PB7 | bidirectional | Port B pin 7, 5 V tolerant I/O supporting I2C data, FSMC NL, DCMI, or USART functions |
| 94 | BOOT0 | input | Boot select input pin (logic level) determines boot mode from flash or system memory |
| 95 | PB8 | bidirectional | Port B pin 8, 5 V tolerant I/O supporting timer, SDIO, I2C, CAN, Ethernet, or DCMI functions |
| 96 | PB9 | bidirectional | Port B pin 9, 5 V tolerant I/O supporting SPI, I2S, timer, SDIO, I2C, CAN, or DCMI functions |
| 97 | PE0 | bidirectional | Port E pin 0, 5 V tolerant I/O for FSMC byte lane 0 or timer functions |
| 98 | PE1 | bidirectional | Port E pin 1, 5 V tolerant I/O for FSMC byte lane 1 or DCMI functions |
| 99 | VSS | power_in | Ground (0 V reference) pin |
| 100 | VDD | power_in | Main supply voltage pin, 1.8 V to 3.6 V |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-100(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 100 |
CAD (KiCad official)
- Symbol:
STM32F407VET6TR - Footprint:
Package_QFP:LQFP-100_14x14mm_P0.5mm - 3D model: LQFP-100(14x14) (KiCad packages3D, STEP)
- 3D model files:
stm32f407vet6tr-etched.step/stm32f407vet6tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f407vet6tr.step/stm32f407vet6tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (203 pp, sha256
1356a8eec66c7d48, retrieved 2026-10-07, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).