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STM32F405ZGT6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-144(20x20). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32F405ZGT6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-144(20x20)
STM32F405ZGT6 from STMicroelectronics, in a LQFP-144(20x20). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PE2 | bidirectional | 5 V-tolerant I/O; alternate functions TRACECLK, FSMC_A23, ETH_MII_TXD3, EVENTOUT. |
| 2 | PE3 | bidirectional | 5 V-tolerant I/O; alternate functions TRACED0, FSMC_A19, EVENTOUT. |
| 3 | PE4 | bidirectional | 5 V-tolerant I/O; alternate functions TRACED1, FSMC_A20, DCMI_D4, EVENTOUT. |
| 4 | PE5 | bidirectional | 5 V-tolerant I/O; alternate functions TRACED2, FSMC_A21, TIM9_CH1, DCMI_D6, EVENTOUT. |
| 5 | PE6 | bidirectional | 5 V-tolerant I/O; alternate functions TRACED3, FSMC_A22, TIM9_CH2, DCMI_D7, EVENTOUT. |
| 6 | VBAT | power_in | Backup supply pin for RTC, backup registers and optional backup SRAM. |
| 7 | PC13 | bidirectional | 5 V-tolerant I/O supplied through the power switch; output limited to 2 MHz with max 30 pF load, 3 mA sink, not a current source; RTC_OUT, RTC_TAMP1, RTC_TS. |
| 8 | PC14/OSC32_IN | bidirectional | I/O supplied through the power switch (2 MHz, 30 pF max output limit); OSC32_IN 32 kHz oscillator input, not 5 V-tolerant in oscillator mode. |
| 9 | PC15/OSC32_OUT | bidirectional | I/O supplied through the power switch (2 MHz, 30 pF max output limit); OSC32_OUT 32 kHz oscillator output, not 5 V-tolerant in oscillator mode. |
| 10 | PF0 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_A0, I2C2_SDA, EVENTOUT. |
| 11 | PF1 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_A1, I2C2_SCL, EVENTOUT. |
| 12 | PF2 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_A2, I2C2_SMBA, EVENTOUT. |
| 13 | PF3 | bidirectional | 5 V-tolerant I/O (except analog mode); FSMC_A3, EVENTOUT; additional function ADC3_IN9. |
| 14 | PF4 | bidirectional | 5 V-tolerant I/O (except analog mode); FSMC_A4, EVENTOUT; additional function ADC3_IN14. |
| 15 | PF5 | bidirectional | 5 V-tolerant I/O (except analog mode); FSMC_A5, EVENTOUT; additional function ADC3_IN15. |
| 16 | VSS | power_in | Ground supply pin. |
| 17 | VDD | power_in | Digital supply pin. |
| 18 | PF6 | bidirectional | 5 V-tolerant I/O (except analog mode); TIM10_CH1, FSMC_NIORD, EVENTOUT; additional function ADC3_IN4. |
| 19 | PF7 | bidirectional | 5 V-tolerant I/O (except analog mode); TIM11_CH1, FSMC_NREG, EVENTOUT; additional function ADC3_IN5. |
| 20 | PF8 | bidirectional | 5 V-tolerant I/O (except analog mode); TIM13_CH1, FSMC_NIOWR, EVENTOUT; additional function ADC3_IN6. |
| 21 | PF9 | bidirectional | 5 V-tolerant I/O (except analog mode); TIM14_CH1, FSMC_CD, EVENTOUT; additional function ADC3_IN7. |
| 22 | PF10 | bidirectional | 5 V-tolerant I/O (except analog mode); FSMC_INTR, EVENTOUT; additional function ADC3_IN8. |
| 23 | PH0/OSC_IN | bidirectional | I/O that is OSC_IN, the 4-26 MHz HSE oscillator input; not 5 V-tolerant in oscillator mode. |
| 24 | PH1/OSC_OUT | bidirectional | I/O that is OSC_OUT, the 4-26 MHz HSE oscillator output; not 5 V-tolerant in oscillator mode. |
| 25 | NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up resistor. |
| 26 | PC0 | bidirectional | 5 V-tolerant I/O (except analog mode); OTG_HS_ULPI_STP, EVENTOUT; additional function ADC123_IN10. |
| 27 | PC1 | bidirectional | 5 V-tolerant I/O (except analog mode); ETH_MDC, EVENTOUT; additional function ADC123_IN11. |
| 28 | PC2 | bidirectional | 5 V-tolerant I/O (except analog mode); SPI2_MISO, OTG_HS_ULPI_DIR, ETH_MII_TXD2, I2S2ext_SD, EVENTOUT; ADC123_IN12. |
| 29 | PC3 | bidirectional | 5 V-tolerant I/O (except analog mode); SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK, EVENTOUT; ADC123_IN13. |
| 30 | VDD | power_in | Digital supply pin. |
| 31 | VSSA | power_in | Analog ground supply pin. |
| 32 | VREF+ | power_in | Positive analog reference voltage supply pin. |
| 33 | VDDA | power_in | Analog supply pin. |
| 34 | PA0/WKUP | bidirectional | 5 V-tolerant I/O (except analog mode); USART2_CTS, UART4_TX, ETH_MII_CRS, TIM2_CH1_ETR, TIM5_CH1, TIM8_ETR; ADC123_IN0 and WKUP. |
| 35 | PA1 | bidirectional | 5 V-tolerant I/O (except analog mode); USART2_RTS, UART4_RX, ETH_RMII_REF_CLK, ETH_MII_RX_CLK, TIM5_CH2, TIM2_CH2; ADC123_IN1. |
| 36 | PA2 | bidirectional | 5 V-tolerant I/O (except analog mode); USART2_TX, TIM5_CH3, TIM9_CH1, TIM2_CH3, ETH_MDIO; ADC123_IN2. |
| 37 | PA3 | bidirectional | 5 V-tolerant I/O (except analog mode); USART2_RX, TIM5_CH4, TIM9_CH2, TIM2_CH4, OTG_HS_ULPI_D0, ETH_MII_COL; ADC123_IN3. |
| 38 | VSS | power_in | Ground supply pin. |
| 39 | VDD | power_in | Digital supply pin. |
| 40 | PA4 | bidirectional | 3.3 V tolerant (TTa) I/O connected to ADC; SPI1_NSS, SPI3_NSS, USART2_CK, DCMI_HSYNC, OTG_HS_SOF, I2S3_WS; ADC12_IN4, DAC_OUT1. |
| 41 | PA5 | bidirectional | 3.3 V tolerant (TTa) I/O connected to ADC; SPI1_SCK, OTG_HS_ULPI_CK, TIM2_CH1_ETR, TIM8_CH1N; ADC12_IN5, DAC_OUT2. |
| 42 | PA6 | bidirectional | 5 V-tolerant I/O (except analog mode); SPI1_MISO, TIM8_BKIN, TIM13_CH1, DCMI_PIXCLK, TIM3_CH1, TIM1_BKIN; ADC12_IN6. |
| 43 | PA7 | bidirectional | 5 V-tolerant I/O (except analog mode); SPI1_MOSI, TIM8_CH1N, TIM14_CH1, TIM3_CH2, ETH_MII_RX_DV, TIM1_CH1N, ETH_RMII_CRS_DV; ADC12_IN7. |
| 44 | PC4 | bidirectional | 5 V-tolerant I/O (except analog mode); ETH_RMII_RX_D0, ETH_MII_RX_D0, EVENTOUT; ADC12_IN14. |
| 45 | PC5 | bidirectional | 5 V-tolerant I/O (except analog mode); ETH_RMII_RX_D1, ETH_MII_RX_D1, EVENTOUT; ADC12_IN15. |
| 46 | PB0 | bidirectional | 5 V-tolerant I/O (except analog mode); TIM3_CH3, TIM8_CH2N, OTG_HS_ULPI_D1, ETH_MII_RXD2, TIM1_CH2N; ADC12_IN8. |
| 47 | PB1 | bidirectional | 5 V-tolerant I/O (except analog mode); TIM3_CH4, TIM8_CH3N, OTG_HS_ULPI_D2, ETH_MII_RXD3, TIM1_CH3N; ADC12_IN9. |
| 48 | PB2/BOOT1 | bidirectional | 5 V-tolerant I/O that also serves as BOOT1 boot mode selection; alternate function EVENTOUT. |
| 49 | PF11 | bidirectional | 5 V-tolerant I/O; alternate functions DCMI_D12, EVENTOUT. |
| 50 | PF12 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_A6, EVENTOUT. |
| 51 | VSS | power_in | Ground supply pin. |
| 52 | VDD | power_in | Digital supply pin. |
| 53 | PF13 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_A7, EVENTOUT. |
| 54 | PF14 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_A8, EVENTOUT. |
| 55 | PF15 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_A9, EVENTOUT. |
| 56 | PG0 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_A10, EVENTOUT. |
| 57 | PG1 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_A11, EVENTOUT. |
| 58 | PE7 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_D4, TIM1_ETR, EVENTOUT. |
| 59 | PE8 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_D5, TIM1_CH1N, EVENTOUT. |
| 60 | PE9 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_D6, TIM1_CH1, EVENTOUT. |
| 61 | VSS | power_in | Ground supply pin. |
| 62 | VDD | power_in | Digital supply pin. |
| 63 | PE10 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_D7, TIM1_CH2N, EVENTOUT. |
| 64 | PE11 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_D8, TIM1_CH2, EVENTOUT. |
| 65 | PE12 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_D9, TIM1_CH3N, EVENTOUT. |
| 66 | PE13 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_D10, TIM1_CH3, EVENTOUT. |
| 67 | PE14 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_D11, TIM1_CH4, EVENTOUT. |
| 68 | PE15 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_D12, TIM1_BKIN, EVENTOUT. |
| 69 | PB10 | bidirectional | 5 V-tolerant I/O; SPI2_SCK, I2S2_CK, I2C2_SCL, USART3_TX, OTG_HS_ULPI_D3, ETH_MII_RX_ER, TIM2_CH3, EVENTOUT. |
| 70 | PB11 | bidirectional | 5 V-tolerant I/O; I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_RMII_TX_EN, ETH_MII_TX_EN, TIM2_CH4, EVENTOUT. |
| 71 | VCAP_1 | passive | Supply pin for the internal 1.2 V regulator output, connected to an external capacitor (VCAP_1/VCAP_2). |
| 72 | VDD | power_in | Digital supply pin. |
| 73 | PB12 | bidirectional | 5 V-tolerant I/O; SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN, CAN2_RX, OTG_HS_ULPI_D5, ETH_RMII_TXD0, ETH_MII_TXD0, OTG_HS_ID, EVENTOUT. |
| 74 | PB13 | bidirectional | 5 V-tolerant I/O; SPI2_SCK, I2S2_CK, USART3_CTS, TIM1_CH1N, CAN2_TX, OTG_HS_ULPI_D6, ETH_RMII_TXD1, ETH_MII_TXD1; additional function OTG_HS_VBUS. |
| 75 | PB14 | bidirectional | 5 V-tolerant I/O; SPI2_MISO, TIM1_CH2N, TIM12_CH1, OTG_HS_DM, USART3_RTS, TIM8_CH2N, I2S2ext_SD, EVENTOUT. |
| 76 | PB15 | bidirectional | 5 V-tolerant I/O; SPI2_MOSI, I2S2_SD, TIM1_CH3N, TIM8_CH3N, TIM12_CH2, OTG_HS_DP, EVENTOUT; additional function RTC_REFIN. |
| 77 | PD8 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_D13, USART3_TX, EVENTOUT. |
| 78 | PD9 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_D14, USART3_RX, EVENTOUT. |
| 79 | PD10 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_D15, USART3_CK, EVENTOUT. |
| 80 | PD11 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_CLE, FSMC_A16, USART3_CTS, EVENTOUT. |
| 81 | PD12 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_ALE, FSMC_A17, TIM4_CH1, USART3_RTS, EVENTOUT. |
| 82 | PD13 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_A18, TIM4_CH2, EVENTOUT. |
| 83 | VSS | power_in | Ground supply pin. |
| 84 | VDD | power_in | Digital supply pin. |
| 85 | PD14 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_D0, TIM4_CH3, EVENTOUT. |
| 86 | PD15 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_D1, TIM4_CH4, EVENTOUT. |
| 87 | PG2 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_A12, EVENTOUT. |
| 88 | PG3 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_A13, EVENTOUT. |
| 89 | PG4 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_A14, EVENTOUT. |
| 90 | PG5 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_A15, EVENTOUT. |
| 91 | PG6 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_INT2, EVENTOUT. |
| 92 | PG7 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_INT3, USART6_CK, EVENTOUT. |
| 93 | PG8 | bidirectional | 5 V-tolerant I/O; alternate functions USART6_RTS, ETH_PPS_OUT, EVENTOUT. |
| 94 | VSS | power_in | Ground supply pin. |
| 95 | VDD | power_in | Digital supply pin. |
| 96 | PC6 | bidirectional | 5 V-tolerant I/O; I2S2_MCK, TIM8_CH1, SDIO_D6, USART6_TX, DCMI_D0, TIM3_CH1, EVENTOUT. |
| 97 | PC7 | bidirectional | 5 V-tolerant I/O; I2S3_MCK, TIM8_CH2, SDIO_D7, USART6_RX, DCMI_D1, TIM3_CH2, EVENTOUT. |
| 98 | PC8 | bidirectional | 5 V-tolerant I/O; TIM8_CH3, SDIO_D0, TIM3_CH3, USART6_CK, DCMI_D2, EVENTOUT. |
| 99 | PC9 | bidirectional | 5 V-tolerant I/O; I2S_CKIN, MCO2, TIM8_CH4, SDIO_D1, I2C3_SDA, DCMI_D3, TIM3_CH4, EVENTOUT. |
| 100 | PA8 | bidirectional | 5 V-tolerant I/O; MCO1, USART1_CK, TIM1_CH1, I2C3_SCL, OTG_FS_SOF, EVENTOUT. |
| 101 | PA9 | bidirectional | 5 V-tolerant I/O; USART1_TX, TIM1_CH2, I2C3_SMBA, DCMI_D0, EVENTOUT; additional function OTG_FS_VBUS. |
| 102 | PA10 | bidirectional | 5 V-tolerant I/O; USART1_RX, TIM1_CH3, OTG_FS_ID, DCMI_D1, EVENTOUT. |
| 103 | PA11 | bidirectional | 5 V-tolerant I/O; USART1_CTS, CAN1_RX, TIM1_CH4, OTG_FS_DM, EVENTOUT. |
| 104 | PA12 | bidirectional | 5 V-tolerant I/O; USART1_RTS, CAN1_TX, TIM1_ETR, OTG_FS_DP, EVENTOUT. |
| 105 | PA13 | bidirectional | 5 V-tolerant I/O; function after reset is JTMS-SWDIO (JTAG TMS / SWD data). |
| 106 | VCAP_2 | passive | Supply pin for the internal 1.2 V regulator output, connected to an external capacitor (VCAP_1/VCAP_2). |
| 107 | VSS | power_in | Ground supply pin. |
| 108 | VDD | power_in | Digital supply pin. |
| 109 | PA14 | bidirectional | 5 V-tolerant I/O; function after reset is JTCK-SWCLK (JTAG TCK / SWD clock). |
| 110 | PA15 | bidirectional | 5 V-tolerant I/O; function after reset is JTDI; also SPI3_NSS, I2S3_WS, TIM2_CH1_ETR, SPI1_NSS, EVENTOUT. |
| 111 | PC10 | bidirectional | 5 V-tolerant I/O; SPI3_SCK, I2S3_CK, UART4_TX, SDIO_D2, DCMI_D8, USART3_TX, EVENTOUT. |
| 112 | PC11 | bidirectional | 5 V-tolerant I/O; UART4_RX, SPI3_MISO, SDIO_D3, DCMI_D4, USART3_RX, I2S3ext_SD, EVENTOUT. |
| 113 | PC12 | bidirectional | 5 V-tolerant I/O; UART5_TX, SDIO_CK, DCMI_D9, SPI3_MOSI, I2S3_SD, USART3_CK, EVENTOUT. |
| 114 | PD0 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_D2, CAN1_RX, EVENTOUT. |
| 115 | PD1 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_D3, CAN1_TX, EVENTOUT. |
| 116 | PD2 | bidirectional | 5 V-tolerant I/O; TIM3_ETR, UART5_RX, SDIO_CMD, DCMI_D11, EVENTOUT. |
| 117 | PD3 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_CLK, USART2_CTS, EVENTOUT. |
| 118 | PD4 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_NOE, USART2_RTS, EVENTOUT. |
| 119 | PD5 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_NWE, USART2_TX, EVENTOUT. |
| 120 | VSS | power_in | Ground supply pin. |
| 121 | VDD | power_in | Digital supply pin. |
| 122 | PD6 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_NWAIT, USART2_RX, EVENTOUT. |
| 123 | PD7 | bidirectional | 5 V-tolerant I/O; alternate functions USART2_CK, FSMC_NE1, FSMC_NCE2, EVENTOUT. |
| 124 | PG9 | bidirectional | 5 V-tolerant I/O; alternate functions USART6_RX, FSMC_NE2, FSMC_NCE3, EVENTOUT. |
| 125 | PG10 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_NCE4_1, FSMC_NE3, EVENTOUT. |
| 126 | PG11 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_NCE4_2, ETH_MII_TX_EN, ETH_RMII_TX_EN, EVENTOUT. |
| 127 | PG12 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_NE4, USART6_RTS, EVENTOUT. |
| 128 | PG13 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_A24, USART6_CTS, ETH_MII_TXD0, ETH_RMII_TXD0, EVENTOUT. |
| 129 | PG14 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_A25, USART6_TX, ETH_MII_TXD1, ETH_RMII_TXD1, EVENTOUT. |
| 130 | VSS | power_in | Ground supply pin. |
| 131 | VDD | power_in | Digital supply pin. |
| 132 | PG15 | bidirectional | 5 V-tolerant I/O; alternate functions USART6_CTS, DCMI_D13, EVENTOUT. |
| 133 | PB3 | bidirectional | 5 V-tolerant I/O; function after reset is JTDO/TRACESWO; also SPI3_SCK, I2S3_CK, TIM2_CH2, SPI1_SCK, EVENTOUT. |
| 134 | PB4 | bidirectional | 5 V-tolerant I/O; function after reset is NJTRST; also SPI3_MISO, TIM3_CH1, SPI1_MISO, I2S3ext_SD, EVENTOUT. |
| 135 | PB5 | bidirectional | 5 V-tolerant I/O; I2C1_SMBA, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, TIM3_CH2, SPI1_MOSI, SPI3_MOSI, DCMI_D10, I2S3_SD, EVENTOUT. |
| 136 | PB6 | bidirectional | 5 V-tolerant I/O; I2C1_SCL, TIM4_CH1, CAN2_TX, DCMI_D5, USART1_TX, EVENTOUT. |
| 137 | PB7 | bidirectional | 5 V-tolerant I/O; I2C1_SDA, FSMC_NL, DCMI_VSYNC, USART1_RX, TIM4_CH2, EVENTOUT. |
| 138 | BOOT0 | input | Dedicated boot mode selection input (B structure); also VPP for Flash programming. |
| 139 | PB8 | bidirectional | 5 V-tolerant I/O; TIM4_CH3, SDIO_D4, TIM10_CH1, DCMI_D6, ETH_MII_TXD3, I2C1_SCL, CAN1_RX, EVENTOUT. |
| 140 | PB9 | bidirectional | 5 V-tolerant I/O; SPI2_NSS, I2S2_WS, TIM4_CH4, TIM11_CH1, SDIO_D5, DCMI_D7, I2C1_SDA, CAN1_TX, EVENTOUT. |
| 141 | PE0 | bidirectional | 5 V-tolerant I/O; alternate functions TIM4_ETR, FSMC_NBL0, DCMI_D2, EVENTOUT. |
| 142 | PE1 | bidirectional | 5 V-tolerant I/O; alternate functions FSMC_NBL1, DCMI_D3, EVENTOUT. |
| 143 | PDR_ON | input | Power-down reset enable input (FT structure) used to control the internal power-down reset. |
| 144 | VDD | power_in | Digital supply pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | LQFP-144(20x20) |
| Category | Embedded Processors & Controllers |
| Pins | 144 |
CAD (KiCad official)
- Symbol:
STM32F405ZGT6 - Footprint:
Package_QFP:LQFP-144_20x20mm_P0.5mm - 3D model: LQFP-144(20x20) (KiCad packages3D, STEP)
- 3D model files:
stm32f405zgt6-etched.step/stm32f405zgt6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32f405zgt6.step/stm32f405zgt6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (202 pp, sha256
9d863ca0c078917f, retrieved 2026-10-01, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).